1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright 2007 Simtec Electronics
4 // Ben Dooks <ben@simtec.co.uk>
6 // http://armlinux.simtec.co.uk/
8 #include <linux/kernel.h>
9 #include <linux/types.h>
10 #include <linux/interrupt.h>
11 #include <linux/list.h>
12 #include <linux/timer.h>
13 #include <linux/init.h>
14 #include <linux/gpio.h>
15 #include <linux/gpio/machine.h>
16 #include <linux/syscore_ops.h>
17 #include <linux/serial_core.h>
18 #include <linux/serial_s3c.h>
19 #include <linux/platform_device.h>
20 #include <linux/i2c.h>
22 #include <video/ili9320.h>
24 #include <linux/spi/spi.h>
25 #include <linux/spi/spi_gpio.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/irq.h>
31 #include <linux/platform_data/mtd-nand-s3c2410.h>
32 #include <linux/platform_data/i2c-s3c2410.h>
34 #include "hardware-s3c24xx.h"
35 #include "regs-gpio.h"
36 #include <linux/platform_data/fb-s3c2410.h>
37 #include "gpio-samsung.h"
39 #include <asm/mach-types.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/rawnand.h>
43 #include <linux/mtd/nand-ecc-sw-hamming.h>
44 #include <linux/mtd/partitions.h>
50 #include <linux/platform_data/usb-s3c2410_udc.h>
53 #include "s3c2412-power.h"
55 static struct map_desc jive_iodesc[] __initdata = {
58 #define UCON S3C2410_UCON_DEFAULT
59 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
60 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
62 static struct s3c2410_uartcfg jive_uartcfgs[] = {
86 /* Jive flash assignment
88 * 0x00000000-0x00028000 : uboot
89 * 0x00028000-0x0002c000 : uboot env
90 * 0x0002c000-0x00030000 : spare
91 * 0x00030000-0x00200000 : zimage A
92 * 0x00200000-0x01600000 : cramfs A
93 * 0x01600000-0x017d0000 : zimage B
94 * 0x017d0000-0x02bd0000 : cramfs B
95 * 0x02bd0000-0x03fd0000 : yaffs
97 static struct mtd_partition __initdata jive_imageA_nand_part[] = {
99 #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
100 /* Don't allow access to the bootloader from linux */
104 .size = (160 * SZ_1K),
105 .mask_flags = MTD_WRITEABLE, /* force read-only */
111 .offset = (176 * SZ_1K),
112 .size = (16 * SZ_1K),
118 .name = "kernel (ro)",
119 .offset = (192 * SZ_1K),
120 .size = (SZ_2M) - (192 * SZ_1K),
121 .mask_flags = MTD_WRITEABLE, /* force read-only */
125 .size = (20 * SZ_1M),
126 .mask_flags = MTD_WRITEABLE, /* force read-only */
132 .offset = (44 * SZ_1M),
133 .size = (20 * SZ_1M),
136 /* bootloader environment */
139 .offset = (160 * SZ_1K),
140 .size = (16 * SZ_1K),
146 .offset = (22 * SZ_1M),
147 .size = (2 * SZ_1M) - (192 * SZ_1K),
150 .offset = (24 * SZ_1M) - (192*SZ_1K),
151 .size = (20 * SZ_1M),
155 static struct mtd_partition __initdata jive_imageB_nand_part[] = {
157 #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
158 /* Don't allow access to the bootloader from linux */
162 .size = (160 * SZ_1K),
163 .mask_flags = MTD_WRITEABLE, /* force read-only */
169 .offset = (176 * SZ_1K),
170 .size = (16 * SZ_1K),
176 .name = "kernel (ro)",
177 .offset = (22 * SZ_1M),
178 .size = (2 * SZ_1M) - (192 * SZ_1K),
179 .mask_flags = MTD_WRITEABLE, /* force read-only */
183 .offset = (24 * SZ_1M) - (192 * SZ_1K),
184 .size = (20 * SZ_1M),
185 .mask_flags = MTD_WRITEABLE, /* force read-only */
191 .offset = (44 * SZ_1M),
192 .size = (20 * SZ_1M),
195 /* bootloader environment */
198 .offset = (160 * SZ_1K),
199 .size = (16 * SZ_1K),
205 .offset = (192 * SZ_1K),
206 .size = (2 * SZ_1M) - (192 * SZ_1K),
209 .offset = (2 * SZ_1M),
210 .size = (20 * SZ_1M),
214 static struct s3c2410_nand_set __initdata jive_nand_sets[] = {
218 .nr_partitions = ARRAY_SIZE(jive_imageA_nand_part),
219 .partitions = jive_imageA_nand_part,
223 static struct s3c2410_platform_nand __initdata jive_nand_info = {
224 /* set taken from osiris nand timings, possibly still conservative */
228 .sets = jive_nand_sets,
229 .nr_sets = ARRAY_SIZE(jive_nand_sets),
230 .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
233 static int __init jive_mtdset(char *options)
235 struct s3c2410_nand_set *nand = &jive_nand_sets[0];
238 if (options == NULL || options[0] == '\0')
241 if (kstrtoul(options, 10, &set)) {
242 printk(KERN_ERR "failed to parse mtdset=%s\n", options);
248 nand->nr_partitions = ARRAY_SIZE(jive_imageB_nand_part);
249 nand->partitions = jive_imageB_nand_part;
252 /* this is already setup in the nand info */
255 printk(KERN_ERR "Unknown mtd set %ld specified,"
256 "using default.", set);
262 /* parse the mtdset= option given to the kernel command line */
263 __setup("mtdset=", jive_mtdset);
265 /* LCD timing and setup */
267 #define LCD_XRES (240)
268 #define LCD_YRES (320)
269 #define LCD_LEFT_MARGIN (12)
270 #define LCD_RIGHT_MARGIN (12)
271 #define LCD_LOWER_MARGIN (12)
272 #define LCD_UPPER_MARGIN (12)
273 #define LCD_VSYNC (2)
274 #define LCD_HSYNC (2)
276 #define LCD_REFRESH (60)
278 #define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN)
279 #define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN)
281 static struct s3c2410fb_display jive_vgg2432a4_display[] = {
287 .left_margin = LCD_LEFT_MARGIN,
288 .right_margin = LCD_RIGHT_MARGIN,
289 .upper_margin = LCD_UPPER_MARGIN,
290 .lower_margin = LCD_LOWER_MARGIN,
291 .hsync_len = LCD_HSYNC,
292 .vsync_len = LCD_VSYNC,
294 .pixclock = (1000000000000LL /
295 (LCD_REFRESH * LCD_HTOT * LCD_VTOT)),
298 .type = (S3C2410_LCDCON1_TFT16BPP |
299 S3C2410_LCDCON1_TFT),
301 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
302 S3C2410_LCDCON5_INVVLINE |
303 S3C2410_LCDCON5_INVVFRAME |
304 S3C2410_LCDCON5_INVVDEN |
305 S3C2410_LCDCON5_PWREN),
309 /* todo - put into gpio header */
311 #define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
312 #define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
314 static struct s3c2410fb_mach_info jive_lcd_config = {
315 .displays = jive_vgg2432a4_display,
316 .num_displays = ARRAY_SIZE(jive_vgg2432a4_display),
317 .default_display = 0,
319 /* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN
320 * and disable the pull down resistors on pins we are using for LCD
323 .gpcup = (0xf << 1) | (0x3f << 10),
324 .gpcup_reg = S3C2410_GPCUP,
326 .gpccon = (S3C2410_GPC1_VCLK | S3C2410_GPC2_VLINE |
327 S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM |
328 S3C2410_GPC10_VD2 | S3C2410_GPC11_VD3 |
329 S3C2410_GPC12_VD4 | S3C2410_GPC13_VD5 |
330 S3C2410_GPC14_VD6 | S3C2410_GPC15_VD7),
332 .gpccon_mask = (S3C2410_GPCCON_MASK(1) | S3C2410_GPCCON_MASK(2) |
333 S3C2410_GPCCON_MASK(3) | S3C2410_GPCCON_MASK(4) |
334 S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) |
335 S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) |
336 S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)),
338 .gpccon_reg = S3C2410_GPCCON,
340 .gpdup = (0x3f << 2) | (0x3f << 10),
342 .gpdup_reg = S3C2410_GPDUP,
344 .gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 |
345 S3C2410_GPD4_VD12 | S3C2410_GPD5_VD13 |
346 S3C2410_GPD6_VD14 | S3C2410_GPD7_VD15 |
347 S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 |
348 S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 |
349 S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23),
351 .gpdcon_mask = (S3C2410_GPDCON_MASK(2) | S3C2410_GPDCON_MASK(3) |
352 S3C2410_GPDCON_MASK(4) | S3C2410_GPDCON_MASK(5) |
353 S3C2410_GPDCON_MASK(6) | S3C2410_GPDCON_MASK(7) |
354 S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)|
355 S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)|
356 S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)),
358 .gpdcon_reg = S3C2410_GPDCON,
361 /* ILI9320 support. */
363 static void jive_lcm_reset(unsigned int set)
365 printk(KERN_DEBUG "%s(%d)\n", __func__, set);
367 gpio_set_value(S3C2410_GPG(13), set);
370 #undef LCD_UPPER_MARGIN
371 #define LCD_UPPER_MARGIN 2
373 static struct ili9320_platdata jive_lcm_config = {
377 .reset = jive_lcm_reset,
378 .suspend = ILI9320_SUSPEND_DEEP,
380 .entry_mode = ILI9320_ENTRYMODE_ID(3) | ILI9320_ENTRYMODE_BGR,
381 .display2 = (ILI9320_DISPLAY2_FP(LCD_UPPER_MARGIN) |
382 ILI9320_DISPLAY2_BP(LCD_LOWER_MARGIN)),
385 .rgb_if1 = (ILI9320_RGBIF1_RIM_RGB18 |
386 ILI9320_RGBIF1_RM | ILI9320_RGBIF1_CLK_RGBIF),
387 .rgb_if2 = ILI9320_RGBIF2_DPL,
390 .interface4 = (ILI9320_INTERFACE4_RTNE(16) |
391 ILI9320_INTERFACE4_DIVE(1)),
396 /* LCD SPI support */
398 static struct spi_gpio_platform_data jive_lcd_spi = {
402 static struct platform_device jive_device_lcdspi = {
405 .dev.platform_data = &jive_lcd_spi,
408 static struct gpiod_lookup_table jive_lcdspi_gpiod_table = {
409 .dev_id = "spi_gpio",
411 GPIO_LOOKUP("GPIOG", 8,
412 "sck", GPIO_ACTIVE_HIGH),
413 GPIO_LOOKUP("GPIOB", 8,
414 "mosi", GPIO_ACTIVE_HIGH),
415 GPIO_LOOKUP("GPIOB", 7,
416 "cs", GPIO_ACTIVE_HIGH),
421 /* WM8750 audio code SPI definition */
423 static struct spi_gpio_platform_data jive_wm8750_spi = {
427 static struct platform_device jive_device_wm8750 = {
430 .dev.platform_data = &jive_wm8750_spi,
433 static struct gpiod_lookup_table jive_wm8750_gpiod_table = {
434 .dev_id = "spi_gpio",
436 GPIO_LOOKUP("GPIOB", 4,
437 "sck", GPIO_ACTIVE_HIGH),
438 GPIO_LOOKUP("GPIOB", 9,
439 "mosi", GPIO_ACTIVE_HIGH),
440 GPIO_LOOKUP("GPIOH", 10,
441 "cs", GPIO_ACTIVE_HIGH),
446 /* JIVE SPI devices. */
448 static struct spi_board_info __initdata jive_spi_devs[] = {
450 .modalias = "VGG2432A4",
453 .mode = SPI_MODE_3, /* CPOL=1, CPHA=1 */
454 .max_speed_hz = 100000,
455 .platform_data = &jive_lcm_config,
457 .modalias = "WM8750",
460 .mode = SPI_MODE_0, /* CPOL=0, CPHA=0 */
461 .max_speed_hz = 100000,
465 /* I2C bus and device configuration. */
467 static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = {
468 .frequency = 80 * 1000,
469 .flags = S3C_IICFLG_FILTER,
473 static struct i2c_board_info jive_i2c_devs[] __initdata = {
475 I2C_BOARD_INFO("lis302dl", 0x1c),
480 /* The platform devices being used. */
482 static struct platform_device *jive_devices[] __initdata = {
491 &s3c_device_usbgadget,
495 static struct s3c2410_udc_mach_info jive_udc_cfg __initdata = {
496 .vbus_pin = S3C2410_GPG(1), /* detect is on GPG1 */
499 /* Jive power management device */
502 static int jive_pm_suspend(void)
504 /* Write the magic value u-boot uses to check for resume into
505 * the INFORM0 register, and ensure INFORM1 is set to the
506 * correct address to resume from. */
508 __raw_writel(0x2BED, S3C2412_INFORM0);
509 __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1);
514 static void jive_pm_resume(void)
516 __raw_writel(0x0, S3C2412_INFORM0);
520 #define jive_pm_suspend NULL
521 #define jive_pm_resume NULL
524 static struct syscore_ops jive_pm_syscore_ops = {
525 .suspend = jive_pm_suspend,
526 .resume = jive_pm_resume,
529 static void __init jive_map_io(void)
531 s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc));
532 s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs));
533 s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
536 static void __init jive_init_time(void)
538 s3c2412_init_clocks(12000000);
539 s3c24xx_timer_init();
542 static void jive_power_off(void)
544 printk(KERN_INFO "powering system down...\n");
546 gpio_request_one(S3C2410_GPC(5), GPIOF_OUT_INIT_HIGH, NULL);
547 gpio_free(S3C2410_GPC(5));
550 static void __init jive_machine_init(void)
552 /* register system core operations for managing low level suspend */
554 register_syscore_ops(&jive_pm_syscore_ops);
556 /* write our sleep configurations for the IO. Pull down all unused
557 * IO, ensure that we have turned off all peripherals we do not
558 * need, and configure the ones we do need. */
562 __raw_writel(S3C2412_SLPCON_IN(0) |
563 S3C2412_SLPCON_PULL(1) |
564 S3C2412_SLPCON_HIGH(2) |
565 S3C2412_SLPCON_PULL(3) |
566 S3C2412_SLPCON_PULL(4) |
567 S3C2412_SLPCON_PULL(5) |
568 S3C2412_SLPCON_PULL(6) |
569 S3C2412_SLPCON_HIGH(7) |
570 S3C2412_SLPCON_PULL(8) |
571 S3C2412_SLPCON_PULL(9) |
572 S3C2412_SLPCON_PULL(10), S3C2412_GPBSLPCON);
576 __raw_writel(S3C2412_SLPCON_PULL(0) |
577 S3C2412_SLPCON_PULL(1) |
578 S3C2412_SLPCON_PULL(2) |
579 S3C2412_SLPCON_PULL(3) |
580 S3C2412_SLPCON_PULL(4) |
581 S3C2412_SLPCON_PULL(5) |
582 S3C2412_SLPCON_LOW(6) |
583 S3C2412_SLPCON_PULL(6) |
584 S3C2412_SLPCON_PULL(7) |
585 S3C2412_SLPCON_PULL(8) |
586 S3C2412_SLPCON_PULL(9) |
587 S3C2412_SLPCON_PULL(10) |
588 S3C2412_SLPCON_PULL(11) |
589 S3C2412_SLPCON_PULL(12) |
590 S3C2412_SLPCON_PULL(13) |
591 S3C2412_SLPCON_PULL(14) |
592 S3C2412_SLPCON_PULL(15), S3C2412_GPCSLPCON);
596 __raw_writel(S3C2412_SLPCON_ALL_PULL, S3C2412_GPDSLPCON);
600 __raw_writel(S3C2412_SLPCON_LOW(0) |
601 S3C2412_SLPCON_LOW(1) |
602 S3C2412_SLPCON_LOW(2) |
603 S3C2412_SLPCON_EINT(3) |
604 S3C2412_SLPCON_EINT(4) |
605 S3C2412_SLPCON_EINT(5) |
606 S3C2412_SLPCON_EINT(6) |
607 S3C2412_SLPCON_EINT(7), S3C2412_GPFSLPCON);
611 __raw_writel(S3C2412_SLPCON_IN(0) |
612 S3C2412_SLPCON_IN(1) |
613 S3C2412_SLPCON_IN(2) |
614 S3C2412_SLPCON_IN(3) |
615 S3C2412_SLPCON_IN(4) |
616 S3C2412_SLPCON_IN(5) |
617 S3C2412_SLPCON_IN(6) |
618 S3C2412_SLPCON_IN(7) |
619 S3C2412_SLPCON_PULL(8) |
620 S3C2412_SLPCON_PULL(9) |
621 S3C2412_SLPCON_IN(10) |
622 S3C2412_SLPCON_PULL(11) |
623 S3C2412_SLPCON_PULL(12) |
624 S3C2412_SLPCON_PULL(13) |
625 S3C2412_SLPCON_IN(14) |
626 S3C2412_SLPCON_PULL(15), S3C2412_GPGSLPCON);
630 __raw_writel(S3C2412_SLPCON_PULL(0) |
631 S3C2412_SLPCON_PULL(1) |
632 S3C2412_SLPCON_PULL(2) |
633 S3C2412_SLPCON_PULL(3) |
634 S3C2412_SLPCON_PULL(4) |
635 S3C2412_SLPCON_PULL(5) |
636 S3C2412_SLPCON_PULL(6) |
637 S3C2412_SLPCON_IN(7) |
638 S3C2412_SLPCON_IN(8) |
639 S3C2412_SLPCON_PULL(9) |
640 S3C2412_SLPCON_IN(10), S3C2412_GPHSLPCON);
642 /* initialise the power management now we've setup everything. */
646 /** TODO - check that this is after the cmdline option! */
647 s3c_nand_set_platdata(&jive_nand_info);
649 gpio_request(S3C2410_GPG(13), "lcm reset");
650 gpio_direction_output(S3C2410_GPG(13), 0);
652 gpio_request_one(S3C2410_GPB(6), GPIOF_OUT_INIT_LOW, NULL);
653 gpio_free(S3C2410_GPB(6));
655 /* Turn off suspend on both USB ports, and switch the
656 * selectable USB port to USB device mode. */
658 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
659 S3C2410_MISCCR_USBSUSPND0 |
660 S3C2410_MISCCR_USBSUSPND1, 0x0);
662 s3c24xx_udc_set_platdata(&jive_udc_cfg);
663 s3c24xx_fb_set_platdata(&jive_lcd_config);
665 spi_register_board_info(jive_spi_devs, ARRAY_SIZE(jive_spi_devs));
667 s3c_i2c0_set_platdata(&jive_i2c_cfg);
668 i2c_register_board_info(0, jive_i2c_devs, ARRAY_SIZE(jive_i2c_devs));
670 pm_power_off = jive_power_off;
672 gpiod_add_lookup_table(&jive_lcdspi_gpiod_table);
673 gpiod_add_lookup_table(&jive_wm8750_gpiod_table);
674 platform_add_devices(jive_devices, ARRAY_SIZE(jive_devices));
677 MACHINE_START(JIVE, "JIVE")
678 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
679 .atag_offset = 0x100,
680 .nr_irqs = NR_IRQS_S3C2412,
681 .init_irq = s3c2412_init_irq,
682 .map_io = jive_map_io,
683 .init_machine = jive_machine_init,
684 .init_time = jive_init_time,