2 * linux/arch/arm/mach-realview/core.c
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/sysdev.h>
25 #include <linux/interrupt.h>
26 #include <linux/amba/bus.h>
27 #include <linux/amba/clcd.h>
29 #include <linux/smsc911x.h>
30 #include <linux/ata_platform.h>
31 #include <linux/amba/mmci.h>
32 #include <linux/gfp.h>
33 #include <linux/clkdev.h>
35 #include <asm/system.h>
36 #include <mach/hardware.h>
39 #include <asm/mach-types.h>
40 #include <asm/hardware/arm_timer.h>
41 #include <asm/hardware/icst.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/flash.h>
45 #include <asm/mach/irq.h>
46 #include <asm/mach/map.h>
48 #include <asm/hardware/gic.h>
50 #include <mach/platform.h>
51 #include <mach/irqs.h>
52 #include <plat/timer-sp.h>
56 /* used by entry-macro.S and platsmp.c */
57 void __iomem *gic_cpu_base_addr;
59 #ifdef CONFIG_ZONE_DMA
61 * Adjust the zones if there are restrictions for DMA access.
63 void __init realview_adjust_zones(unsigned long *size, unsigned long *hole)
65 unsigned long dma_size = SZ_256M >> PAGE_SHIFT;
67 if (!machine_is_realview_pbx() || size[0] <= dma_size)
70 size[ZONE_NORMAL] = size[0] - dma_size;
71 size[ZONE_DMA] = dma_size;
72 hole[ZONE_NORMAL] = hole[0];
78 #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
80 static int realview_flash_init(void)
84 val = __raw_readl(REALVIEW_FLASHCTRL);
85 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
86 __raw_writel(val, REALVIEW_FLASHCTRL);
91 static void realview_flash_exit(void)
95 val = __raw_readl(REALVIEW_FLASHCTRL);
96 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
97 __raw_writel(val, REALVIEW_FLASHCTRL);
100 static void realview_flash_set_vpp(int on)
104 val = __raw_readl(REALVIEW_FLASHCTRL);
106 val |= REALVIEW_FLASHPROG_FLVPPEN;
108 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
109 __raw_writel(val, REALVIEW_FLASHCTRL);
112 static struct flash_platform_data realview_flash_data = {
113 .map_name = "cfi_probe",
115 .init = realview_flash_init,
116 .exit = realview_flash_exit,
117 .set_vpp = realview_flash_set_vpp,
120 struct platform_device realview_flash_device = {
124 .platform_data = &realview_flash_data,
128 int realview_flash_register(struct resource *res, u32 num)
130 realview_flash_device.resource = res;
131 realview_flash_device.num_resources = num;
132 return platform_device_register(&realview_flash_device);
135 static struct smsc911x_platform_config smsc911x_config = {
136 .flags = SMSC911X_USE_32BIT,
137 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
138 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
139 .phy_interface = PHY_INTERFACE_MODE_MII,
142 static struct platform_device realview_eth_device = {
148 int realview_eth_register(const char *name, struct resource *res)
151 realview_eth_device.name = name;
152 realview_eth_device.resource = res;
153 if (strcmp(realview_eth_device.name, "smsc911x") == 0)
154 realview_eth_device.dev.platform_data = &smsc911x_config;
156 return platform_device_register(&realview_eth_device);
159 struct platform_device realview_usb_device = {
164 int realview_usb_register(struct resource *res)
166 realview_usb_device.resource = res;
167 return platform_device_register(&realview_usb_device);
170 static struct pata_platform_info pata_platform_data = {
174 static struct resource pata_resources[] = {
176 .start = REALVIEW_CF_BASE,
177 .end = REALVIEW_CF_BASE + 0xff,
178 .flags = IORESOURCE_MEM,
181 .start = REALVIEW_CF_BASE + 0x100,
182 .end = REALVIEW_CF_BASE + SZ_4K - 1,
183 .flags = IORESOURCE_MEM,
187 struct platform_device realview_cf_device = {
188 .name = "pata_platform",
190 .num_resources = ARRAY_SIZE(pata_resources),
191 .resource = pata_resources,
193 .platform_data = &pata_platform_data,
197 static struct resource realview_i2c_resource = {
198 .start = REALVIEW_I2C_BASE,
199 .end = REALVIEW_I2C_BASE + SZ_4K - 1,
200 .flags = IORESOURCE_MEM,
203 struct platform_device realview_i2c_device = {
204 .name = "versatile-i2c",
207 .resource = &realview_i2c_resource,
210 static struct i2c_board_info realview_i2c_board_info[] = {
212 I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
216 static int __init realview_i2c_init(void)
218 return i2c_register_board_info(0, realview_i2c_board_info,
219 ARRAY_SIZE(realview_i2c_board_info));
221 arch_initcall(realview_i2c_init);
223 #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
226 * This is only used if GPIOLIB support is disabled
228 static unsigned int realview_mmc_status(struct device *dev)
230 struct amba_device *adev = container_of(dev, struct amba_device, dev);
233 if (machine_is_realview_pb1176()) {
234 static bool inserted = false;
237 * The PB1176 does not have the status register,
238 * assume it is inserted at startup, then invert
239 * for each call so card insertion/removal will
240 * be detected anyway. This will not be called if
241 * GPIO on PL061 is active, which is the proper
242 * way to do this on the PB1176.
244 inserted = !inserted;
245 return inserted ? 0 : 1;
248 if (adev->res.start == REALVIEW_MMCI0_BASE)
253 return readl(REALVIEW_SYSMCI) & mask;
256 struct mmci_platform_data realview_mmc0_plat_data = {
257 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
258 .status = realview_mmc_status,
264 struct mmci_platform_data realview_mmc1_plat_data = {
265 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
266 .status = realview_mmc_status,
275 static const struct icst_params realview_oscvco_params = {
277 .vco_max = ICST307_VCO_MAX,
278 .vco_min = ICST307_VCO_MIN,
283 .s2div = icst307_s2div,
284 .idx2s = icst307_idx2s,
287 static void realview_oscvco_set(struct clk *clk, struct icst_vco vco)
289 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
292 val = readl(clk->vcoreg) & ~0x7ffff;
293 val |= vco.v | (vco.r << 9) | (vco.s << 16);
295 writel(0xa05f, sys_lock);
296 writel(val, clk->vcoreg);
300 static const struct clk_ops oscvco_clk_ops = {
301 .round = icst_clk_round,
303 .setvco = realview_oscvco_set,
306 static struct clk oscvco_clk = {
307 .ops = &oscvco_clk_ops,
308 .params = &realview_oscvco_params,
312 * These are fixed clocks.
314 static struct clk ref24_clk = {
318 static struct clk dummy_apb_pclk;
320 static struct clk_lookup lookups[] = {
322 .con_id = "apb_pclk",
323 .clk = &dummy_apb_pclk,
325 .dev_id = "dev:uart0",
328 .dev_id = "dev:uart1",
331 .dev_id = "dev:uart2",
334 .dev_id = "fpga:uart3",
336 }, { /* UART3 is on the dev chip in PB1176 */
337 .dev_id = "dev:uart3",
339 }, { /* UART4 only exists in PB1176 */
340 .dev_id = "fpga:uart4",
343 .dev_id = "fpga:kmi0",
346 .dev_id = "fpga:kmi1",
349 .dev_id = "fpga:mmc0",
351 }, { /* CLCD is in the PB1176 and EB DevChip */
352 .dev_id = "dev:clcd",
355 .dev_id = "issp:clcd",
358 .dev_id = "dev:ssp0",
363 static int __init clk_init(void)
365 if (machine_is_realview_pb1176())
366 oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
368 oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
370 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
374 core_initcall(clk_init);
379 #define SYS_CLCD_NLCDIOON (1 << 2)
380 #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
381 #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
382 #define SYS_CLCD_ID_MASK (0x1f << 8)
383 #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
384 #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
385 #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
386 #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
387 #define SYS_CLCD_ID_VGA (0x1f << 8)
389 static struct clcd_panel vga = {
403 .vmode = FB_VMODE_NONINTERLACED,
407 .tim2 = TIM2_BCD | TIM2_IPC,
408 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
412 static struct clcd_panel xvga = {
426 .vmode = FB_VMODE_NONINTERLACED,
430 .tim2 = TIM2_BCD | TIM2_IPC,
431 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
435 static struct clcd_panel sanyo_3_8_in = {
437 .name = "Sanyo QVGA",
449 .vmode = FB_VMODE_NONINTERLACED,
454 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
458 static struct clcd_panel sanyo_2_5_in = {
460 .name = "Sanyo QVGA Portrait",
471 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
472 .vmode = FB_VMODE_NONINTERLACED,
476 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
477 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
481 static struct clcd_panel epson_2_2_in = {
483 .name = "Epson QCIF",
495 .vmode = FB_VMODE_NONINTERLACED,
499 .tim2 = TIM2_BCD | TIM2_IPC,
500 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
505 * Detect which LCD panel is connected, and return the appropriate
506 * clcd_panel structure. Note: we do not have any information on
507 * the required timings for the 8.4in panel, so we presently assume
510 static struct clcd_panel *realview_clcd_panel(void)
512 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
513 struct clcd_panel *vga_panel;
514 struct clcd_panel *panel;
517 if (machine_is_realview_eb())
522 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
523 if (val == SYS_CLCD_ID_SANYO_3_8)
524 panel = &sanyo_3_8_in;
525 else if (val == SYS_CLCD_ID_SANYO_2_5)
526 panel = &sanyo_2_5_in;
527 else if (val == SYS_CLCD_ID_EPSON_2_2)
528 panel = &epson_2_2_in;
529 else if (val == SYS_CLCD_ID_VGA)
532 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
541 * Disable all display connectors on the interface module.
543 static void realview_clcd_disable(struct clcd_fb *fb)
545 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
548 val = readl(sys_clcd);
549 val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
550 writel(val, sys_clcd);
554 * Enable the relevant connector on the interface module.
556 static void realview_clcd_enable(struct clcd_fb *fb)
558 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
564 val = readl(sys_clcd);
565 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
566 writel(val, sys_clcd);
569 static int realview_clcd_setup(struct clcd_fb *fb)
571 unsigned long framesize;
574 if (machine_is_realview_eb())
576 framesize = 640 * 480 * 2;
579 framesize = 1024 * 768 * 2;
581 fb->panel = realview_clcd_panel();
583 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
584 &dma, GFP_KERNEL | GFP_DMA);
585 if (!fb->fb.screen_base) {
586 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
590 fb->fb.fix.smem_start = dma;
591 fb->fb.fix.smem_len = framesize;
596 static int realview_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
598 return dma_mmap_writecombine(&fb->dev->dev, vma,
600 fb->fb.fix.smem_start,
601 fb->fb.fix.smem_len);
604 static void realview_clcd_remove(struct clcd_fb *fb)
606 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
607 fb->fb.screen_base, fb->fb.fix.smem_start);
610 struct clcd_board clcd_plat_data = {
612 .check = clcdfb_check,
613 .decode = clcdfb_decode,
614 .disable = realview_clcd_disable,
615 .enable = realview_clcd_enable,
616 .setup = realview_clcd_setup,
617 .mmap = realview_clcd_mmap,
618 .remove = realview_clcd_remove,
622 #define VA_LEDS_BASE (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
624 void realview_leds_event(led_event_t ledevt)
628 u32 led = 1 << smp_processor_id();
630 local_irq_save(flags);
631 val = readl(VA_LEDS_BASE);
643 val = val ^ REALVIEW_SYS_LED7;
654 writel(val, VA_LEDS_BASE);
655 local_irq_restore(flags);
657 #endif /* CONFIG_LEDS */
660 * Where is the timer (VA)?
662 void __iomem *timer0_va_base;
663 void __iomem *timer1_va_base;
664 void __iomem *timer2_va_base;
665 void __iomem *timer3_va_base;
668 * Set up the clock source and clock events devices
670 void __init realview_timer_init(unsigned int timer_irq)
675 * set clock frequency:
676 * REALVIEW_REFCLK is 32KHz
677 * REALVIEW_TIMCLK is 1MHz
679 val = readl(__io_address(REALVIEW_SCTL_BASE));
680 writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
681 (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
682 (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
683 (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
684 __io_address(REALVIEW_SCTL_BASE));
687 * Initialise to a known state (all timers off)
689 writel(0, timer0_va_base + TIMER_CTRL);
690 writel(0, timer1_va_base + TIMER_CTRL);
691 writel(0, timer2_va_base + TIMER_CTRL);
692 writel(0, timer3_va_base + TIMER_CTRL);
694 sp804_clocksource_init(timer3_va_base);
695 sp804_clockevents_init(timer0_va_base, timer_irq);
699 * Setup the memory banks.
701 void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from,
702 struct meminfo *meminfo)
705 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
706 * Half of this is mirrored at 0.
708 #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
709 meminfo->bank[0].start = 0x70000000;
710 meminfo->bank[0].size = SZ_512M;
711 meminfo->nr_banks = 1;
713 meminfo->bank[0].start = 0;
714 meminfo->bank[0].size = SZ_256M;
715 meminfo->nr_banks = 1;