2 * plat smp support for CSR Marco dual-core SMP SoCs
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 #include <linux/init.h>
10 #include <linux/smp.h>
11 #include <linux/delay.h>
13 #include <linux/of_address.h>
15 #include <asm/mach/map.h>
16 #include <asm/smp_plat.h>
17 #include <asm/smp_scu.h>
18 #include <asm/cacheflush.h>
19 #include <asm/cputype.h>
23 static void __iomem *clk_base;
25 static DEFINE_SPINLOCK(boot_lock);
27 /* XXX prima2_pen_release is cargo culted code - DO NOT COPY XXX */
28 volatile int prima2_pen_release = -1;
30 static void sirfsoc_secondary_init(unsigned int cpu)
33 * let the primary processor know we're out of the
34 * pen, then head off into the C entry point
36 prima2_pen_release = -1;
40 * Synchronise with the boot thread.
42 spin_lock(&boot_lock);
43 spin_unlock(&boot_lock);
46 static const struct of_device_id clk_ids[] = {
47 { .compatible = "sirf,atlas7-clkc" },
51 static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
53 unsigned long timeout;
54 struct device_node *np;
56 np = of_find_matching_node(NULL, clk_ids);
60 clk_base = of_iomap(np, 0);
65 * write the address of secondary startup into the clkc register
66 * at offset 0x2bC, then write the magic number 0x3CAF5D62 to the
67 * clkc register at offset 0x2b8, which is what boot rom code is
68 * waiting for. This would wake up the secondary core from WFE
70 #define SIRFSOC_CPU1_JUMPADDR_OFFSET 0x2bc
71 __raw_writel(__pa_symbol(sirfsoc_secondary_startup),
72 clk_base + SIRFSOC_CPU1_JUMPADDR_OFFSET);
74 #define SIRFSOC_CPU1_WAKEMAGIC_OFFSET 0x2b8
75 __raw_writel(0x3CAF5D62,
76 clk_base + SIRFSOC_CPU1_WAKEMAGIC_OFFSET);
78 /* make sure write buffer is drained */
81 spin_lock(&boot_lock);
84 * The secondary processor is waiting to be released from
85 * the holding pen - release it, then wait for it to flag
86 * that it has been released by resetting prima2_pen_release.
88 * Note that "prima2_pen_release" is the hardware CPU ID, whereas
89 * "cpu" is Linux's internal ID.
91 prima2_pen_release = cpu_logical_map(cpu);
92 sync_cache_w(&prima2_pen_release);
95 * Send the secondary CPU SEV, thereby causing the boot monitor to read
96 * the JUMPADDR and WAKEMAGIC, and branch to the address found there.
100 timeout = jiffies + (1 * HZ);
101 while (time_before(jiffies, timeout)) {
103 if (prima2_pen_release == -1)
110 * now the secondary core is starting up let it run its
111 * calibrations, then wait for it to finish
113 spin_unlock(&boot_lock);
115 return prima2_pen_release != -1 ? -ENOSYS : 0;
118 const struct smp_operations sirfsoc_smp_ops __initconst = {
119 .smp_secondary_init = sirfsoc_secondary_init,
120 .smp_boot_secondary = sirfsoc_boot_secondary,
121 #ifdef CONFIG_HOTPLUG_CPU
122 .cpu_die = sirfsoc_cpu_die,