2 * Interface for functions that need to be run in internal SRAM
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #include <plat/sram.h>
12 extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
13 u32 base_cs, u32 force_unlock);
14 extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
16 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
18 extern u32 omap3_configure_core_dpll(
19 u32 m2, u32 unlock_dll, u32 f, u32 inc,
20 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
21 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
22 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
23 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
24 extern void omap3_sram_restore_context(void);
26 /* Do not use these */
27 extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
28 extern unsigned long omap24xx_sram_reprogram_clock_sz;
30 extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
31 u32 base_cs, u32 force_unlock);
32 extern unsigned long omap242x_sram_ddr_init_sz;
34 extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
36 extern unsigned long omap242x_sram_set_prcm_sz;
38 extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
40 extern unsigned long omap242x_sram_reprogram_sdrc_sz;
43 extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
44 u32 base_cs, u32 force_unlock);
45 extern unsigned long omap243x_sram_ddr_init_sz;
47 extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
49 extern unsigned long omap243x_sram_set_prcm_sz;
51 extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
53 extern unsigned long omap243x_sram_reprogram_sdrc_sz;
55 extern u32 omap3_sram_configure_core_dpll(
56 u32 m2, u32 unlock_dll, u32 f, u32 inc,
57 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
58 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
59 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
60 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
61 extern unsigned long omap3_sram_configure_core_dpll_sz;
64 extern void omap_push_sram_idle(void);
66 static inline void omap_push_sram_idle(void) {}
67 #endif /* CONFIG_PM */
69 #endif /* __ASSEMBLY__ */
72 * OMAP2+: define the SRAM PA addresses.
73 * Used by the SRAM management code and the idle sleep code.
75 #define OMAP2_SRAM_PA 0x40200000
76 #define OMAP3_SRAM_PA 0x40200000
77 #ifdef CONFIG_OMAP4_ERRATA_I688
78 #define OMAP4_SRAM_PA 0x40304000
79 #define OMAP4_SRAM_VA 0xfe404000
81 #define OMAP4_SRAM_PA 0x40300000
83 #define AM33XX_SRAM_PA 0x40300000