2 * OMAP and TWL PMIC specific intializations.
4 * Copyright (C) 2010 Texas Instruments Incorporated.
6 * Copyright (C) 2009 Texas Instruments Incorporated.
8 * Copyright (C) 2009 Nokia Corporation
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/err.h>
18 #include <linux/kernel.h>
19 #include <linux/i2c/twl.h>
21 #include <plat/voltage.h>
25 #define OMAP3_SRI2C_SLAVE_ADDR 0x12
26 #define OMAP3_VDD_MPU_SR_CONTROL_REG 0x00
27 #define OMAP3_VDD_CORE_SR_CONTROL_REG 0x01
28 #define OMAP3_VP_CONFIG_ERROROFFSET 0x00
29 #define OMAP3_VP_VSTEPMIN_VSTEPMIN 0x1
30 #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04
31 #define OMAP3_VP_VLIMITTO_TIMEOUT_US 200
33 #define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14
34 #define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42
35 #define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18
36 #define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c
38 #define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18
39 #define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3c
40 #define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18
41 #define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30
43 #define OMAP4_SRI2C_SLAVE_ADDR 0x12
44 #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55
45 #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B
46 #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61
48 #define OMAP4_VP_CONFIG_ERROROFFSET 0x00
49 #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01
50 #define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04
51 #define OMAP4_VP_VLIMITTO_TIMEOUT_US 200
53 #define OMAP4_VP_MPU_VLIMITTO_VDDMIN 0xA
54 #define OMAP4_VP_MPU_VLIMITTO_VDDMAX 0x39
55 #define OMAP4_VP_IVA_VLIMITTO_VDDMIN 0xA
56 #define OMAP4_VP_IVA_VLIMITTO_VDDMAX 0x2D
57 #define OMAP4_VP_CORE_VLIMITTO_VDDMIN 0xA
58 #define OMAP4_VP_CORE_VLIMITTO_VDDMAX 0x28
60 static bool is_offset_valid;
61 static u8 smps_offset;
63 #define REG_SMPS_OFFSET 0xE0
65 static unsigned long twl4030_vsel_to_uv(const u8 vsel)
67 return (((vsel * 125) + 6000)) * 100;
70 static u8 twl4030_uv_to_vsel(unsigned long uv)
72 return DIV_ROUND_UP(uv - 600000, 12500);
75 static unsigned long twl6030_vsel_to_uv(const u8 vsel)
78 * In TWL6030 depending on the value of SMPS_OFFSET
79 * efuse register the voltage range supported in
80 * standard mode can be either between 0.6V - 1.3V or
81 * 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse
82 * is programmed to all 0's where as starting from
83 * TWL6030 ES1.1 the efuse is programmed to 1
85 if (!is_offset_valid) {
86 twl_i2c_read_u8(TWL6030_MODULE_ID0, &smps_offset,
88 is_offset_valid = true;
92 * There is no specific formula for voltage to vsel
93 * conversion above 1.3V. There are special hardcoded
94 * values for voltages above 1.3V. Currently we are
95 * hardcoding only for 1.35 V which is used for 1GH OPP for
101 if (smps_offset & 0x8)
102 return ((((vsel - 1) * 125) + 7000)) * 100;
104 return ((((vsel - 1) * 125) + 6000)) * 100;
107 static u8 twl6030_uv_to_vsel(unsigned long uv)
110 * In TWL6030 depending on the value of SMPS_OFFSET
111 * efuse register the voltage range supported in
112 * standard mode can be either between 0.6V - 1.3V or
113 * 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse
114 * is programmed to all 0's where as starting from
115 * TWL6030 ES1.1 the efuse is programmed to 1
117 if (!is_offset_valid) {
118 twl_i2c_read_u8(TWL6030_MODULE_ID0, &smps_offset,
120 is_offset_valid = true;
124 * There is no specific formula for voltage to vsel
125 * conversion above 1.3V. There are special hardcoded
126 * values for voltages above 1.3V. Currently we are
127 * hardcoding only for 1.35 V which is used for 1GH OPP for
133 if (smps_offset & 0x8)
134 return DIV_ROUND_UP(uv - 700000, 12500) + 1;
136 return DIV_ROUND_UP(uv - 600000, 12500) + 1;
139 static struct omap_volt_pmic_info omap3_mpu_volt_info = {
143 .onlp_volt = 1000000,
146 .volt_setup_time = 0xfff,
147 .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
148 .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN,
149 .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX,
150 .vp_vddmin = OMAP3430_VP1_VLIMITTO_VDDMIN,
151 .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX,
152 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
153 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
154 .pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG,
155 .vsel_to_uv = twl4030_vsel_to_uv,
156 .uv_to_vsel = twl4030_uv_to_vsel,
159 static struct omap_volt_pmic_info omap3_core_volt_info = {
163 .onlp_volt = 1000000,
166 .volt_setup_time = 0xfff,
167 .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
168 .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN,
169 .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX,
170 .vp_vddmin = OMAP3430_VP2_VLIMITTO_VDDMIN,
171 .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX,
172 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
173 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
174 .pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG,
175 .vsel_to_uv = twl4030_vsel_to_uv,
176 .uv_to_vsel = twl4030_uv_to_vsel,
179 static struct omap_volt_pmic_info omap4_mpu_volt_info = {
183 .onlp_volt = 1350000,
186 .volt_setup_time = 0,
187 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
188 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
189 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
190 .vp_vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN,
191 .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX,
192 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
193 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
194 .pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG,
195 .vsel_to_uv = twl6030_vsel_to_uv,
196 .uv_to_vsel = twl6030_uv_to_vsel,
199 static struct omap_volt_pmic_info omap4_iva_volt_info = {
203 .onlp_volt = 1100000,
206 .volt_setup_time = 0,
207 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
208 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
209 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
210 .vp_vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN,
211 .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX,
212 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
213 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
214 .pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG,
215 .vsel_to_uv = twl6030_vsel_to_uv,
216 .uv_to_vsel = twl6030_uv_to_vsel,
219 static struct omap_volt_pmic_info omap4_core_volt_info = {
223 .onlp_volt = 1100000,
226 .volt_setup_time = 0,
227 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
228 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
229 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
230 .vp_vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN,
231 .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX,
232 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
233 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
234 .pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG,
235 .vsel_to_uv = twl6030_vsel_to_uv,
236 .uv_to_vsel = twl6030_uv_to_vsel,
239 int __init omap4_twl_init(void)
241 struct voltagedomain *voltdm;
243 if (!cpu_is_omap44xx())
246 voltdm = omap_voltage_domain_lookup("mpu");
247 omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info);
249 voltdm = omap_voltage_domain_lookup("iva");
250 omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info);
252 voltdm = omap_voltage_domain_lookup("core");
253 omap_voltage_register_pmic(voltdm, &omap4_core_volt_info);
258 int __init omap3_twl_init(void)
260 struct voltagedomain *voltdm;
262 if (!cpu_is_omap34xx())
265 if (cpu_is_omap3630()) {
266 omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
267 omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
268 omap3_core_volt_info.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
269 omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
272 voltdm = omap_voltage_domain_lookup("mpu");
273 omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info);
275 voltdm = omap_voltage_domain_lookup("core");
276 omap_voltage_register_pmic(voltdm, &omap3_core_volt_info);