1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod implementation for OMAP2/3/4
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
8 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
10 * Created in collaboration with (alphabetical order): Thara Gopinath,
11 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
12 * Sawant, Santosh Shilimkar, Richard Woodruff
16 * One way to view an OMAP SoC is as a collection of largely unrelated
17 * IP blocks connected by interconnects. The IP blocks include
18 * devices such as ARM processors, audio serial interfaces, UARTs,
19 * etc. Some of these devices, like the DSP, are created by TI;
20 * others, like the SGX, largely originate from external vendors. In
21 * TI's documentation, on-chip devices are referred to as "OMAP
22 * modules." Some of these IP blocks are identical across several
23 * OMAP versions. Others are revised frequently.
25 * These OMAP modules are tied together by various interconnects.
26 * Most of the address and data flow between modules is via OCP-based
27 * interconnects such as the L3 and L4 buses; but there are other
28 * interconnects that distribute the hardware clock tree, handle idle
29 * and reset signaling, supply power, and connect the modules to
30 * various pads or balls on the OMAP package.
32 * OMAP hwmod provides a consistent way to describe the on-chip
33 * hardware blocks and their integration into the rest of the chip.
34 * This description can be automatically generated from the TI
35 * hardware database. OMAP hwmod provides a standard, consistent API
36 * to reset, enable, idle, and disable these hardware blocks. And
37 * hwmod provides a way for other core code, such as the Linux device
38 * code or the OMAP power management and address space mapping code,
39 * to query the hardware database.
43 * Drivers won't call hwmod functions directly. That is done by the
44 * omap_device code, and in rare occasions, by custom integration code
45 * in arch/arm/ *omap*. The omap_device code includes functions to
46 * build a struct platform_device using omap_hwmod data, and that is
47 * currently how hwmod data is communicated to drivers and to the
48 * Linux driver model. Most drivers will call omap_hwmod functions only
49 * indirectly, via pm_runtime*() functions.
51 * From a layering perspective, here is where the OMAP hwmod code
52 * fits into the kernel software stack:
54 * +-------------------------------+
55 * | Device driver code |
56 * | (e.g., drivers/) |
57 * +-------------------------------+
58 * | Linux driver model |
59 * | (platform_device / |
60 * | platform_driver data/code) |
61 * +-------------------------------+
62 * | OMAP core-driver integration |
63 * |(arch/arm/mach-omap2/devices.c)|
64 * +-------------------------------+
65 * | omap_device code |
66 * | (../plat-omap/omap_device.c) |
67 * +-------------------------------+
68 * ----> | omap_hwmod code/data | <-----
69 * | (../mach-omap2/omap_hwmod*) |
70 * +-------------------------------+
71 * | OMAP clock/PRCM/register fns |
72 * | ({read,write}l_relaxed, clk*) |
73 * +-------------------------------+
75 * Device drivers should not contain any OMAP-specific code or data in
76 * them. They should only contain code to operate the IP block that
77 * the driver is responsible for. This is because these IP blocks can
78 * also appear in other SoCs, either from TI (such as DaVinci) or from
79 * other manufacturers; and drivers should be reusable across other
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
83 * devices upon boot. The goal here is for the kernel to be
84 * completely self-reliant and independent from bootloaders. This is
85 * to ensure a repeatable configuration, both to ensure consistent
86 * runtime behavior, and to make it easier for others to reproduce
89 * OMAP module activity states
90 * ---------------------------
91 * The hwmod code considers modules to be in one of several activity
92 * states. IP blocks start out in an UNKNOWN state, then once they
93 * are registered via the hwmod code, proceed to the REGISTERED state.
94 * Once their clock names are resolved to clock pointers, the module
95 * enters the CLKS_INITED state; and finally, once the module has been
96 * reset and the integration registers programmed, the INITIALIZED state
97 * is entered. The hwmod code will then place the module into either
98 * the IDLE state to save power, or in the case of a critical system
99 * module, the ENABLED state.
101 * OMAP core integration code can then call omap_hwmod*() functions
102 * directly to move the module between the IDLE, ENABLED, and DISABLED
103 * states, as needed. This is done during both the PM idle loop, and
104 * in the OMAP core integration code's implementation of the PM runtime
109 * This is a partial list.
110 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
111 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
112 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
113 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
114 * - Open Core Protocol Specification 2.2
117 * - handle IO mapping
118 * - bus throughput & module latency measurement code
120 * XXX add tests at the beginning of each function to ensure the hwmod is
121 * in the appropriate state
122 * XXX error return values should be checked to ensure that they are
127 #include <linux/kernel.h>
128 #include <linux/errno.h>
129 #include <linux/io.h>
130 #include <linux/clk.h>
131 #include <linux/clk-provider.h>
132 #include <linux/delay.h>
133 #include <linux/err.h>
134 #include <linux/list.h>
135 #include <linux/mutex.h>
136 #include <linux/spinlock.h>
137 #include <linux/slab.h>
138 #include <linux/cpu.h>
139 #include <linux/of.h>
140 #include <linux/of_address.h>
141 #include <linux/memblock.h>
143 #include <linux/platform_data/ti-sysc.h>
145 #include <dt-bindings/bus/ti-sysc.h>
147 #include <asm/system_misc.h>
150 #include "omap_hwmod.h"
154 #include "clockdomain.h"
157 #include "powerdomain.h"
165 #include "prminst44xx.h"
167 #include "wd_timer.h"
169 /* Name of the OMAP hwmod for the MPU */
170 #define MPU_INITIATOR_NAME "mpu"
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
176 #define LINKS_PER_OCP_IF 2
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
182 #define OMAP4_RST_CTRL_ST_OFFSET 4
185 * Maximum length for module clock handle names
187 #define MOD_CLK_MAX_NAME_LEN 32
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
197 struct clkctrl_provider {
201 struct device_node *node;
202 struct list_head link;
205 static LIST_HEAD(clkctrl_providers);
208 * struct omap_hwmod_reset - IP specific reset functions
209 * @match: string to match against the module name
210 * @len: number of characters to match
211 * @reset: IP specific reset function
213 * Used only in cases where struct omap_hwmod is dynamically allocated.
215 struct omap_hwmod_reset {
218 int (*reset)(struct omap_hwmod *oh);
222 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
223 * @enable_module: function to enable a module (via MODULEMODE)
224 * @disable_module: function to disable a module (via MODULEMODE)
226 * XXX Eventually this functionality will be hidden inside the PRM/CM
227 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
228 * conditionals in this code.
230 struct omap_hwmod_soc_ops {
231 void (*enable_module)(struct omap_hwmod *oh);
232 int (*disable_module)(struct omap_hwmod *oh);
233 int (*wait_target_ready)(struct omap_hwmod *oh);
234 int (*assert_hardreset)(struct omap_hwmod *oh,
235 struct omap_hwmod_rst_info *ohri);
236 int (*deassert_hardreset)(struct omap_hwmod *oh,
237 struct omap_hwmod_rst_info *ohri);
238 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
239 struct omap_hwmod_rst_info *ohri);
240 int (*init_clkdm)(struct omap_hwmod *oh);
241 void (*update_context_lost)(struct omap_hwmod *oh);
242 int (*get_context_lost)(struct omap_hwmod *oh);
243 int (*disable_direct_prcm)(struct omap_hwmod *oh);
244 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
247 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
248 static struct omap_hwmod_soc_ops soc_ops;
250 /* omap_hwmod_list contains all registered struct omap_hwmods */
251 static LIST_HEAD(omap_hwmod_list);
252 static DEFINE_MUTEX(list_lock);
254 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
255 static struct omap_hwmod *mpu_oh;
257 /* inited: set to true once the hwmod code is initialized */
260 /* Private functions */
263 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
264 * @oh: struct omap_hwmod *
266 * Load the current value of the hwmod OCP_SYSCONFIG register into the
267 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
268 * OCP_SYSCONFIG register or 0 upon success.
270 static int _update_sysc_cache(struct omap_hwmod *oh)
272 if (!oh->class->sysc) {
273 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
277 /* XXX ensure module interface clock is up */
279 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
281 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
282 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
288 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
289 * @v: OCP_SYSCONFIG value to write
290 * @oh: struct omap_hwmod *
292 * Write @v into the module class' OCP_SYSCONFIG register, if it has
293 * one. No return value.
295 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
297 if (!oh->class->sysc) {
298 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
302 /* XXX ensure module interface clock is up */
304 /* Module might have lost context, always update cache and register */
308 * Some IP blocks (such as RTC) require unlocking of IP before
309 * accessing its registers. If a function pointer is present
310 * to unlock, then call it before accessing sysconfig and
311 * call lock after writing sysconfig.
313 if (oh->class->unlock)
314 oh->class->unlock(oh);
316 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
323 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
324 * @oh: struct omap_hwmod *
325 * @standbymode: MIDLEMODE field bits
326 * @v: pointer to register contents to modify
328 * Update the master standby mode bits in @v to be @standbymode for
329 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
330 * upon error or 0 upon success.
332 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
338 if (!oh->class->sysc ||
339 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
342 if (!oh->class->sysc->sysc_fields) {
343 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
347 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
348 mstandby_mask = (0x3 << mstandby_shift);
350 *v &= ~mstandby_mask;
351 *v |= __ffs(standbymode) << mstandby_shift;
357 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
358 * @oh: struct omap_hwmod *
359 * @idlemode: SIDLEMODE field bits
360 * @v: pointer to register contents to modify
362 * Update the slave idle mode bits in @v to be @idlemode for the @oh
363 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
366 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
371 if (!oh->class->sysc ||
372 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
375 if (!oh->class->sysc->sysc_fields) {
376 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
380 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
381 sidle_mask = (0x3 << sidle_shift);
384 *v |= __ffs(idlemode) << sidle_shift;
390 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
391 * @oh: struct omap_hwmod *
392 * @clockact: CLOCKACTIVITY field bits
393 * @v: pointer to register contents to modify
395 * Update the clockactivity mode bits in @v to be @clockact for the
396 * @oh hwmod. Used for additional powersaving on some modules. Does
397 * not write to the hardware. Returns -EINVAL upon error or 0 upon
400 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
405 if (!oh->class->sysc ||
406 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
409 if (!oh->class->sysc->sysc_fields) {
410 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
414 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
415 clkact_mask = (0x3 << clkact_shift);
418 *v |= clockact << clkact_shift;
424 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
425 * @oh: struct omap_hwmod *
426 * @v: pointer to register contents to modify
428 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
429 * error or 0 upon success.
431 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
435 if (!oh->class->sysc ||
436 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
439 if (!oh->class->sysc->sysc_fields) {
440 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
444 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
452 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
453 * @oh: struct omap_hwmod *
454 * @v: pointer to register contents to modify
456 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
457 * error or 0 upon success.
459 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
463 if (!oh->class->sysc ||
464 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
467 if (!oh->class->sysc->sysc_fields) {
469 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
474 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
482 * _wait_softreset_complete - wait for an OCP softreset to complete
483 * @oh: struct omap_hwmod * to wait on
485 * Wait until the IP block represented by @oh reports that its OCP
486 * softreset is complete. This can be triggered by software (see
487 * _ocp_softreset()) or by hardware upon returning from off-mode (one
488 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
489 * microseconds. Returns the number of microseconds waited.
491 static int _wait_softreset_complete(struct omap_hwmod *oh)
493 struct omap_hwmod_class_sysconfig *sysc;
497 sysc = oh->class->sysc;
499 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
500 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
501 & SYSS_RESETDONE_MASK),
502 MAX_MODULE_SOFTRESET_WAIT, c);
503 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
504 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
505 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
507 MAX_MODULE_SOFTRESET_WAIT, c);
514 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
515 * @oh: struct omap_hwmod *
517 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
518 * of some modules. When the DMA must perform read/write accesses, the
519 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
520 * for power management, software must set the DMADISABLE bit back to 1.
522 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
523 * error or 0 upon success.
525 static int _set_dmadisable(struct omap_hwmod *oh)
530 if (!oh->class->sysc ||
531 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
534 if (!oh->class->sysc->sysc_fields) {
535 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
539 /* clocks must be on for this operation */
540 if (oh->_state != _HWMOD_STATE_ENABLED) {
541 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
545 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
549 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
550 v |= dmadisable_mask;
551 _write_sysconfig(v, oh);
557 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
558 * @oh: struct omap_hwmod *
559 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
560 * @v: pointer to register contents to modify
562 * Update the module autoidle bit in @v to be @autoidle for the @oh
563 * hwmod. The autoidle bit controls whether the module can gate
564 * internal clocks automatically when it isn't doing anything; the
565 * exact function of this bit varies on a per-module basis. This
566 * function does not write to the hardware. Returns -EINVAL upon
567 * error or 0 upon success.
569 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
575 if (!oh->class->sysc ||
576 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
579 if (!oh->class->sysc->sysc_fields) {
580 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
584 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
585 autoidle_mask = (0x1 << autoidle_shift);
587 *v &= ~autoidle_mask;
588 *v |= autoidle << autoidle_shift;
594 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
595 * @oh: struct omap_hwmod *
597 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
598 * upon error or 0 upon success.
600 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
602 if (!oh->class->sysc ||
603 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
604 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
605 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
608 if (!oh->class->sysc->sysc_fields) {
609 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
613 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
614 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
616 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
617 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
618 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
619 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
621 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
627 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
628 * @oh: struct omap_hwmod *
630 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
631 * upon error or 0 upon success.
633 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
635 if (!oh->class->sysc ||
636 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
637 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
638 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
641 if (!oh->class->sysc->sysc_fields) {
642 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
646 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
647 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
649 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
650 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
651 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
652 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
654 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
659 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
661 struct clk_hw_omap *clk;
665 } else if (oh->_clk) {
666 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
668 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
675 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
676 * @oh: struct omap_hwmod *
678 * Prevent the hardware module @oh from entering idle while the
679 * hardare module initiator @init_oh is active. Useful when a module
680 * will be accessed by a particular initiator (e.g., if a module will
681 * be accessed by the IVA, there should be a sleepdep between the IVA
682 * initiator and the module). Only applies to modules in smart-idle
683 * mode. If the clockdomain is marked as not needing autodeps, return
684 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
685 * passes along clkdm_add_sleepdep() value upon success.
687 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
689 struct clockdomain *clkdm, *init_clkdm;
691 clkdm = _get_clkdm(oh);
692 init_clkdm = _get_clkdm(init_oh);
694 if (!clkdm || !init_clkdm)
697 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
700 return clkdm_add_sleepdep(clkdm, init_clkdm);
704 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
705 * @oh: struct omap_hwmod *
707 * Allow the hardware module @oh to enter idle while the hardare
708 * module initiator @init_oh is active. Useful when a module will not
709 * be accessed by a particular initiator (e.g., if a module will not
710 * be accessed by the IVA, there should be no sleepdep between the IVA
711 * initiator and the module). Only applies to modules in smart-idle
712 * mode. If the clockdomain is marked as not needing autodeps, return
713 * 0 without doing anything. Returns -EINVAL upon error or passes
714 * along clkdm_del_sleepdep() value upon success.
716 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
718 struct clockdomain *clkdm, *init_clkdm;
720 clkdm = _get_clkdm(oh);
721 init_clkdm = _get_clkdm(init_oh);
723 if (!clkdm || !init_clkdm)
726 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
729 return clkdm_del_sleepdep(clkdm, init_clkdm);
732 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
733 { .compatible = "ti,clkctrl" },
737 static int __init _setup_clkctrl_provider(struct device_node *np)
740 struct clkctrl_provider *provider;
744 provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
750 provider->num_addrs =
751 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
754 memblock_alloc(sizeof(void *) * provider->num_addrs,
760 memblock_alloc(sizeof(u32) * provider->num_addrs,
765 for (i = 0; i < provider->num_addrs; i++) {
766 addrp = of_get_address(np, i, &size, NULL);
767 provider->addr[i] = (u32)of_translate_address(np, addrp);
768 provider->size[i] = size;
769 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
770 provider->addr[i] + provider->size[i]);
773 list_add(&provider->link, &clkctrl_providers);
778 static int __init _init_clkctrl_providers(void)
780 struct device_node *np;
783 for_each_matching_node(np, ti_clkctrl_match_table) {
784 ret = _setup_clkctrl_provider(np);
792 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
794 if (!oh->prcm.omap4.modulemode)
797 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
799 oh->prcm.omap4.clkctrl_offs);
802 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
804 struct clkctrl_provider *provider;
808 if (!soc_ops.xlate_clkctrl)
811 addr = soc_ops.xlate_clkctrl(oh);
815 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
817 list_for_each_entry(provider, &clkctrl_providers, link) {
820 for (i = 0; i < provider->num_addrs; i++) {
821 if (provider->addr[i] <= addr &&
822 provider->addr[i] + provider->size[i] > addr) {
823 struct of_phandle_args clkspec;
825 clkspec.np = provider->node;
826 clkspec.args_count = 2;
827 clkspec.args[0] = addr - provider->addr[0];
830 clk = of_clk_get_from_provider(&clkspec);
832 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
833 __func__, oh->name, clk,
834 clkspec.args[0], provider->node);
845 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
846 * @oh: struct omap_hwmod *
848 * Called from _init_clocks(). Populates the @oh _clk (main
849 * functional clock pointer) if a clock matching the hwmod name is found,
850 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
852 static int _init_main_clk(struct omap_hwmod *oh)
855 struct clk *clk = NULL;
857 clk = _lookup_clkctrl_clk(oh);
859 if (!IS_ERR_OR_NULL(clk)) {
860 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
861 __clk_get_name(clk), oh->name);
862 oh->main_clk = __clk_get_name(clk);
864 soc_ops.disable_direct_prcm(oh);
869 oh->_clk = clk_get(NULL, oh->main_clk);
872 if (IS_ERR(oh->_clk)) {
873 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
874 oh->name, oh->main_clk);
878 * HACK: This needs a re-visit once clk_prepare() is implemented
879 * to do something meaningful. Today its just a no-op.
880 * If clk_prepare() is used at some point to do things like
881 * voltage scaling etc, then this would have to be moved to
882 * some point where subsystems like i2c and pmic become
885 clk_prepare(oh->_clk);
888 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
889 oh->name, oh->main_clk);
895 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
896 * @oh: struct omap_hwmod *
898 * Called from _init_clocks(). Populates the @oh OCP slave interface
899 * clock pointers. Returns 0 on success or -EINVAL on error.
901 static int _init_interface_clks(struct omap_hwmod *oh)
903 struct omap_hwmod_ocp_if *os;
907 list_for_each_entry(os, &oh->slave_ports, node) {
911 c = clk_get(NULL, os->clk);
913 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
920 * HACK: This needs a re-visit once clk_prepare() is implemented
921 * to do something meaningful. Today its just a no-op.
922 * If clk_prepare() is used at some point to do things like
923 * voltage scaling etc, then this would have to be moved to
924 * some point where subsystems like i2c and pmic become
927 clk_prepare(os->_clk);
934 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
935 * @oh: struct omap_hwmod *
937 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
938 * clock pointers. Returns 0 on success or -EINVAL on error.
940 static int _init_opt_clks(struct omap_hwmod *oh)
942 struct omap_hwmod_opt_clk *oc;
947 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
948 c = clk_get(NULL, oc->clk);
950 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
957 * HACK: This needs a re-visit once clk_prepare() is implemented
958 * to do something meaningful. Today its just a no-op.
959 * If clk_prepare() is used at some point to do things like
960 * voltage scaling etc, then this would have to be moved to
961 * some point where subsystems like i2c and pmic become
964 clk_prepare(oc->_clk);
970 static void _enable_optional_clocks(struct omap_hwmod *oh)
972 struct omap_hwmod_opt_clk *oc;
975 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
977 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
979 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
980 __clk_get_name(oc->_clk));
981 clk_enable(oc->_clk);
985 static void _disable_optional_clocks(struct omap_hwmod *oh)
987 struct omap_hwmod_opt_clk *oc;
990 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
992 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
994 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
995 __clk_get_name(oc->_clk));
996 clk_disable(oc->_clk);
1001 * _enable_clocks - enable hwmod main clock and interface clocks
1002 * @oh: struct omap_hwmod *
1004 * Enables all clocks necessary for register reads and writes to succeed
1005 * on the hwmod @oh. Returns 0.
1007 static int _enable_clocks(struct omap_hwmod *oh)
1009 struct omap_hwmod_ocp_if *os;
1011 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
1013 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1014 _enable_optional_clocks(oh);
1017 clk_enable(oh->_clk);
1019 list_for_each_entry(os, &oh->slave_ports, node) {
1020 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1021 omap2_clk_deny_idle(os->_clk);
1022 clk_enable(os->_clk);
1026 /* The opt clocks are controlled by the device driver. */
1032 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1033 * @oh: struct omap_hwmod *
1035 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1037 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1044 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1045 * @oh: struct omap_hwmod *
1047 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1049 if (oh->prcm.omap4.clkctrl_offs)
1052 if (!oh->prcm.omap4.clkctrl_offs &&
1053 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1060 * _disable_clocks - disable hwmod main clock and interface clocks
1061 * @oh: struct omap_hwmod *
1063 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1065 static int _disable_clocks(struct omap_hwmod *oh)
1067 struct omap_hwmod_ocp_if *os;
1069 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1072 clk_disable(oh->_clk);
1074 list_for_each_entry(os, &oh->slave_ports, node) {
1075 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1076 clk_disable(os->_clk);
1077 omap2_clk_allow_idle(os->_clk);
1081 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1082 _disable_optional_clocks(oh);
1084 /* The opt clocks are controlled by the device driver. */
1090 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1091 * @oh: struct omap_hwmod *
1093 * Enables the PRCM module mode related to the hwmod @oh.
1096 static void _omap4_enable_module(struct omap_hwmod *oh)
1098 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1099 _omap4_clkctrl_managed_by_clkfwk(oh))
1102 pr_debug("omap_hwmod: %s: %s: %d\n",
1103 oh->name, __func__, oh->prcm.omap4.modulemode);
1105 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1106 oh->clkdm->prcm_partition,
1107 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1111 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1112 * @oh: struct omap_hwmod *
1114 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1115 * does not have an IDLEST bit or if the module successfully enters
1116 * slave idle; otherwise, pass along the return value of the
1117 * appropriate *_cm*_wait_module_idle() function.
1119 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1124 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1127 if (oh->flags & HWMOD_NO_IDLEST)
1130 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1133 if (!_omap4_has_clkctrl_clock(oh))
1136 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1138 oh->prcm.omap4.clkctrl_offs, 0);
1142 * _save_mpu_port_index - find and save the index to @oh's MPU port
1143 * @oh: struct omap_hwmod *
1145 * Determines the array index of the OCP slave port that the MPU uses
1146 * to address the device, and saves it into the struct omap_hwmod.
1147 * Intended to be called during hwmod registration only. No return
1150 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1152 struct omap_hwmod_ocp_if *os = NULL;
1157 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1159 list_for_each_entry(os, &oh->slave_ports, node) {
1160 if (os->user & OCP_USER_MPU) {
1162 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1171 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1172 * @oh: struct omap_hwmod *
1174 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1175 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1176 * communicate with the IP block. This interface need not be directly
1177 * connected to the MPU (and almost certainly is not), but is directly
1178 * connected to the IP block represented by @oh. Returns a pointer
1179 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1180 * error or if there does not appear to be a path from the MPU to this
1183 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1185 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1188 return oh->_mpu_port;
1192 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1193 * @oh: struct omap_hwmod *
1195 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1196 * by @oh is set to indicate to the PRCM that the IP block is active.
1197 * Usually this means placing the module into smart-idle mode and
1198 * smart-standby, but if there is a bug in the automatic idle handling
1199 * for the IP block, it may need to be placed into the force-idle or
1200 * no-idle variants of these modes. No return value.
1202 static void _enable_sysc(struct omap_hwmod *oh)
1207 struct clockdomain *clkdm;
1209 if (!oh->class->sysc)
1213 * Wait until reset has completed, this is needed as the IP
1214 * block is reset automatically by hardware in some cases
1215 * (off-mode for example), and the drivers require the
1216 * IP to be ready when they access it
1218 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1219 _enable_optional_clocks(oh);
1220 _wait_softreset_complete(oh);
1221 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1222 _disable_optional_clocks(oh);
1224 v = oh->_sysc_cache;
1225 sf = oh->class->sysc->sysc_flags;
1227 clkdm = _get_clkdm(oh);
1228 if (sf & SYSC_HAS_SIDLEMODE) {
1229 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1230 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1231 idlemode = HWMOD_IDLEMODE_NO;
1233 if (sf & SYSC_HAS_ENAWAKEUP)
1234 _enable_wakeup(oh, &v);
1235 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1236 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1238 idlemode = HWMOD_IDLEMODE_SMART;
1242 * This is special handling for some IPs like
1243 * 32k sync timer. Force them to idle!
1245 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1246 if (clkdm_act && !(oh->class->sysc->idlemodes &
1247 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1248 idlemode = HWMOD_IDLEMODE_FORCE;
1250 _set_slave_idlemode(oh, idlemode, &v);
1253 if (sf & SYSC_HAS_MIDLEMODE) {
1254 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1255 idlemode = HWMOD_IDLEMODE_FORCE;
1256 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1257 idlemode = HWMOD_IDLEMODE_NO;
1259 if (sf & SYSC_HAS_ENAWAKEUP)
1260 _enable_wakeup(oh, &v);
1261 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1262 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1264 idlemode = HWMOD_IDLEMODE_SMART;
1266 _set_master_standbymode(oh, idlemode, &v);
1270 * XXX The clock framework should handle this, by
1271 * calling into this code. But this must wait until the
1272 * clock structures are tagged with omap_hwmod entries
1274 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1275 (sf & SYSC_HAS_CLOCKACTIVITY))
1276 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1278 _write_sysconfig(v, oh);
1281 * Set the autoidle bit only after setting the smartidle bit
1282 * Setting this will not have any impact on the other modules.
1284 if (sf & SYSC_HAS_AUTOIDLE) {
1285 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1287 _set_module_autoidle(oh, idlemode, &v);
1288 _write_sysconfig(v, oh);
1293 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1294 * @oh: struct omap_hwmod *
1296 * If module is marked as SWSUP_SIDLE, force the module into slave
1297 * idle; otherwise, configure it for smart-idle. If module is marked
1298 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1299 * configure it for smart-standby. No return value.
1301 static void _idle_sysc(struct omap_hwmod *oh)
1306 if (!oh->class->sysc)
1309 v = oh->_sysc_cache;
1310 sf = oh->class->sysc->sysc_flags;
1312 if (sf & SYSC_HAS_SIDLEMODE) {
1313 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1314 idlemode = HWMOD_IDLEMODE_FORCE;
1316 if (sf & SYSC_HAS_ENAWAKEUP)
1317 _enable_wakeup(oh, &v);
1318 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1319 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1321 idlemode = HWMOD_IDLEMODE_SMART;
1323 _set_slave_idlemode(oh, idlemode, &v);
1326 if (sf & SYSC_HAS_MIDLEMODE) {
1327 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1328 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1329 idlemode = HWMOD_IDLEMODE_FORCE;
1331 if (sf & SYSC_HAS_ENAWAKEUP)
1332 _enable_wakeup(oh, &v);
1333 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1334 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1336 idlemode = HWMOD_IDLEMODE_SMART;
1338 _set_master_standbymode(oh, idlemode, &v);
1341 /* If the cached value is the same as the new value, skip the write */
1342 if (oh->_sysc_cache != v)
1343 _write_sysconfig(v, oh);
1347 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1348 * @oh: struct omap_hwmod *
1350 * Force the module into slave idle and master suspend. No return
1353 static void _shutdown_sysc(struct omap_hwmod *oh)
1358 if (!oh->class->sysc)
1361 v = oh->_sysc_cache;
1362 sf = oh->class->sysc->sysc_flags;
1364 if (sf & SYSC_HAS_SIDLEMODE)
1365 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1367 if (sf & SYSC_HAS_MIDLEMODE)
1368 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1370 if (sf & SYSC_HAS_AUTOIDLE)
1371 _set_module_autoidle(oh, 1, &v);
1373 _write_sysconfig(v, oh);
1377 * _lookup - find an omap_hwmod by name
1378 * @name: find an omap_hwmod by name
1380 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1382 static struct omap_hwmod *_lookup(const char *name)
1384 struct omap_hwmod *oh, *temp_oh;
1388 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1389 if (!strcmp(name, temp_oh->name)) {
1399 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1400 * @oh: struct omap_hwmod *
1402 * Convert a clockdomain name stored in a struct omap_hwmod into a
1403 * clockdomain pointer, and save it into the struct omap_hwmod.
1404 * Return -EINVAL if the clkdm_name lookup failed.
1406 static int _init_clkdm(struct omap_hwmod *oh)
1408 if (!oh->clkdm_name) {
1409 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1413 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1415 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1416 oh->name, oh->clkdm_name);
1420 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1421 oh->name, oh->clkdm_name);
1427 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1428 * well the clockdomain.
1429 * @oh: struct omap_hwmod *
1430 * @np: device_node mapped to this hwmod
1432 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1433 * Resolves all clock names embedded in the hwmod. Returns 0 on
1434 * success, or a negative error code on failure.
1436 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1440 if (oh->_state != _HWMOD_STATE_REGISTERED)
1443 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1445 if (soc_ops.init_clkdm)
1446 ret |= soc_ops.init_clkdm(oh);
1448 ret |= _init_main_clk(oh);
1449 ret |= _init_interface_clks(oh);
1450 ret |= _init_opt_clks(oh);
1453 oh->_state = _HWMOD_STATE_CLKS_INITED;
1455 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1461 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1462 * @oh: struct omap_hwmod *
1463 * @name: name of the reset line in the context of this hwmod
1464 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1466 * Return the bit position of the reset line that match the
1467 * input name. Return -ENOENT if not found.
1469 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1470 struct omap_hwmod_rst_info *ohri)
1474 for (i = 0; i < oh->rst_lines_cnt; i++) {
1475 const char *rst_line = oh->rst_lines[i].name;
1476 if (!strcmp(rst_line, name)) {
1477 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1478 ohri->st_shift = oh->rst_lines[i].st_shift;
1479 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1480 oh->name, __func__, rst_line, ohri->rst_shift,
1491 * _assert_hardreset - assert the HW reset line of submodules
1492 * contained in the hwmod module.
1493 * @oh: struct omap_hwmod *
1494 * @name: name of the reset line to lookup and assert
1496 * Some IP like dsp, ipu or iva contain processor that require an HW
1497 * reset line to be assert / deassert in order to enable fully the IP.
1498 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1499 * asserting the hardreset line on the currently-booted SoC, or passes
1500 * along the return value from _lookup_hardreset() or the SoC's
1501 * assert_hardreset code.
1503 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1505 struct omap_hwmod_rst_info ohri;
1511 if (!soc_ops.assert_hardreset)
1514 ret = _lookup_hardreset(oh, name, &ohri);
1518 ret = soc_ops.assert_hardreset(oh, &ohri);
1524 * _deassert_hardreset - deassert the HW reset line of submodules contained
1525 * in the hwmod module.
1526 * @oh: struct omap_hwmod *
1527 * @name: name of the reset line to look up and deassert
1529 * Some IP like dsp, ipu or iva contain processor that require an HW
1530 * reset line to be assert / deassert in order to enable fully the IP.
1531 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1532 * deasserting the hardreset line on the currently-booted SoC, or passes
1533 * along the return value from _lookup_hardreset() or the SoC's
1534 * deassert_hardreset code.
1536 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1538 struct omap_hwmod_rst_info ohri;
1544 if (!soc_ops.deassert_hardreset)
1547 ret = _lookup_hardreset(oh, name, &ohri);
1553 * A clockdomain must be in SW_SUP otherwise reset
1554 * might not be completed. The clockdomain can be set
1555 * in HW_AUTO only when the module become ready.
1557 clkdm_deny_idle(oh->clkdm);
1558 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1560 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1561 oh->name, oh->clkdm->name, ret);
1567 if (soc_ops.enable_module)
1568 soc_ops.enable_module(oh);
1570 ret = soc_ops.deassert_hardreset(oh, &ohri);
1572 if (soc_ops.disable_module)
1573 soc_ops.disable_module(oh);
1574 _disable_clocks(oh);
1577 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1581 * Set the clockdomain to HW_AUTO, assuming that the
1582 * previous state was HW_AUTO.
1584 clkdm_allow_idle(oh->clkdm);
1586 clkdm_hwmod_disable(oh->clkdm, oh);
1593 * _read_hardreset - read the HW reset line state of submodules
1594 * contained in the hwmod module
1595 * @oh: struct omap_hwmod *
1596 * @name: name of the reset line to look up and read
1598 * Return the state of the reset line. Returns -EINVAL if @oh is
1599 * null, -ENOSYS if we have no way of reading the hardreset line
1600 * status on the currently-booted SoC, or passes along the return
1601 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1604 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1606 struct omap_hwmod_rst_info ohri;
1612 if (!soc_ops.is_hardreset_asserted)
1615 ret = _lookup_hardreset(oh, name, &ohri);
1619 return soc_ops.is_hardreset_asserted(oh, &ohri);
1623 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1624 * @oh: struct omap_hwmod *
1626 * If all hardreset lines associated with @oh are asserted, then return true.
1627 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1628 * associated with @oh are asserted, then return false.
1629 * This function is used to avoid executing some parts of the IP block
1630 * enable/disable sequence if its hardreset line is set.
1632 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1636 if (oh->rst_lines_cnt == 0)
1639 for (i = 0; i < oh->rst_lines_cnt; i++)
1640 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1643 if (oh->rst_lines_cnt == rst_cnt)
1650 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1652 * @oh: struct omap_hwmod *
1654 * If any hardreset lines associated with @oh are asserted, then
1655 * return true. Otherwise, if no hardreset lines associated with @oh
1656 * are asserted, or if @oh has no hardreset lines, then return false.
1657 * This function is used to avoid executing some parts of the IP block
1658 * enable/disable sequence if any hardreset line is set.
1660 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1665 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1666 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1669 return (rst_cnt) ? true : false;
1673 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1674 * @oh: struct omap_hwmod *
1676 * Disable the PRCM module mode related to the hwmod @oh.
1677 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1679 static int _omap4_disable_module(struct omap_hwmod *oh)
1683 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1684 _omap4_clkctrl_managed_by_clkfwk(oh))
1688 * Since integration code might still be doing something, only
1689 * disable if all lines are under hardreset.
1691 if (_are_any_hardreset_lines_asserted(oh))
1694 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1696 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1697 oh->prcm.omap4.clkctrl_offs);
1699 v = _omap4_wait_target_disable(oh);
1701 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1708 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1709 * @oh: struct omap_hwmod *
1711 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1712 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1713 * reset this way, -EINVAL if the hwmod is in the wrong state,
1714 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1716 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1717 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1718 * use the SYSCONFIG softreset bit to provide the status.
1720 * Note that some IP like McBSP do have reset control but don't have
1723 static int _ocp_softreset(struct omap_hwmod *oh)
1729 if (!oh->class->sysc ||
1730 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1733 /* clocks must be on for this operation */
1734 if (oh->_state != _HWMOD_STATE_ENABLED) {
1735 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1740 /* For some modules, all optionnal clocks need to be enabled as well */
1741 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1742 _enable_optional_clocks(oh);
1744 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1746 v = oh->_sysc_cache;
1747 ret = _set_softreset(oh, &v);
1751 _write_sysconfig(v, oh);
1753 if (oh->class->sysc->srst_udelay)
1754 udelay(oh->class->sysc->srst_udelay);
1756 c = _wait_softreset_complete(oh);
1757 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1758 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1759 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1763 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1766 ret = _clear_softreset(oh, &v);
1770 _write_sysconfig(v, oh);
1773 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1774 * _wait_target_ready() or _reset()
1778 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1779 _disable_optional_clocks(oh);
1785 * _reset - reset an omap_hwmod
1786 * @oh: struct omap_hwmod *
1788 * Resets an omap_hwmod @oh. If the module has a custom reset
1789 * function pointer defined, then call it to reset the IP block, and
1790 * pass along its return value to the caller. Otherwise, if the IP
1791 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1792 * associated with it, call a function to reset the IP block via that
1793 * method, and pass along the return value to the caller. Finally, if
1794 * the IP block has some hardreset lines associated with it, assert
1795 * all of those, but do _not_ deassert them. (This is because driver
1796 * authors have expressed an apparent requirement to control the
1797 * deassertion of the hardreset lines themselves.)
1799 * The default software reset mechanism for most OMAP IP blocks is
1800 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1801 * hwmods cannot be reset via this method. Some are not targets and
1802 * therefore have no OCP header registers to access. Others (like the
1803 * IVA) have idiosyncratic reset sequences. So for these relatively
1804 * rare cases, custom reset code can be supplied in the struct
1805 * omap_hwmod_class .reset function pointer.
1807 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1808 * does not prevent idling of the system. This is necessary for cases
1809 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1810 * kernel without disabling dma.
1812 * Passes along the return value from either _ocp_softreset() or the
1813 * custom reset function - these must return -EINVAL if the hwmod
1814 * cannot be reset this way or if the hwmod is in the wrong state,
1815 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1817 static int _reset(struct omap_hwmod *oh)
1821 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1823 if (oh->class->reset) {
1824 r = oh->class->reset(oh);
1826 if (oh->rst_lines_cnt > 0) {
1827 for (i = 0; i < oh->rst_lines_cnt; i++)
1828 _assert_hardreset(oh, oh->rst_lines[i].name);
1831 r = _ocp_softreset(oh);
1837 _set_dmadisable(oh);
1840 * OCP_SYSCONFIG bits need to be reprogrammed after a
1841 * softreset. The _enable() function should be split to avoid
1842 * the rewrite of the OCP_SYSCONFIG register.
1844 if (oh->class->sysc) {
1845 _update_sysc_cache(oh);
1853 * _omap4_update_context_lost - increment hwmod context loss counter if
1854 * hwmod context was lost, and clear hardware context loss reg
1855 * @oh: hwmod to check for context loss
1857 * If the PRCM indicates that the hwmod @oh lost context, increment
1858 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1859 * bits. No return value.
1861 static void _omap4_update_context_lost(struct omap_hwmod *oh)
1863 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1866 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1867 oh->clkdm->pwrdm.ptr->prcm_offs,
1868 oh->prcm.omap4.context_offs))
1871 oh->prcm.omap4.context_lost_counter++;
1872 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1873 oh->clkdm->pwrdm.ptr->prcm_offs,
1874 oh->prcm.omap4.context_offs);
1878 * _omap4_get_context_lost - get context loss counter for a hwmod
1879 * @oh: hwmod to get context loss counter for
1881 * Returns the in-memory context loss counter for a hwmod.
1883 static int _omap4_get_context_lost(struct omap_hwmod *oh)
1885 return oh->prcm.omap4.context_lost_counter;
1889 * _enable_preprogram - Pre-program an IP block during the _enable() process
1890 * @oh: struct omap_hwmod *
1892 * Some IP blocks (such as AESS) require some additional programming
1893 * after enable before they can enter idle. If a function pointer to
1894 * do so is present in the hwmod data, then call it and pass along the
1895 * return value; otherwise, return 0.
1897 static int _enable_preprogram(struct omap_hwmod *oh)
1899 if (!oh->class->enable_preprogram)
1902 return oh->class->enable_preprogram(oh);
1906 * _enable - enable an omap_hwmod
1907 * @oh: struct omap_hwmod *
1909 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1910 * register target. Returns -EINVAL if the hwmod is in the wrong
1911 * state or passes along the return value of _wait_target_ready().
1913 static int _enable(struct omap_hwmod *oh)
1917 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1920 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1923 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1924 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1928 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1929 oh->_state != _HWMOD_STATE_IDLE &&
1930 oh->_state != _HWMOD_STATE_DISABLED) {
1931 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1937 * If an IP block contains HW reset lines and all of them are
1938 * asserted, we let integration code associated with that
1939 * block handle the enable. We've received very little
1940 * information on what those driver authors need, and until
1941 * detailed information is provided and the driver code is
1942 * posted to the public lists, this is probably the best we
1945 if (_are_all_hardreset_lines_asserted(oh))
1948 _add_initiator_dep(oh, mpu_oh);
1952 * A clockdomain must be in SW_SUP before enabling
1953 * completely the module. The clockdomain can be set
1954 * in HW_AUTO only when the module become ready.
1956 clkdm_deny_idle(oh->clkdm);
1957 r = clkdm_hwmod_enable(oh->clkdm, oh);
1959 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1960 oh->name, oh->clkdm->name, r);
1966 if (soc_ops.enable_module)
1967 soc_ops.enable_module(oh);
1968 if (oh->flags & HWMOD_BLOCK_WFI)
1969 cpu_idle_poll_ctrl(true);
1971 if (soc_ops.update_context_lost)
1972 soc_ops.update_context_lost(oh);
1974 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1976 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1977 clkdm_allow_idle(oh->clkdm);
1980 oh->_state = _HWMOD_STATE_ENABLED;
1982 /* Access the sysconfig only if the target is ready */
1983 if (oh->class->sysc) {
1984 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1985 _update_sysc_cache(oh);
1988 r = _enable_preprogram(oh);
1990 if (soc_ops.disable_module)
1991 soc_ops.disable_module(oh);
1992 _disable_clocks(oh);
1993 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1997 clkdm_hwmod_disable(oh->clkdm, oh);
2004 * _idle - idle an omap_hwmod
2005 * @oh: struct omap_hwmod *
2007 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2008 * no further work. Returns -EINVAL if the hwmod is in the wrong
2009 * state or returns 0.
2011 static int _idle(struct omap_hwmod *oh)
2013 if (oh->flags & HWMOD_NO_IDLE) {
2014 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2018 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2020 if (_are_all_hardreset_lines_asserted(oh))
2023 if (oh->_state != _HWMOD_STATE_ENABLED) {
2024 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2029 if (oh->class->sysc)
2031 _del_initiator_dep(oh, mpu_oh);
2034 * If HWMOD_CLKDM_NOAUTO is set then we don't
2035 * deny idle the clkdm again since idle was already denied
2038 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2039 clkdm_deny_idle(oh->clkdm);
2041 if (oh->flags & HWMOD_BLOCK_WFI)
2042 cpu_idle_poll_ctrl(false);
2043 if (soc_ops.disable_module)
2044 soc_ops.disable_module(oh);
2047 * The module must be in idle mode before disabling any parents
2048 * clocks. Otherwise, the parent clock might be disabled before
2049 * the module transition is done, and thus will prevent the
2050 * transition to complete properly.
2052 _disable_clocks(oh);
2054 clkdm_allow_idle(oh->clkdm);
2055 clkdm_hwmod_disable(oh->clkdm, oh);
2058 oh->_state = _HWMOD_STATE_IDLE;
2064 * _shutdown - shutdown an omap_hwmod
2065 * @oh: struct omap_hwmod *
2067 * Shut down an omap_hwmod @oh. This should be called when the driver
2068 * used for the hwmod is removed or unloaded or if the driver is not
2069 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2070 * state or returns 0.
2072 static int _shutdown(struct omap_hwmod *oh)
2077 if (_are_all_hardreset_lines_asserted(oh))
2080 if (oh->_state != _HWMOD_STATE_IDLE &&
2081 oh->_state != _HWMOD_STATE_ENABLED) {
2082 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2087 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2089 if (oh->class->pre_shutdown) {
2090 prev_state = oh->_state;
2091 if (oh->_state == _HWMOD_STATE_IDLE)
2093 ret = oh->class->pre_shutdown(oh);
2095 if (prev_state == _HWMOD_STATE_IDLE)
2101 if (oh->class->sysc) {
2102 if (oh->_state == _HWMOD_STATE_IDLE)
2107 /* clocks and deps are already disabled in idle */
2108 if (oh->_state == _HWMOD_STATE_ENABLED) {
2109 _del_initiator_dep(oh, mpu_oh);
2110 /* XXX what about the other system initiators here? dma, dsp */
2111 if (oh->flags & HWMOD_BLOCK_WFI)
2112 cpu_idle_poll_ctrl(false);
2113 if (soc_ops.disable_module)
2114 soc_ops.disable_module(oh);
2115 _disable_clocks(oh);
2117 clkdm_hwmod_disable(oh->clkdm, oh);
2119 /* XXX Should this code also force-disable the optional clocks? */
2121 for (i = 0; i < oh->rst_lines_cnt; i++)
2122 _assert_hardreset(oh, oh->rst_lines[i].name);
2124 oh->_state = _HWMOD_STATE_DISABLED;
2129 static int of_dev_find_hwmod(struct device_node *np,
2130 struct omap_hwmod *oh)
2135 count = of_property_count_strings(np, "ti,hwmods");
2139 for (i = 0; i < count; i++) {
2140 res = of_property_read_string_index(np, "ti,hwmods",
2144 if (!strcmp(p, oh->name)) {
2145 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2155 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2156 * @np: struct device_node *
2157 * @oh: struct omap_hwmod *
2158 * @index: index of the entry found
2159 * @found: struct device_node * found or NULL
2161 * Parse the dt blob and find out needed hwmod. Recursive function is
2162 * implemented to take care hierarchical dt blob parsing.
2163 * Return: Returns 0 on success, -ENODEV when not found.
2165 static int of_dev_hwmod_lookup(struct device_node *np,
2166 struct omap_hwmod *oh,
2168 struct device_node **found)
2170 struct device_node *np0 = NULL;
2173 res = of_dev_find_hwmod(np, oh);
2180 for_each_child_of_node(np, np0) {
2181 struct device_node *fc;
2184 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2199 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2201 * @oh: struct omap_hwmod *
2202 * @np: struct device_node *
2204 * Fix up module register offsets for modules with mpu_rt_idx.
2205 * Only needed for cpsw with interconnect target module defined
2206 * in device tree while still using legacy hwmod platform data
2207 * for rev, sysc and syss registers.
2209 * Can be removed when all cpsw hwmod platform data has been
2212 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2213 struct device_node *np,
2214 struct resource *res)
2216 struct device_node *child = NULL;
2219 child = of_get_next_child(np, child);
2223 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2225 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2230 * omap_hwmod_parse_module_range - map module IO range from device tree
2231 * @oh: struct omap_hwmod *
2232 * @np: struct device_node *
2234 * Parse the device tree range an interconnect target module provides
2235 * for it's child device IP blocks. This way we can support the old
2236 * "ti,hwmods" property with just dts data without a need for platform
2237 * data for IO resources. And we don't need all the child IP device
2238 * nodes available in the dts.
2240 int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2241 struct device_node *np,
2242 struct resource *res)
2244 struct property *prop;
2245 const __be32 *ranges;
2247 u32 nr_addr, nr_size;
2254 ranges = of_get_property(np, "ranges", &len);
2258 len /= sizeof(*ranges);
2263 of_property_for_each_string(np, "compatible", prop, name)
2264 if (!strncmp("ti,sysc-", name, 8))
2270 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2274 error = of_property_read_u32(np, "#size-cells", &nr_size);
2278 if (nr_addr != 1 || nr_size != 1) {
2279 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2285 base = of_translate_address(np, ranges++);
2286 size = be32_to_cpup(ranges);
2288 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2289 oh->name, np, base, size);
2291 if (oh && oh->mpu_rt_idx) {
2292 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2298 res->end = base + size - 1;
2299 res->flags = IORESOURCE_MEM;
2305 * _init_mpu_rt_base - populate the virtual address for a hwmod
2306 * @oh: struct omap_hwmod * to locate the virtual address
2307 * @data: (unused, caller should pass NULL)
2308 * @index: index of the reg entry iospace in device tree
2309 * @np: struct device_node * of the IP block's device node in the DT data
2311 * Cache the virtual address used by the MPU to access this IP block's
2312 * registers. This address is needed early so the OCP registers that
2313 * are part of the device's address space can be ioremapped properly.
2315 * If SYSC access is not needed, the registers will not be remapped
2316 * and non-availability of MPU access is not treated as an error.
2318 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2319 * -ENXIO on absent or invalid register target address space.
2321 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2322 int index, struct device_node *np)
2324 void __iomem *va_start = NULL;
2325 struct resource res;
2331 _save_mpu_port_index(oh);
2333 /* if we don't need sysc access we don't need to ioremap */
2334 if (!oh->class->sysc)
2337 /* we can't continue without MPU PORT if we need sysc access */
2338 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2342 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2346 /* Do we have a dts range for the interconnect target module? */
2347 error = omap_hwmod_parse_module_range(oh, np, &res);
2349 va_start = ioremap(res.start, resource_size(&res));
2351 /* No ranges, rely on device reg entry */
2353 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2355 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2356 oh->name, index, np);
2360 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2361 oh->name, va_start);
2363 oh->_mpu_rt_va = va_start;
2367 static void __init parse_module_flags(struct omap_hwmod *oh,
2368 struct device_node *np)
2370 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2371 oh->flags |= HWMOD_INIT_NO_RESET;
2372 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2373 oh->flags |= HWMOD_INIT_NO_IDLE;
2374 if (of_find_property(np, "ti,no-idle", NULL))
2375 oh->flags |= HWMOD_NO_IDLE;
2379 * _init - initialize internal data for the hwmod @oh
2380 * @oh: struct omap_hwmod *
2383 * Look up the clocks and the address space used by the MPU to access
2384 * registers belonging to the hwmod @oh. @oh must already be
2385 * registered at this point. This is the first of two phases for
2386 * hwmod initialization. Code called here does not touch any hardware
2387 * registers, it simply prepares internal data structures. Returns 0
2388 * upon success or if the hwmod isn't registered or if the hwmod's
2389 * address space is not defined, or -EINVAL upon failure.
2391 static int __init _init(struct omap_hwmod *oh, void *data)
2394 struct device_node *np = NULL;
2395 struct device_node *bus;
2397 if (oh->_state != _HWMOD_STATE_REGISTERED)
2400 bus = of_find_node_by_name(NULL, "ocp");
2404 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2406 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2407 else if (np && index)
2408 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2411 r = _init_mpu_rt_base(oh, NULL, index, np);
2413 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2418 r = _init_clocks(oh, np);
2420 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2425 struct device_node *child;
2427 parse_module_flags(oh, np);
2428 child = of_get_next_child(np, NULL);
2430 parse_module_flags(oh, child);
2433 oh->_state = _HWMOD_STATE_INITIALIZED;
2439 * _setup_iclk_autoidle - configure an IP block's interface clocks
2440 * @oh: struct omap_hwmod *
2442 * Set up the module's interface clocks. XXX This function is still mostly
2443 * a stub; implementing this properly requires iclk autoidle usecounting in
2444 * the clock code. No return value.
2446 static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2448 struct omap_hwmod_ocp_if *os;
2450 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2453 list_for_each_entry(os, &oh->slave_ports, node) {
2457 if (os->flags & OCPIF_SWSUP_IDLE) {
2459 * we might have multiple users of one iclk with
2460 * different requirements, disable autoidle when
2461 * the module is enabled, e.g. dss iclk
2464 /* we are enabling autoidle afterwards anyways */
2465 clk_enable(os->_clk);
2473 * _setup_reset - reset an IP block during the setup process
2474 * @oh: struct omap_hwmod *
2476 * Reset the IP block corresponding to the hwmod @oh during the setup
2477 * process. The IP block is first enabled so it can be successfully
2478 * reset. Returns 0 upon success or a negative error code upon
2481 static int _setup_reset(struct omap_hwmod *oh)
2485 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2488 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2491 if (oh->rst_lines_cnt == 0) {
2494 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2495 oh->name, oh->_state);
2500 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2507 * _setup_postsetup - transition to the appropriate state after _setup
2508 * @oh: struct omap_hwmod *
2510 * Place an IP block represented by @oh into a "post-setup" state --
2511 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2512 * this function is called at the end of _setup().) The postsetup
2513 * state for an IP block can be changed by calling
2514 * omap_hwmod_enter_postsetup_state() early in the boot process,
2515 * before one of the omap_hwmod_setup*() functions are called for the
2518 * The IP block stays in this state until a PM runtime-based driver is
2519 * loaded for that IP block. A post-setup state of IDLE is
2520 * appropriate for almost all IP blocks with runtime PM-enabled
2521 * drivers, since those drivers are able to enable the IP block. A
2522 * post-setup state of ENABLED is appropriate for kernels with PM
2523 * runtime disabled. The DISABLED state is appropriate for unusual IP
2524 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2525 * included, since the WDTIMER starts running on reset and will reset
2526 * the MPU if left active.
2528 * This post-setup mechanism is deprecated. Once all of the OMAP
2529 * drivers have been converted to use PM runtime, and all of the IP
2530 * block data and interconnect data is available to the hwmod code, it
2531 * should be possible to replace this mechanism with a "lazy reset"
2532 * arrangement. In a "lazy reset" setup, each IP block is enabled
2533 * when the driver first probes, then all remaining IP blocks without
2534 * drivers are either shut down or enabled after the drivers have
2535 * loaded. However, this cannot take place until the above
2536 * preconditions have been met, since otherwise the late reset code
2537 * has no way of knowing which IP blocks are in use by drivers, and
2538 * which ones are unused.
2542 static void _setup_postsetup(struct omap_hwmod *oh)
2546 if (oh->rst_lines_cnt > 0)
2549 postsetup_state = oh->_postsetup_state;
2550 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2551 postsetup_state = _HWMOD_STATE_ENABLED;
2554 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2555 * it should be set by the core code as a runtime flag during startup
2557 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2558 (postsetup_state == _HWMOD_STATE_IDLE)) {
2559 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2560 postsetup_state = _HWMOD_STATE_ENABLED;
2563 if (postsetup_state == _HWMOD_STATE_IDLE)
2565 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2567 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2568 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2569 oh->name, postsetup_state);
2575 * _setup - prepare IP block hardware for use
2576 * @oh: struct omap_hwmod *
2577 * @n: (unused, pass NULL)
2579 * Configure the IP block represented by @oh. This may include
2580 * enabling the IP block, resetting it, and placing it into a
2581 * post-setup state, depending on the type of IP block and applicable
2582 * flags. IP blocks are reset to prevent any previous configuration
2583 * by the bootloader or previous operating system from interfering
2584 * with power management or other parts of the system. The reset can
2585 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2586 * two phases for hwmod initialization. Code called here generally
2587 * affects the IP block hardware, or system integration hardware
2588 * associated with the IP block. Returns 0.
2590 static int _setup(struct omap_hwmod *oh, void *data)
2592 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2595 if (oh->parent_hwmod) {
2598 r = _enable(oh->parent_hwmod);
2599 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2600 oh->name, oh->parent_hwmod->name);
2603 _setup_iclk_autoidle(oh);
2605 if (!_setup_reset(oh))
2606 _setup_postsetup(oh);
2608 if (oh->parent_hwmod) {
2611 postsetup_state = oh->parent_hwmod->_postsetup_state;
2613 if (postsetup_state == _HWMOD_STATE_IDLE)
2614 _idle(oh->parent_hwmod);
2615 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2616 _shutdown(oh->parent_hwmod);
2617 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2618 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2619 oh->parent_hwmod->name, postsetup_state);
2626 * _register - register a struct omap_hwmod
2627 * @oh: struct omap_hwmod *
2629 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2630 * already has been registered by the same name; -EINVAL if the
2631 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2632 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2633 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2636 * XXX The data should be copied into bootmem, so the original data
2637 * should be marked __initdata and freed after init. This would allow
2638 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2639 * that the copy process would be relatively complex due to the large number
2642 static int _register(struct omap_hwmod *oh)
2644 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2645 (oh->_state != _HWMOD_STATE_UNKNOWN))
2648 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2650 if (_lookup(oh->name))
2653 list_add_tail(&oh->node, &omap_hwmod_list);
2655 INIT_LIST_HEAD(&oh->slave_ports);
2656 spin_lock_init(&oh->_lock);
2657 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2659 oh->_state = _HWMOD_STATE_REGISTERED;
2662 * XXX Rather than doing a strcmp(), this should test a flag
2663 * set in the hwmod data, inserted by the autogenerator code.
2665 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2672 * _add_link - add an interconnect between two IP blocks
2673 * @oi: pointer to a struct omap_hwmod_ocp_if record
2675 * Add struct omap_hwmod_link records connecting the slave IP block
2676 * specified in @oi->slave to @oi. This code is assumed to run before
2677 * preemption or SMP has been enabled, thus avoiding the need for
2678 * locking in this code. Changes to this assumption will require
2679 * additional locking. Returns 0.
2681 static int _add_link(struct omap_hwmod_ocp_if *oi)
2683 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2686 list_add(&oi->node, &oi->slave->slave_ports);
2687 oi->slave->slaves_cnt++;
2693 * _register_link - register a struct omap_hwmod_ocp_if
2694 * @oi: struct omap_hwmod_ocp_if *
2696 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2697 * has already been registered; -EINVAL if @oi is NULL or if the
2698 * record pointed to by @oi is missing required fields; or 0 upon
2701 * XXX The data should be copied into bootmem, so the original data
2702 * should be marked __initdata and freed after init. This would allow
2703 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2705 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2707 if (!oi || !oi->master || !oi->slave || !oi->user)
2710 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2713 pr_debug("omap_hwmod: registering link from %s to %s\n",
2714 oi->master->name, oi->slave->name);
2717 * Register the connected hwmods, if they haven't been
2718 * registered already
2720 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2721 _register(oi->master);
2723 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2724 _register(oi->slave);
2728 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2733 /* Static functions intended only for use in soc_ops field function pointers */
2736 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2737 * @oh: struct omap_hwmod *
2739 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2740 * does not have an IDLEST bit or if the module successfully leaves
2741 * slave idle; otherwise, pass along the return value of the
2742 * appropriate *_cm*_wait_module_ready() function.
2744 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2749 if (oh->flags & HWMOD_NO_IDLEST)
2752 if (!_find_mpu_rt_port(oh))
2755 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2757 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2758 oh->prcm.omap2.idlest_reg_id,
2759 oh->prcm.omap2.idlest_idle_bit);
2763 * _omap4_wait_target_ready - wait for a module to leave slave idle
2764 * @oh: struct omap_hwmod *
2766 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2767 * does not have an IDLEST bit or if the module successfully leaves
2768 * slave idle; otherwise, pass along the return value of the
2769 * appropriate *_cm*_wait_module_ready() function.
2771 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2776 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2779 if (!_find_mpu_rt_port(oh))
2782 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2785 if (!_omap4_has_clkctrl_clock(oh))
2788 /* XXX check module SIDLEMODE, hardreset status */
2790 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2792 oh->prcm.omap4.clkctrl_offs, 0);
2796 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2797 * @oh: struct omap_hwmod * to assert hardreset
2798 * @ohri: hardreset line data
2800 * Call omap2_prm_assert_hardreset() with parameters extracted from
2801 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2802 * use as an soc_ops function pointer. Passes along the return value
2803 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2804 * for removal when the PRM code is moved into drivers/.
2806 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2807 struct omap_hwmod_rst_info *ohri)
2809 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2810 oh->prcm.omap2.module_offs, 0);
2814 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2815 * @oh: struct omap_hwmod * to deassert hardreset
2816 * @ohri: hardreset line data
2818 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2819 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2820 * use as an soc_ops function pointer. Passes along the return value
2821 * from omap2_prm_deassert_hardreset(). XXX This function is
2822 * scheduled for removal when the PRM code is moved into drivers/.
2824 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2825 struct omap_hwmod_rst_info *ohri)
2827 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2828 oh->prcm.omap2.module_offs, 0, 0);
2832 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2833 * @oh: struct omap_hwmod * to test hardreset
2834 * @ohri: hardreset line data
2836 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2837 * from the hwmod @oh and the hardreset line data @ohri. Only
2838 * intended for use as an soc_ops function pointer. Passes along the
2839 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2840 * function is scheduled for removal when the PRM code is moved into
2843 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2844 struct omap_hwmod_rst_info *ohri)
2846 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2847 oh->prcm.omap2.module_offs, 0);
2851 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2852 * @oh: struct omap_hwmod * to assert hardreset
2853 * @ohri: hardreset line data
2855 * Call omap4_prminst_assert_hardreset() with parameters extracted
2856 * from the hwmod @oh and the hardreset line data @ohri. Only
2857 * intended for use as an soc_ops function pointer. Passes along the
2858 * return value from omap4_prminst_assert_hardreset(). XXX This
2859 * function is scheduled for removal when the PRM code is moved into
2862 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2863 struct omap_hwmod_rst_info *ohri)
2868 return omap_prm_assert_hardreset(ohri->rst_shift,
2869 oh->clkdm->pwrdm.ptr->prcm_partition,
2870 oh->clkdm->pwrdm.ptr->prcm_offs,
2871 oh->prcm.omap4.rstctrl_offs);
2875 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2876 * @oh: struct omap_hwmod * to deassert hardreset
2877 * @ohri: hardreset line data
2879 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2880 * from the hwmod @oh and the hardreset line data @ohri. Only
2881 * intended for use as an soc_ops function pointer. Passes along the
2882 * return value from omap4_prminst_deassert_hardreset(). XXX This
2883 * function is scheduled for removal when the PRM code is moved into
2886 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2887 struct omap_hwmod_rst_info *ohri)
2893 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2894 oh->name, ohri->name);
2895 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2896 oh->clkdm->pwrdm.ptr->prcm_partition,
2897 oh->clkdm->pwrdm.ptr->prcm_offs,
2898 oh->prcm.omap4.rstctrl_offs,
2899 oh->prcm.omap4.rstctrl_offs +
2900 OMAP4_RST_CTRL_ST_OFFSET);
2904 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2905 * @oh: struct omap_hwmod * to test hardreset
2906 * @ohri: hardreset line data
2908 * Call omap4_prminst_is_hardreset_asserted() with parameters
2909 * extracted from the hwmod @oh and the hardreset line data @ohri.
2910 * Only intended for use as an soc_ops function pointer. Passes along
2911 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2912 * This function is scheduled for removal when the PRM code is moved
2915 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2916 struct omap_hwmod_rst_info *ohri)
2921 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2922 oh->clkdm->pwrdm.ptr->
2924 oh->clkdm->pwrdm.ptr->prcm_offs,
2925 oh->prcm.omap4.rstctrl_offs);
2929 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2930 * @oh: struct omap_hwmod * to disable control for
2932 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2933 * will be using its main_clk to enable/disable the module. Returns
2936 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2941 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2947 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2948 * @oh: struct omap_hwmod * to deassert hardreset
2949 * @ohri: hardreset line data
2951 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2952 * from the hwmod @oh and the hardreset line data @ohri. Only
2953 * intended for use as an soc_ops function pointer. Passes along the
2954 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2955 * function is scheduled for removal when the PRM code is moved into
2958 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2959 struct omap_hwmod_rst_info *ohri)
2961 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2962 oh->clkdm->pwrdm.ptr->prcm_partition,
2963 oh->clkdm->pwrdm.ptr->prcm_offs,
2964 oh->prcm.omap4.rstctrl_offs,
2965 oh->prcm.omap4.rstst_offs);
2968 /* Public functions */
2970 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2972 if (oh->flags & HWMOD_16BIT_REG)
2973 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2975 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2978 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2980 if (oh->flags & HWMOD_16BIT_REG)
2981 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2983 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2987 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2988 * @oh: struct omap_hwmod *
2990 * This is a public function exposed to drivers. Some drivers may need to do
2991 * some settings before and after resetting the device. Those drivers after
2992 * doing the necessary settings could use this function to start a reset by
2993 * setting the SYSCONFIG.SOFTRESET bit.
2995 int omap_hwmod_softreset(struct omap_hwmod *oh)
3000 if (!oh || !(oh->_sysc_cache))
3003 v = oh->_sysc_cache;
3004 ret = _set_softreset(oh, &v);
3007 _write_sysconfig(v, oh);
3009 ret = _clear_softreset(oh, &v);
3012 _write_sysconfig(v, oh);
3019 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3020 * @name: name of the omap_hwmod to look up
3022 * Given a @name of an omap_hwmod, return a pointer to the registered
3023 * struct omap_hwmod *, or NULL upon error.
3025 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3027 struct omap_hwmod *oh;
3038 * omap_hwmod_for_each - call function for each registered omap_hwmod
3039 * @fn: pointer to a callback function
3040 * @data: void * data to pass to callback function
3042 * Call @fn for each registered omap_hwmod, passing @data to each
3043 * function. @fn must return 0 for success or any other value for
3044 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3045 * will stop and the non-zero return value will be passed to the
3046 * caller of omap_hwmod_for_each(). @fn is called with
3047 * omap_hwmod_for_each() held.
3049 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3052 struct omap_hwmod *temp_oh;
3058 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3059 ret = (*fn)(temp_oh, data);
3068 * omap_hwmod_register_links - register an array of hwmod links
3069 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3071 * Intended to be called early in boot before the clock framework is
3072 * initialized. If @ois is not null, will register all omap_hwmods
3073 * listed in @ois that are valid for this chip. Returns -EINVAL if
3074 * omap_hwmod_init() hasn't been called before calling this function,
3075 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3078 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3088 if (ois[0] == NULL) /* Empty list */
3093 r = _register_link(ois[i]);
3094 WARN(r && r != -EEXIST,
3095 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3096 ois[i]->master->name, ois[i]->slave->name, r);
3103 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3104 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3106 * If the hwmod data corresponding to the MPU subsystem IP block
3107 * hasn't been initialized and set up yet, do so now. This must be
3108 * done first since sleep dependencies may be added from other hwmods
3109 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3112 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3114 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3115 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3116 __func__, MPU_INITIATOR_NAME);
3117 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3118 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3122 * omap_hwmod_setup_one - set up a single hwmod
3123 * @oh_name: const char * name of the already-registered hwmod to set up
3125 * Initialize and set up a single hwmod. Intended to be used for a
3126 * small number of early devices, such as the timer IP blocks used for
3127 * the scheduler clock. Must be called after omap2_clk_init().
3128 * Resolves the struct clk names to struct clk pointers for each
3129 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3130 * -EINVAL upon error or 0 upon success.
3132 int __init omap_hwmod_setup_one(const char *oh_name)
3134 struct omap_hwmod *oh;
3136 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3138 oh = _lookup(oh_name);
3140 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3144 _ensure_mpu_hwmod_is_setup(oh);
3152 static void omap_hwmod_check_one(struct device *dev,
3153 const char *name, s8 v1, u8 v2)
3159 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3163 * omap_hwmod_check_sysc - check sysc against platform sysc
3164 * @dev: struct device
3165 * @data: module data
3166 * @sysc_fields: new sysc configuration
3168 static int omap_hwmod_check_sysc(struct device *dev,
3169 const struct ti_sysc_module_data *data,
3170 struct sysc_regbits *sysc_fields)
3172 const struct sysc_regbits *regbits = data->cap->regbits;
3174 omap_hwmod_check_one(dev, "dmadisable_shift",
3175 regbits->dmadisable_shift,
3176 sysc_fields->dmadisable_shift);
3177 omap_hwmod_check_one(dev, "midle_shift",
3178 regbits->midle_shift,
3179 sysc_fields->midle_shift);
3180 omap_hwmod_check_one(dev, "sidle_shift",
3181 regbits->sidle_shift,
3182 sysc_fields->sidle_shift);
3183 omap_hwmod_check_one(dev, "clkact_shift",
3184 regbits->clkact_shift,
3185 sysc_fields->clkact_shift);
3186 omap_hwmod_check_one(dev, "enwkup_shift",
3187 regbits->enwkup_shift,
3188 sysc_fields->enwkup_shift);
3189 omap_hwmod_check_one(dev, "srst_shift",
3190 regbits->srst_shift,
3191 sysc_fields->srst_shift);
3192 omap_hwmod_check_one(dev, "autoidle_shift",
3193 regbits->autoidle_shift,
3194 sysc_fields->autoidle_shift);
3200 * omap_hwmod_init_regbits - init sysconfig specific register bits
3201 * @dev: struct device
3202 * @data: module data
3203 * @sysc_fields: new sysc configuration
3205 static int omap_hwmod_init_regbits(struct device *dev,
3206 const struct ti_sysc_module_data *data,
3207 struct sysc_regbits **sysc_fields)
3209 *sysc_fields = NULL;
3211 switch (data->cap->type) {
3213 case TI_SYSC_OMAP2_TIMER:
3214 *sysc_fields = &omap_hwmod_sysc_type1;
3216 case TI_SYSC_OMAP3_SHAM:
3217 *sysc_fields = &omap3_sham_sysc_fields;
3219 case TI_SYSC_OMAP3_AES:
3220 *sysc_fields = &omap3xxx_aes_sysc_fields;
3223 case TI_SYSC_OMAP4_TIMER:
3224 *sysc_fields = &omap_hwmod_sysc_type2;
3226 case TI_SYSC_OMAP4_SIMPLE:
3227 *sysc_fields = &omap_hwmod_sysc_type3;
3229 case TI_SYSC_OMAP34XX_SR:
3230 *sysc_fields = &omap34xx_sr_sysc_fields;
3232 case TI_SYSC_OMAP36XX_SR:
3233 *sysc_fields = &omap36xx_sr_sysc_fields;
3235 case TI_SYSC_OMAP4_SR:
3236 *sysc_fields = &omap36xx_sr_sysc_fields;
3238 case TI_SYSC_OMAP4_MCASP:
3239 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3241 case TI_SYSC_OMAP4_USB_HOST_FS:
3242 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3248 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3252 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3253 * @dev: struct device
3254 * @data: module data
3255 * @rev_offs: revision register offset
3256 * @sysc_offs: sysc register offset
3257 * @syss_offs: syss register offset
3259 static int omap_hwmod_init_reg_offs(struct device *dev,
3260 const struct ti_sysc_module_data *data,
3261 s32 *rev_offs, s32 *sysc_offs,
3264 *rev_offs = -ENODEV;
3268 if (data->offsets[SYSC_REVISION] >= 0)
3269 *rev_offs = data->offsets[SYSC_REVISION];
3271 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3272 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3274 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3275 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3281 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3282 * @dev: struct device
3283 * @data: module data
3284 * @sysc_flags: module configuration
3286 static int omap_hwmod_init_sysc_flags(struct device *dev,
3287 const struct ti_sysc_module_data *data,
3292 switch (data->cap->type) {
3294 case TI_SYSC_OMAP2_TIMER:
3295 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3296 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3297 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3298 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3299 *sysc_flags |= SYSC_HAS_EMUFREE;
3300 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3301 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3302 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3303 *sysc_flags |= SYSC_HAS_SOFTRESET;
3304 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3305 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3308 case TI_SYSC_OMAP4_TIMER:
3309 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3310 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3311 *sysc_flags |= SYSC_HAS_DMADISABLE;
3312 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3313 *sysc_flags |= SYSC_HAS_EMUFREE;
3314 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3315 *sysc_flags |= SYSC_HAS_SOFTRESET;
3317 case TI_SYSC_OMAP34XX_SR:
3318 case TI_SYSC_OMAP36XX_SR:
3319 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3320 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3321 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3324 if (data->cap->regbits->emufree_shift >= 0)
3325 *sysc_flags |= SYSC_HAS_EMUFREE;
3326 if (data->cap->regbits->enwkup_shift >= 0)
3327 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3328 if (data->cap->regbits->srst_shift >= 0)
3329 *sysc_flags |= SYSC_HAS_SOFTRESET;
3330 if (data->cap->regbits->autoidle_shift >= 0)
3331 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3335 if (data->cap->regbits->midle_shift >= 0 &&
3336 data->cfg->midlemodes)
3337 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3339 if (data->cap->regbits->sidle_shift >= 0 &&
3340 data->cfg->sidlemodes)
3341 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3343 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3344 *sysc_flags |= SYSC_NO_CACHE;
3345 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3346 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3348 if (data->cfg->syss_mask & 1)
3349 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3355 * omap_hwmod_init_idlemodes - initialize module idle modes
3356 * @dev: struct device
3357 * @data: module data
3358 * @idlemodes: module supported idle modes
3360 static int omap_hwmod_init_idlemodes(struct device *dev,
3361 const struct ti_sysc_module_data *data,
3366 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3367 *idlemodes |= MSTANDBY_FORCE;
3368 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3369 *idlemodes |= MSTANDBY_NO;
3370 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3371 *idlemodes |= MSTANDBY_SMART;
3372 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3373 *idlemodes |= MSTANDBY_SMART_WKUP;
3375 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3376 *idlemodes |= SIDLE_FORCE;
3377 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3378 *idlemodes |= SIDLE_NO;
3379 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3380 *idlemodes |= SIDLE_SMART;
3381 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3382 *idlemodes |= SIDLE_SMART_WKUP;
3388 * omap_hwmod_check_module - check new module against platform data
3389 * @dev: struct device
3391 * @data: new module data
3392 * @sysc_fields: sysc register bits
3393 * @rev_offs: revision register offset
3394 * @sysc_offs: sysconfig register offset
3395 * @syss_offs: sysstatus register offset
3396 * @sysc_flags: sysc specific flags
3397 * @idlemodes: sysc supported idlemodes
3399 static int omap_hwmod_check_module(struct device *dev,
3400 struct omap_hwmod *oh,
3401 const struct ti_sysc_module_data *data,
3402 struct sysc_regbits *sysc_fields,
3403 s32 rev_offs, s32 sysc_offs,
3404 s32 syss_offs, u32 sysc_flags,
3407 if (!oh->class->sysc)
3410 if (sysc_fields != oh->class->sysc->sysc_fields)
3411 dev_warn(dev, "sysc_fields %p != %p\n", sysc_fields,
3412 oh->class->sysc->sysc_fields);
3414 if (rev_offs != oh->class->sysc->rev_offs)
3415 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3416 oh->class->sysc->rev_offs);
3417 if (sysc_offs != oh->class->sysc->sysc_offs)
3418 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3419 oh->class->sysc->sysc_offs);
3420 if (syss_offs != oh->class->sysc->syss_offs)
3421 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3422 oh->class->sysc->syss_offs);
3424 if (sysc_flags != oh->class->sysc->sysc_flags)
3425 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3426 oh->class->sysc->sysc_flags);
3428 if (idlemodes != oh->class->sysc->idlemodes)
3429 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3430 oh->class->sysc->idlemodes);
3432 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3433 dev_warn(dev, "srst_udelay %i != %i\n",
3434 data->cfg->srst_udelay,
3435 oh->class->sysc->srst_udelay);
3441 * omap_hwmod_allocate_module - allocate new module
3442 * @dev: struct device
3444 * @sysc_fields: sysc register bits
3445 * @rev_offs: revision register offset
3446 * @sysc_offs: sysconfig register offset
3447 * @syss_offs: sysstatus register offset
3448 * @sysc_flags: sysc specific flags
3449 * @idlemodes: sysc supported idlemodes
3451 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3453 static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3454 const struct ti_sysc_module_data *data,
3455 struct sysc_regbits *sysc_fields,
3456 s32 rev_offs, s32 sysc_offs,
3457 s32 syss_offs, u32 sysc_flags,
3460 struct omap_hwmod_class_sysconfig *sysc;
3461 struct omap_hwmod_class *class = NULL;
3462 struct omap_hwmod_ocp_if *oi = NULL;
3463 struct clockdomain *clkdm = NULL;
3464 struct clk *clk = NULL;
3465 void __iomem *regs = NULL;
3466 unsigned long flags;
3468 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3472 sysc->sysc_fields = sysc_fields;
3473 sysc->rev_offs = rev_offs;
3474 sysc->sysc_offs = sysc_offs;
3475 sysc->syss_offs = syss_offs;
3476 sysc->sysc_flags = sysc_flags;
3477 sysc->idlemodes = idlemodes;
3478 sysc->srst_udelay = data->cfg->srst_udelay;
3480 if (!oh->_mpu_rt_va) {
3481 regs = ioremap(data->module_pa,
3488 * We may need a new oh->class as the other devices in the same class
3489 * may not yet have ioremapped their registers.
3491 if (oh->class->name && strcmp(oh->class->name, data->name)) {
3492 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3497 if (list_empty(&oh->slave_ports)) {
3498 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
3503 * Note that we assume interconnect interface clocks will be
3504 * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3505 * on omap24xx and omap3.
3508 oi->user = OCP_USER_MPU | OCP_USER_SDMA;
3512 struct clk_hw_omap *hwclk;
3514 clk = of_clk_get_by_name(dev->of_node, "fck");
3521 * Populate clockdomain based on dts clock. It is needed for
3522 * clkdm_deny_idle() and clkdm_allow_idle() until we have have
3523 * interconnect driver and reset driver capable of blocking
3524 * clockdomain idle during reset, enable and idle.
3527 hwclk = to_clk_hw_omap(__clk_get_hw(clk));
3528 if (hwclk && hwclk->clkdm_name)
3529 clkdm = clkdm_lookup(hwclk->clkdm_name);
3533 * Note that we assume interconnect driver manages the clocks
3534 * and do not need to populate oh->_clk for dynamically
3535 * allocated modules.
3541 spin_lock_irqsave(&oh->_lock, flags);
3543 oh->_mpu_rt_va = regs;
3546 oh->class->sysc = sysc;
3551 oh->_state = _HWMOD_STATE_INITIALIZED;
3552 oh->_postsetup_state = _HWMOD_STATE_DEFAULT;
3554 spin_unlock_irqrestore(&oh->_lock, flags);
3559 static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
3560 { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3563 static const struct omap_hwmod_reset dra7_reset_quirks[] = {
3564 { .match = "pcie", .len = 4, .reset = dra7xx_pciess_reset, },
3567 static const struct omap_hwmod_reset omap_reset_quirks[] = {
3568 { .match = "dss", .len = 3, .reset = omap_dss_reset, },
3569 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3570 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3571 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3575 omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
3576 const struct ti_sysc_module_data *data,
3577 const struct omap_hwmod_reset *quirks,
3580 const struct omap_hwmod_reset *quirk;
3583 for (i = 0; i < quirks_sz; i++) {
3585 if (!strncmp(data->name, quirk->match, quirk->len)) {
3586 oh->class->reset = quirk->reset;
3594 omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
3595 const struct ti_sysc_module_data *data)
3597 if (soc_is_omap24xx())
3598 omap_hwmod_init_reset_quirk(dev, oh, data,
3599 omap24xx_reset_quirks,
3600 ARRAY_SIZE(omap24xx_reset_quirks));
3602 if (soc_is_dra7xx())
3603 omap_hwmod_init_reset_quirk(dev, oh, data, dra7_reset_quirks,
3604 ARRAY_SIZE(dra7_reset_quirks));
3606 omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
3607 ARRAY_SIZE(omap_reset_quirks));
3611 * omap_hwmod_init_module - initialize new module
3612 * @dev: struct device
3613 * @data: module data
3614 * @cookie: cookie for the caller to use for later calls
3616 int omap_hwmod_init_module(struct device *dev,
3617 const struct ti_sysc_module_data *data,
3618 struct ti_sysc_cookie *cookie)
3620 struct omap_hwmod *oh;
3621 struct sysc_regbits *sysc_fields;
3622 s32 rev_offs, sysc_offs, syss_offs;
3623 u32 sysc_flags, idlemodes;
3629 oh = _lookup(data->name);
3631 oh = kzalloc(sizeof(*oh), GFP_KERNEL);
3635 oh->name = data->name;
3636 oh->_state = _HWMOD_STATE_UNKNOWN;
3637 lockdep_register_key(&oh->hwmod_key);
3639 /* Unused, can be handled by PRM driver handling resets */
3640 oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT;
3642 oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL);
3648 omap_hwmod_init_reset_quirks(dev, oh, data);
3650 oh->class->name = data->name;
3651 mutex_lock(&list_lock);
3652 error = _register(oh);
3653 mutex_unlock(&list_lock);
3658 error = omap_hwmod_init_regbits(dev, data, &sysc_fields);
3662 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3663 &sysc_offs, &syss_offs);
3667 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3671 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3675 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE)
3676 oh->flags |= HWMOD_NO_IDLE;
3677 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3678 oh->flags |= HWMOD_INIT_NO_IDLE;
3679 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3680 oh->flags |= HWMOD_INIT_NO_RESET;
3681 if (data->cfg->quirks & SYSC_QUIRK_USE_CLOCKACT)
3682 oh->flags |= HWMOD_SET_DEFAULT_CLOCKACT;
3683 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE)
3684 oh->flags |= HWMOD_SWSUP_SIDLE;
3685 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT)
3686 oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
3687 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
3688 oh->flags |= HWMOD_SWSUP_MSTANDBY;
3690 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3691 rev_offs, sysc_offs, syss_offs,
3692 sysc_flags, idlemodes);
3696 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3697 rev_offs, sysc_offs, syss_offs,
3698 sysc_flags, idlemodes);
3702 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3704 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3705 * early concole so that hwmod core doesn't reset and keep it in idle
3706 * that specific uart.
3708 #ifdef CONFIG_SERIAL_EARLYCON
3709 static void __init omap_hwmod_setup_earlycon_flags(void)
3711 struct device_node *np;
3712 struct omap_hwmod *oh;
3715 np = of_find_node_by_path("/chosen");
3717 uart = of_get_property(np, "stdout-path", NULL);
3719 np = of_find_node_by_path(uart);
3721 uart = of_get_property(np, "ti,hwmods", NULL);
3722 oh = omap_hwmod_lookup(uart);
3724 uart = of_get_property(np->parent,
3727 oh = omap_hwmod_lookup(uart);
3730 oh->flags |= DEBUG_OMAPUART_FLAGS;
3738 * omap_hwmod_setup_all - set up all registered IP blocks
3740 * Initialize and set up all IP blocks registered with the hwmod code.
3741 * Must be called after omap2_clk_init(). Resolves the struct clk
3742 * names to struct clk pointers for each registered omap_hwmod. Also
3743 * calls _setup() on each hwmod. Returns 0 upon success.
3745 static int __init omap_hwmod_setup_all(void)
3747 _ensure_mpu_hwmod_is_setup(NULL);
3749 omap_hwmod_for_each(_init, NULL);
3750 #ifdef CONFIG_SERIAL_EARLYCON
3751 omap_hwmod_setup_earlycon_flags();
3753 omap_hwmod_for_each(_setup, NULL);
3757 omap_postcore_initcall(omap_hwmod_setup_all);
3760 * omap_hwmod_enable - enable an omap_hwmod
3761 * @oh: struct omap_hwmod *
3763 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3764 * Returns -EINVAL on error or passes along the return value from _enable().
3766 int omap_hwmod_enable(struct omap_hwmod *oh)
3769 unsigned long flags;
3774 spin_lock_irqsave(&oh->_lock, flags);
3776 spin_unlock_irqrestore(&oh->_lock, flags);
3782 * omap_hwmod_idle - idle an omap_hwmod
3783 * @oh: struct omap_hwmod *
3785 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3786 * Returns -EINVAL on error or passes along the return value from _idle().
3788 int omap_hwmod_idle(struct omap_hwmod *oh)
3791 unsigned long flags;
3796 spin_lock_irqsave(&oh->_lock, flags);
3798 spin_unlock_irqrestore(&oh->_lock, flags);
3804 * omap_hwmod_shutdown - shutdown an omap_hwmod
3805 * @oh: struct omap_hwmod *
3807 * Shutdown an omap_hwmod @oh. Intended to be called by
3808 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3809 * the return value from _shutdown().
3811 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3814 unsigned long flags;
3819 spin_lock_irqsave(&oh->_lock, flags);
3821 spin_unlock_irqrestore(&oh->_lock, flags);
3827 * IP block data retrieval functions
3831 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3832 * @oh: struct omap_hwmod *
3834 * Return the powerdomain pointer associated with the OMAP module
3835 * @oh's main clock. If @oh does not have a main clk, return the
3836 * powerdomain associated with the interface clock associated with the
3837 * module's MPU port. (XXX Perhaps this should use the SDMA port
3838 * instead?) Returns NULL on error, or a struct powerdomain * on
3841 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3844 struct omap_hwmod_ocp_if *oi;
3845 struct clockdomain *clkdm;
3846 struct clk_hw_omap *clk;
3852 return oh->clkdm->pwrdm.ptr;
3857 oi = _find_mpu_rt_port(oh);
3863 clk = to_clk_hw_omap(__clk_get_hw(c));
3868 return clkdm->pwrdm.ptr;
3872 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3873 * @oh: struct omap_hwmod *
3875 * Returns the virtual address corresponding to the beginning of the
3876 * module's register target, in the address range that is intended to
3877 * be used by the MPU. Returns the virtual address upon success or NULL
3880 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3885 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3888 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3891 return oh->_mpu_rt_va;
3895 * XXX what about functions for drivers to save/restore ocp_sysconfig
3896 * for context save/restore operations?
3900 * omap_hwmod_enable_wakeup - allow device to wake up the system
3901 * @oh: struct omap_hwmod *
3903 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3904 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3905 * this IP block if it has dynamic mux entries. Eventually this
3906 * should set PRCM wakeup registers to cause the PRCM to receive
3907 * wakeup events from the module. Does not set any wakeup routing
3908 * registers beyond this point - if the module is to wake up any other
3909 * module or subsystem, that must be set separately. Called by
3910 * omap_device code. Returns -EINVAL on error or 0 upon success.
3912 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3914 unsigned long flags;
3917 spin_lock_irqsave(&oh->_lock, flags);
3919 if (oh->class->sysc &&
3920 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3921 v = oh->_sysc_cache;
3922 _enable_wakeup(oh, &v);
3923 _write_sysconfig(v, oh);
3926 spin_unlock_irqrestore(&oh->_lock, flags);
3932 * omap_hwmod_disable_wakeup - prevent device from waking the system
3933 * @oh: struct omap_hwmod *
3935 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3936 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3937 * events for this IP block if it has dynamic mux entries. Eventually
3938 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3939 * wakeup events from the module. Does not set any wakeup routing
3940 * registers beyond this point - if the module is to wake up any other
3941 * module or subsystem, that must be set separately. Called by
3942 * omap_device code. Returns -EINVAL on error or 0 upon success.
3944 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3946 unsigned long flags;
3949 spin_lock_irqsave(&oh->_lock, flags);
3951 if (oh->class->sysc &&
3952 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3953 v = oh->_sysc_cache;
3954 _disable_wakeup(oh, &v);
3955 _write_sysconfig(v, oh);
3958 spin_unlock_irqrestore(&oh->_lock, flags);
3964 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3965 * contained in the hwmod module.
3966 * @oh: struct omap_hwmod *
3967 * @name: name of the reset line to lookup and assert
3969 * Some IP like dsp, ipu or iva contain processor that require
3970 * an HW reset line to be assert / deassert in order to enable fully
3971 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3972 * yet supported on this OMAP; otherwise, passes along the return value
3973 * from _assert_hardreset().
3975 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3978 unsigned long flags;
3983 spin_lock_irqsave(&oh->_lock, flags);
3984 ret = _assert_hardreset(oh, name);
3985 spin_unlock_irqrestore(&oh->_lock, flags);
3991 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3992 * contained in the hwmod module.
3993 * @oh: struct omap_hwmod *
3994 * @name: name of the reset line to look up and deassert
3996 * Some IP like dsp, ipu or iva contain processor that require
3997 * an HW reset line to be assert / deassert in order to enable fully
3998 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3999 * yet supported on this OMAP; otherwise, passes along the return value
4000 * from _deassert_hardreset().
4002 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
4005 unsigned long flags;
4010 spin_lock_irqsave(&oh->_lock, flags);
4011 ret = _deassert_hardreset(oh, name);
4012 spin_unlock_irqrestore(&oh->_lock, flags);
4018 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
4019 * @classname: struct omap_hwmod_class name to search for
4020 * @fn: callback function pointer to call for each hwmod in class @classname
4021 * @user: arbitrary context data to pass to the callback function
4023 * For each omap_hwmod of class @classname, call @fn.
4024 * If the callback function returns something other than
4025 * zero, the iterator is terminated, and the callback function's return
4026 * value is passed back to the caller. Returns 0 upon success, -EINVAL
4027 * if @classname or @fn are NULL, or passes back the error code from @fn.
4029 int omap_hwmod_for_each_by_class(const char *classname,
4030 int (*fn)(struct omap_hwmod *oh,
4034 struct omap_hwmod *temp_oh;
4037 if (!classname || !fn)
4040 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
4041 __func__, classname);
4043 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
4044 if (!strcmp(temp_oh->class->name, classname)) {
4045 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
4046 __func__, temp_oh->name);
4047 ret = (*fn)(temp_oh, user);
4054 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
4061 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
4062 * @oh: struct omap_hwmod *
4063 * @state: state that _setup() should leave the hwmod in
4065 * Sets the hwmod state that @oh will enter at the end of _setup()
4066 * (called by omap_hwmod_setup_*()). See also the documentation
4067 * for _setup_postsetup(), above. Returns 0 upon success or
4068 * -EINVAL if there is a problem with the arguments or if the hwmod is
4069 * in the wrong state.
4071 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
4074 unsigned long flags;
4079 if (state != _HWMOD_STATE_DISABLED &&
4080 state != _HWMOD_STATE_ENABLED &&
4081 state != _HWMOD_STATE_IDLE)
4084 spin_lock_irqsave(&oh->_lock, flags);
4086 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4091 oh->_postsetup_state = state;
4095 spin_unlock_irqrestore(&oh->_lock, flags);
4101 * omap_hwmod_get_context_loss_count - get lost context count
4102 * @oh: struct omap_hwmod *
4104 * Returns the context loss count of associated @oh
4105 * upon success, or zero if no context loss data is available.
4107 * On OMAP4, this queries the per-hwmod context loss register,
4108 * assuming one exists. If not, or on OMAP2/3, this queries the
4109 * enclosing powerdomain context loss count.
4111 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
4113 struct powerdomain *pwrdm;
4116 if (soc_ops.get_context_lost)
4117 return soc_ops.get_context_lost(oh);
4119 pwrdm = omap_hwmod_get_pwrdm(oh);
4121 ret = pwrdm_get_context_loss_count(pwrdm);
4127 * omap_hwmod_init - initialize the hwmod code
4129 * Sets up some function pointers needed by the hwmod code to operate on the
4130 * currently-booted SoC. Intended to be called once during kernel init
4131 * before any hwmods are registered. No return value.
4133 void __init omap_hwmod_init(void)
4135 if (cpu_is_omap24xx()) {
4136 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4137 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4138 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4139 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4140 } else if (cpu_is_omap34xx()) {
4141 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4142 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4143 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4144 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4145 soc_ops.init_clkdm = _init_clkdm;
4146 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4147 soc_ops.enable_module = _omap4_enable_module;
4148 soc_ops.disable_module = _omap4_disable_module;
4149 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4150 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4151 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4152 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4153 soc_ops.init_clkdm = _init_clkdm;
4154 soc_ops.update_context_lost = _omap4_update_context_lost;
4155 soc_ops.get_context_lost = _omap4_get_context_lost;
4156 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4157 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4158 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4160 soc_ops.enable_module = _omap4_enable_module;
4161 soc_ops.disable_module = _omap4_disable_module;
4162 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4163 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4164 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4165 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4166 soc_ops.init_clkdm = _init_clkdm;
4167 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4168 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4170 WARN(1, "omap_hwmod: unknown SoC type\n");
4173 _init_clkctrl_providers();
4179 * omap_hwmod_get_main_clk - get pointer to main clock name
4180 * @oh: struct omap_hwmod *
4182 * Returns the main clock name assocated with @oh upon success,
4183 * or NULL if @oh is NULL.
4185 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4190 return oh->main_clk;