2 * omap_hwmod implementation for OMAP2/3/4
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/clk-provider.h>
135 #include <linux/delay.h>
136 #include <linux/err.h>
137 #include <linux/list.h>
138 #include <linux/mutex.h>
139 #include <linux/spinlock.h>
140 #include <linux/slab.h>
141 #include <linux/cpu.h>
142 #include <linux/of.h>
143 #include <linux/of_address.h>
144 #include <linux/bootmem.h>
146 #include <linux/platform_data/ti-sysc.h>
148 #include <dt-bindings/bus/ti-sysc.h>
150 #include <asm/system_misc.h>
153 #include "omap_hwmod.h"
157 #include "clockdomain.h"
158 #include "powerdomain.h"
166 #include "prminst44xx.h"
169 /* Name of the OMAP hwmod for the MPU */
170 #define MPU_INITIATOR_NAME "mpu"
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
176 #define LINKS_PER_OCP_IF 2
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
182 #define OMAP4_RST_CTRL_ST_OFFSET 4
185 * Maximum length for module clock handle names
187 #define MOD_CLK_MAX_NAME_LEN 32
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
197 struct clkctrl_provider {
201 struct device_node *node;
202 struct list_head link;
205 static LIST_HEAD(clkctrl_providers);
208 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
209 * @enable_module: function to enable a module (via MODULEMODE)
210 * @disable_module: function to disable a module (via MODULEMODE)
212 * XXX Eventually this functionality will be hidden inside the PRM/CM
213 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
214 * conditionals in this code.
216 struct omap_hwmod_soc_ops {
217 void (*enable_module)(struct omap_hwmod *oh);
218 int (*disable_module)(struct omap_hwmod *oh);
219 int (*wait_target_ready)(struct omap_hwmod *oh);
220 int (*assert_hardreset)(struct omap_hwmod *oh,
221 struct omap_hwmod_rst_info *ohri);
222 int (*deassert_hardreset)(struct omap_hwmod *oh,
223 struct omap_hwmod_rst_info *ohri);
224 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
225 struct omap_hwmod_rst_info *ohri);
226 int (*init_clkdm)(struct omap_hwmod *oh);
227 void (*update_context_lost)(struct omap_hwmod *oh);
228 int (*get_context_lost)(struct omap_hwmod *oh);
229 int (*disable_direct_prcm)(struct omap_hwmod *oh);
230 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
233 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
234 static struct omap_hwmod_soc_ops soc_ops;
236 /* omap_hwmod_list contains all registered struct omap_hwmods */
237 static LIST_HEAD(omap_hwmod_list);
239 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
240 static struct omap_hwmod *mpu_oh;
242 /* inited: set to true once the hwmod code is initialized */
245 /* Private functions */
248 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
249 * @oh: struct omap_hwmod *
251 * Load the current value of the hwmod OCP_SYSCONFIG register into the
252 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
253 * OCP_SYSCONFIG register or 0 upon success.
255 static int _update_sysc_cache(struct omap_hwmod *oh)
257 if (!oh->class->sysc) {
258 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
262 /* XXX ensure module interface clock is up */
264 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
266 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
267 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
273 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
274 * @v: OCP_SYSCONFIG value to write
275 * @oh: struct omap_hwmod *
277 * Write @v into the module class' OCP_SYSCONFIG register, if it has
278 * one. No return value.
280 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
282 if (!oh->class->sysc) {
283 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
287 /* XXX ensure module interface clock is up */
289 /* Module might have lost context, always update cache and register */
293 * Some IP blocks (such as RTC) require unlocking of IP before
294 * accessing its registers. If a function pointer is present
295 * to unlock, then call it before accessing sysconfig and
296 * call lock after writing sysconfig.
298 if (oh->class->unlock)
299 oh->class->unlock(oh);
301 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
308 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
309 * @oh: struct omap_hwmod *
310 * @standbymode: MIDLEMODE field bits
311 * @v: pointer to register contents to modify
313 * Update the master standby mode bits in @v to be @standbymode for
314 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
315 * upon error or 0 upon success.
317 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
323 if (!oh->class->sysc ||
324 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
327 if (!oh->class->sysc->sysc_fields) {
328 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
332 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
333 mstandby_mask = (0x3 << mstandby_shift);
335 *v &= ~mstandby_mask;
336 *v |= __ffs(standbymode) << mstandby_shift;
342 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
343 * @oh: struct omap_hwmod *
344 * @idlemode: SIDLEMODE field bits
345 * @v: pointer to register contents to modify
347 * Update the slave idle mode bits in @v to be @idlemode for the @oh
348 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
351 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
356 if (!oh->class->sysc ||
357 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
360 if (!oh->class->sysc->sysc_fields) {
361 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
365 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
366 sidle_mask = (0x3 << sidle_shift);
369 *v |= __ffs(idlemode) << sidle_shift;
375 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
376 * @oh: struct omap_hwmod *
377 * @clockact: CLOCKACTIVITY field bits
378 * @v: pointer to register contents to modify
380 * Update the clockactivity mode bits in @v to be @clockact for the
381 * @oh hwmod. Used for additional powersaving on some modules. Does
382 * not write to the hardware. Returns -EINVAL upon error or 0 upon
385 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
390 if (!oh->class->sysc ||
391 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
394 if (!oh->class->sysc->sysc_fields) {
395 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
399 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
400 clkact_mask = (0x3 << clkact_shift);
403 *v |= clockact << clkact_shift;
409 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
410 * @oh: struct omap_hwmod *
411 * @v: pointer to register contents to modify
413 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
414 * error or 0 upon success.
416 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
420 if (!oh->class->sysc ||
421 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
424 if (!oh->class->sysc->sysc_fields) {
425 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
429 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
437 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
438 * @oh: struct omap_hwmod *
439 * @v: pointer to register contents to modify
441 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
442 * error or 0 upon success.
444 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
448 if (!oh->class->sysc ||
449 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
452 if (!oh->class->sysc->sysc_fields) {
454 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
459 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
467 * _wait_softreset_complete - wait for an OCP softreset to complete
468 * @oh: struct omap_hwmod * to wait on
470 * Wait until the IP block represented by @oh reports that its OCP
471 * softreset is complete. This can be triggered by software (see
472 * _ocp_softreset()) or by hardware upon returning from off-mode (one
473 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
474 * microseconds. Returns the number of microseconds waited.
476 static int _wait_softreset_complete(struct omap_hwmod *oh)
478 struct omap_hwmod_class_sysconfig *sysc;
482 sysc = oh->class->sysc;
484 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
485 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
486 & SYSS_RESETDONE_MASK),
487 MAX_MODULE_SOFTRESET_WAIT, c);
488 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
489 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
490 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
492 MAX_MODULE_SOFTRESET_WAIT, c);
499 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
500 * @oh: struct omap_hwmod *
502 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
503 * of some modules. When the DMA must perform read/write accesses, the
504 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
505 * for power management, software must set the DMADISABLE bit back to 1.
507 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
508 * error or 0 upon success.
510 static int _set_dmadisable(struct omap_hwmod *oh)
515 if (!oh->class->sysc ||
516 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
519 if (!oh->class->sysc->sysc_fields) {
520 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
524 /* clocks must be on for this operation */
525 if (oh->_state != _HWMOD_STATE_ENABLED) {
526 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
530 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
534 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
535 v |= dmadisable_mask;
536 _write_sysconfig(v, oh);
542 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
543 * @oh: struct omap_hwmod *
544 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
545 * @v: pointer to register contents to modify
547 * Update the module autoidle bit in @v to be @autoidle for the @oh
548 * hwmod. The autoidle bit controls whether the module can gate
549 * internal clocks automatically when it isn't doing anything; the
550 * exact function of this bit varies on a per-module basis. This
551 * function does not write to the hardware. Returns -EINVAL upon
552 * error or 0 upon success.
554 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
560 if (!oh->class->sysc ||
561 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
564 if (!oh->class->sysc->sysc_fields) {
565 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
569 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
570 autoidle_mask = (0x1 << autoidle_shift);
572 *v &= ~autoidle_mask;
573 *v |= autoidle << autoidle_shift;
579 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
580 * @oh: struct omap_hwmod *
582 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
583 * upon error or 0 upon success.
585 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
587 if (!oh->class->sysc ||
588 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
589 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
590 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
593 if (!oh->class->sysc->sysc_fields) {
594 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
598 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
599 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
601 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
602 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
603 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
604 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
606 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
612 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
613 * @oh: struct omap_hwmod *
615 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
616 * upon error or 0 upon success.
618 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
620 if (!oh->class->sysc ||
621 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
622 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
623 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
626 if (!oh->class->sysc->sysc_fields) {
627 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
631 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
632 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
634 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
635 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
636 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
637 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
639 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
644 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
646 struct clk_hw_omap *clk;
650 } else if (oh->_clk) {
651 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
653 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
660 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
661 * @oh: struct omap_hwmod *
663 * Prevent the hardware module @oh from entering idle while the
664 * hardare module initiator @init_oh is active. Useful when a module
665 * will be accessed by a particular initiator (e.g., if a module will
666 * be accessed by the IVA, there should be a sleepdep between the IVA
667 * initiator and the module). Only applies to modules in smart-idle
668 * mode. If the clockdomain is marked as not needing autodeps, return
669 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
670 * passes along clkdm_add_sleepdep() value upon success.
672 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
674 struct clockdomain *clkdm, *init_clkdm;
676 clkdm = _get_clkdm(oh);
677 init_clkdm = _get_clkdm(init_oh);
679 if (!clkdm || !init_clkdm)
682 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
685 return clkdm_add_sleepdep(clkdm, init_clkdm);
689 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
690 * @oh: struct omap_hwmod *
692 * Allow the hardware module @oh to enter idle while the hardare
693 * module initiator @init_oh is active. Useful when a module will not
694 * be accessed by a particular initiator (e.g., if a module will not
695 * be accessed by the IVA, there should be no sleepdep between the IVA
696 * initiator and the module). Only applies to modules in smart-idle
697 * mode. If the clockdomain is marked as not needing autodeps, return
698 * 0 without doing anything. Returns -EINVAL upon error or passes
699 * along clkdm_del_sleepdep() value upon success.
701 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
703 struct clockdomain *clkdm, *init_clkdm;
705 clkdm = _get_clkdm(oh);
706 init_clkdm = _get_clkdm(init_oh);
708 if (!clkdm || !init_clkdm)
711 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
714 return clkdm_del_sleepdep(clkdm, init_clkdm);
717 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
718 { .compatible = "ti,clkctrl" },
722 static int __init _setup_clkctrl_provider(struct device_node *np)
725 struct clkctrl_provider *provider;
729 provider = memblock_alloc(sizeof(*provider), 0);
735 provider->num_addrs =
736 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
739 memblock_alloc(sizeof(void *) * provider->num_addrs, 0);
744 memblock_alloc(sizeof(u32) * provider->num_addrs, 0);
748 for (i = 0; i < provider->num_addrs; i++) {
749 addrp = of_get_address(np, i, &size, NULL);
750 provider->addr[i] = (u32)of_translate_address(np, addrp);
751 provider->size[i] = size;
752 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
753 provider->addr[i] + provider->size[i]);
756 list_add(&provider->link, &clkctrl_providers);
761 static int __init _init_clkctrl_providers(void)
763 struct device_node *np;
766 for_each_matching_node(np, ti_clkctrl_match_table) {
767 ret = _setup_clkctrl_provider(np);
775 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
777 if (!oh->prcm.omap4.modulemode)
780 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
782 oh->prcm.omap4.clkctrl_offs);
785 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
787 struct clkctrl_provider *provider;
791 if (!soc_ops.xlate_clkctrl)
794 addr = soc_ops.xlate_clkctrl(oh);
798 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
800 list_for_each_entry(provider, &clkctrl_providers, link) {
803 for (i = 0; i < provider->num_addrs; i++) {
804 if (provider->addr[i] <= addr &&
805 provider->addr[i] + provider->size[i] > addr) {
806 struct of_phandle_args clkspec;
808 clkspec.np = provider->node;
809 clkspec.args_count = 2;
810 clkspec.args[0] = addr - provider->addr[0];
813 clk = of_clk_get_from_provider(&clkspec);
815 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
816 __func__, oh->name, clk,
817 clkspec.args[0], provider->node);
828 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
829 * @oh: struct omap_hwmod *
831 * Called from _init_clocks(). Populates the @oh _clk (main
832 * functional clock pointer) if a clock matching the hwmod name is found,
833 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
835 static int _init_main_clk(struct omap_hwmod *oh)
838 struct clk *clk = NULL;
840 clk = _lookup_clkctrl_clk(oh);
842 if (!IS_ERR_OR_NULL(clk)) {
843 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
844 __clk_get_name(clk), oh->name);
845 oh->main_clk = __clk_get_name(clk);
847 soc_ops.disable_direct_prcm(oh);
852 oh->_clk = clk_get(NULL, oh->main_clk);
855 if (IS_ERR(oh->_clk)) {
856 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
857 oh->name, oh->main_clk);
861 * HACK: This needs a re-visit once clk_prepare() is implemented
862 * to do something meaningful. Today its just a no-op.
863 * If clk_prepare() is used at some point to do things like
864 * voltage scaling etc, then this would have to be moved to
865 * some point where subsystems like i2c and pmic become
868 clk_prepare(oh->_clk);
871 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
872 oh->name, oh->main_clk);
878 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
879 * @oh: struct omap_hwmod *
881 * Called from _init_clocks(). Populates the @oh OCP slave interface
882 * clock pointers. Returns 0 on success or -EINVAL on error.
884 static int _init_interface_clks(struct omap_hwmod *oh)
886 struct omap_hwmod_ocp_if *os;
890 list_for_each_entry(os, &oh->slave_ports, node) {
894 c = clk_get(NULL, os->clk);
896 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
903 * HACK: This needs a re-visit once clk_prepare() is implemented
904 * to do something meaningful. Today its just a no-op.
905 * If clk_prepare() is used at some point to do things like
906 * voltage scaling etc, then this would have to be moved to
907 * some point where subsystems like i2c and pmic become
910 clk_prepare(os->_clk);
917 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
918 * @oh: struct omap_hwmod *
920 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
921 * clock pointers. Returns 0 on success or -EINVAL on error.
923 static int _init_opt_clks(struct omap_hwmod *oh)
925 struct omap_hwmod_opt_clk *oc;
930 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
931 c = clk_get(NULL, oc->clk);
933 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
940 * HACK: This needs a re-visit once clk_prepare() is implemented
941 * to do something meaningful. Today its just a no-op.
942 * If clk_prepare() is used at some point to do things like
943 * voltage scaling etc, then this would have to be moved to
944 * some point where subsystems like i2c and pmic become
947 clk_prepare(oc->_clk);
953 static void _enable_optional_clocks(struct omap_hwmod *oh)
955 struct omap_hwmod_opt_clk *oc;
958 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
960 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
962 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
963 __clk_get_name(oc->_clk));
964 clk_enable(oc->_clk);
968 static void _disable_optional_clocks(struct omap_hwmod *oh)
970 struct omap_hwmod_opt_clk *oc;
973 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
975 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
977 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
978 __clk_get_name(oc->_clk));
979 clk_disable(oc->_clk);
984 * _enable_clocks - enable hwmod main clock and interface clocks
985 * @oh: struct omap_hwmod *
987 * Enables all clocks necessary for register reads and writes to succeed
988 * on the hwmod @oh. Returns 0.
990 static int _enable_clocks(struct omap_hwmod *oh)
992 struct omap_hwmod_ocp_if *os;
994 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
996 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
997 _enable_optional_clocks(oh);
1000 clk_enable(oh->_clk);
1002 list_for_each_entry(os, &oh->slave_ports, node) {
1003 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
1004 clk_enable(os->_clk);
1007 /* The opt clocks are controlled by the device driver. */
1013 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1014 * @oh: struct omap_hwmod *
1016 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1018 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1025 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1026 * @oh: struct omap_hwmod *
1028 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1030 if (oh->prcm.omap4.clkctrl_offs)
1033 if (!oh->prcm.omap4.clkctrl_offs &&
1034 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1041 * _disable_clocks - disable hwmod main clock and interface clocks
1042 * @oh: struct omap_hwmod *
1044 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1046 static int _disable_clocks(struct omap_hwmod *oh)
1048 struct omap_hwmod_ocp_if *os;
1050 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1053 clk_disable(oh->_clk);
1055 list_for_each_entry(os, &oh->slave_ports, node) {
1056 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
1057 clk_disable(os->_clk);
1060 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1061 _disable_optional_clocks(oh);
1063 /* The opt clocks are controlled by the device driver. */
1069 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1070 * @oh: struct omap_hwmod *
1072 * Enables the PRCM module mode related to the hwmod @oh.
1075 static void _omap4_enable_module(struct omap_hwmod *oh)
1077 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1078 _omap4_clkctrl_managed_by_clkfwk(oh))
1081 pr_debug("omap_hwmod: %s: %s: %d\n",
1082 oh->name, __func__, oh->prcm.omap4.modulemode);
1084 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1085 oh->clkdm->prcm_partition,
1086 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1090 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1091 * @oh: struct omap_hwmod *
1093 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1094 * does not have an IDLEST bit or if the module successfully enters
1095 * slave idle; otherwise, pass along the return value of the
1096 * appropriate *_cm*_wait_module_idle() function.
1098 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1103 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1106 if (oh->flags & HWMOD_NO_IDLEST)
1109 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1112 if (!_omap4_has_clkctrl_clock(oh))
1115 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1117 oh->prcm.omap4.clkctrl_offs, 0);
1121 * _save_mpu_port_index - find and save the index to @oh's MPU port
1122 * @oh: struct omap_hwmod *
1124 * Determines the array index of the OCP slave port that the MPU uses
1125 * to address the device, and saves it into the struct omap_hwmod.
1126 * Intended to be called during hwmod registration only. No return
1129 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1131 struct omap_hwmod_ocp_if *os = NULL;
1136 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1138 list_for_each_entry(os, &oh->slave_ports, node) {
1139 if (os->user & OCP_USER_MPU) {
1141 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1150 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1151 * @oh: struct omap_hwmod *
1153 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1154 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1155 * communicate with the IP block. This interface need not be directly
1156 * connected to the MPU (and almost certainly is not), but is directly
1157 * connected to the IP block represented by @oh. Returns a pointer
1158 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1159 * error or if there does not appear to be a path from the MPU to this
1162 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1164 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1167 return oh->_mpu_port;
1171 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1172 * @oh: struct omap_hwmod *
1174 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1175 * by @oh is set to indicate to the PRCM that the IP block is active.
1176 * Usually this means placing the module into smart-idle mode and
1177 * smart-standby, but if there is a bug in the automatic idle handling
1178 * for the IP block, it may need to be placed into the force-idle or
1179 * no-idle variants of these modes. No return value.
1181 static void _enable_sysc(struct omap_hwmod *oh)
1186 struct clockdomain *clkdm;
1188 if (!oh->class->sysc)
1192 * Wait until reset has completed, this is needed as the IP
1193 * block is reset automatically by hardware in some cases
1194 * (off-mode for example), and the drivers require the
1195 * IP to be ready when they access it
1197 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1198 _enable_optional_clocks(oh);
1199 _wait_softreset_complete(oh);
1200 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1201 _disable_optional_clocks(oh);
1203 v = oh->_sysc_cache;
1204 sf = oh->class->sysc->sysc_flags;
1206 clkdm = _get_clkdm(oh);
1207 if (sf & SYSC_HAS_SIDLEMODE) {
1208 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1209 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1210 idlemode = HWMOD_IDLEMODE_NO;
1212 if (sf & SYSC_HAS_ENAWAKEUP)
1213 _enable_wakeup(oh, &v);
1214 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1215 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1217 idlemode = HWMOD_IDLEMODE_SMART;
1221 * This is special handling for some IPs like
1222 * 32k sync timer. Force them to idle!
1224 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1225 if (clkdm_act && !(oh->class->sysc->idlemodes &
1226 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1227 idlemode = HWMOD_IDLEMODE_FORCE;
1229 _set_slave_idlemode(oh, idlemode, &v);
1232 if (sf & SYSC_HAS_MIDLEMODE) {
1233 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1234 idlemode = HWMOD_IDLEMODE_FORCE;
1235 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1236 idlemode = HWMOD_IDLEMODE_NO;
1238 if (sf & SYSC_HAS_ENAWAKEUP)
1239 _enable_wakeup(oh, &v);
1240 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1241 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1243 idlemode = HWMOD_IDLEMODE_SMART;
1245 _set_master_standbymode(oh, idlemode, &v);
1249 * XXX The clock framework should handle this, by
1250 * calling into this code. But this must wait until the
1251 * clock structures are tagged with omap_hwmod entries
1253 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1254 (sf & SYSC_HAS_CLOCKACTIVITY))
1255 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1257 _write_sysconfig(v, oh);
1260 * Set the autoidle bit only after setting the smartidle bit
1261 * Setting this will not have any impact on the other modules.
1263 if (sf & SYSC_HAS_AUTOIDLE) {
1264 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1266 _set_module_autoidle(oh, idlemode, &v);
1267 _write_sysconfig(v, oh);
1272 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1273 * @oh: struct omap_hwmod *
1275 * If module is marked as SWSUP_SIDLE, force the module into slave
1276 * idle; otherwise, configure it for smart-idle. If module is marked
1277 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1278 * configure it for smart-standby. No return value.
1280 static void _idle_sysc(struct omap_hwmod *oh)
1285 if (!oh->class->sysc)
1288 v = oh->_sysc_cache;
1289 sf = oh->class->sysc->sysc_flags;
1291 if (sf & SYSC_HAS_SIDLEMODE) {
1292 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1293 idlemode = HWMOD_IDLEMODE_FORCE;
1295 if (sf & SYSC_HAS_ENAWAKEUP)
1296 _enable_wakeup(oh, &v);
1297 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1298 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1300 idlemode = HWMOD_IDLEMODE_SMART;
1302 _set_slave_idlemode(oh, idlemode, &v);
1305 if (sf & SYSC_HAS_MIDLEMODE) {
1306 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1307 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1308 idlemode = HWMOD_IDLEMODE_FORCE;
1310 if (sf & SYSC_HAS_ENAWAKEUP)
1311 _enable_wakeup(oh, &v);
1312 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1313 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1315 idlemode = HWMOD_IDLEMODE_SMART;
1317 _set_master_standbymode(oh, idlemode, &v);
1320 /* If the cached value is the same as the new value, skip the write */
1321 if (oh->_sysc_cache != v)
1322 _write_sysconfig(v, oh);
1326 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1327 * @oh: struct omap_hwmod *
1329 * Force the module into slave idle and master suspend. No return
1332 static void _shutdown_sysc(struct omap_hwmod *oh)
1337 if (!oh->class->sysc)
1340 v = oh->_sysc_cache;
1341 sf = oh->class->sysc->sysc_flags;
1343 if (sf & SYSC_HAS_SIDLEMODE)
1344 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1346 if (sf & SYSC_HAS_MIDLEMODE)
1347 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1349 if (sf & SYSC_HAS_AUTOIDLE)
1350 _set_module_autoidle(oh, 1, &v);
1352 _write_sysconfig(v, oh);
1356 * _lookup - find an omap_hwmod by name
1357 * @name: find an omap_hwmod by name
1359 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1361 static struct omap_hwmod *_lookup(const char *name)
1363 struct omap_hwmod *oh, *temp_oh;
1367 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1368 if (!strcmp(name, temp_oh->name)) {
1378 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1379 * @oh: struct omap_hwmod *
1381 * Convert a clockdomain name stored in a struct omap_hwmod into a
1382 * clockdomain pointer, and save it into the struct omap_hwmod.
1383 * Return -EINVAL if the clkdm_name lookup failed.
1385 static int _init_clkdm(struct omap_hwmod *oh)
1387 if (!oh->clkdm_name) {
1388 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1392 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1394 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1395 oh->name, oh->clkdm_name);
1399 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1400 oh->name, oh->clkdm_name);
1406 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1407 * well the clockdomain.
1408 * @oh: struct omap_hwmod *
1409 * @np: device_node mapped to this hwmod
1411 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1412 * Resolves all clock names embedded in the hwmod. Returns 0 on
1413 * success, or a negative error code on failure.
1415 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1419 if (oh->_state != _HWMOD_STATE_REGISTERED)
1422 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1424 if (soc_ops.init_clkdm)
1425 ret |= soc_ops.init_clkdm(oh);
1427 ret |= _init_main_clk(oh);
1428 ret |= _init_interface_clks(oh);
1429 ret |= _init_opt_clks(oh);
1432 oh->_state = _HWMOD_STATE_CLKS_INITED;
1434 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1440 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1441 * @oh: struct omap_hwmod *
1442 * @name: name of the reset line in the context of this hwmod
1443 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1445 * Return the bit position of the reset line that match the
1446 * input name. Return -ENOENT if not found.
1448 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1449 struct omap_hwmod_rst_info *ohri)
1453 for (i = 0; i < oh->rst_lines_cnt; i++) {
1454 const char *rst_line = oh->rst_lines[i].name;
1455 if (!strcmp(rst_line, name)) {
1456 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1457 ohri->st_shift = oh->rst_lines[i].st_shift;
1458 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1459 oh->name, __func__, rst_line, ohri->rst_shift,
1470 * _assert_hardreset - assert the HW reset line of submodules
1471 * contained in the hwmod module.
1472 * @oh: struct omap_hwmod *
1473 * @name: name of the reset line to lookup and assert
1475 * Some IP like dsp, ipu or iva contain processor that require an HW
1476 * reset line to be assert / deassert in order to enable fully the IP.
1477 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1478 * asserting the hardreset line on the currently-booted SoC, or passes
1479 * along the return value from _lookup_hardreset() or the SoC's
1480 * assert_hardreset code.
1482 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1484 struct omap_hwmod_rst_info ohri;
1490 if (!soc_ops.assert_hardreset)
1493 ret = _lookup_hardreset(oh, name, &ohri);
1497 ret = soc_ops.assert_hardreset(oh, &ohri);
1503 * _deassert_hardreset - deassert the HW reset line of submodules contained
1504 * in the hwmod module.
1505 * @oh: struct omap_hwmod *
1506 * @name: name of the reset line to look up and deassert
1508 * Some IP like dsp, ipu or iva contain processor that require an HW
1509 * reset line to be assert / deassert in order to enable fully the IP.
1510 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1511 * deasserting the hardreset line on the currently-booted SoC, or passes
1512 * along the return value from _lookup_hardreset() or the SoC's
1513 * deassert_hardreset code.
1515 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1517 struct omap_hwmod_rst_info ohri;
1523 if (!soc_ops.deassert_hardreset)
1526 ret = _lookup_hardreset(oh, name, &ohri);
1532 * A clockdomain must be in SW_SUP otherwise reset
1533 * might not be completed. The clockdomain can be set
1534 * in HW_AUTO only when the module become ready.
1536 clkdm_deny_idle(oh->clkdm);
1537 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1539 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1540 oh->name, oh->clkdm->name, ret);
1546 if (soc_ops.enable_module)
1547 soc_ops.enable_module(oh);
1549 ret = soc_ops.deassert_hardreset(oh, &ohri);
1551 if (soc_ops.disable_module)
1552 soc_ops.disable_module(oh);
1553 _disable_clocks(oh);
1556 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1560 * Set the clockdomain to HW_AUTO, assuming that the
1561 * previous state was HW_AUTO.
1563 clkdm_allow_idle(oh->clkdm);
1565 clkdm_hwmod_disable(oh->clkdm, oh);
1572 * _read_hardreset - read the HW reset line state of submodules
1573 * contained in the hwmod module
1574 * @oh: struct omap_hwmod *
1575 * @name: name of the reset line to look up and read
1577 * Return the state of the reset line. Returns -EINVAL if @oh is
1578 * null, -ENOSYS if we have no way of reading the hardreset line
1579 * status on the currently-booted SoC, or passes along the return
1580 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1583 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1585 struct omap_hwmod_rst_info ohri;
1591 if (!soc_ops.is_hardreset_asserted)
1594 ret = _lookup_hardreset(oh, name, &ohri);
1598 return soc_ops.is_hardreset_asserted(oh, &ohri);
1602 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1603 * @oh: struct omap_hwmod *
1605 * If all hardreset lines associated with @oh are asserted, then return true.
1606 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1607 * associated with @oh are asserted, then return false.
1608 * This function is used to avoid executing some parts of the IP block
1609 * enable/disable sequence if its hardreset line is set.
1611 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1615 if (oh->rst_lines_cnt == 0)
1618 for (i = 0; i < oh->rst_lines_cnt; i++)
1619 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1622 if (oh->rst_lines_cnt == rst_cnt)
1629 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1631 * @oh: struct omap_hwmod *
1633 * If any hardreset lines associated with @oh are asserted, then
1634 * return true. Otherwise, if no hardreset lines associated with @oh
1635 * are asserted, or if @oh has no hardreset lines, then return false.
1636 * This function is used to avoid executing some parts of the IP block
1637 * enable/disable sequence if any hardreset line is set.
1639 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1644 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1645 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1648 return (rst_cnt) ? true : false;
1652 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1653 * @oh: struct omap_hwmod *
1655 * Disable the PRCM module mode related to the hwmod @oh.
1656 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1658 static int _omap4_disable_module(struct omap_hwmod *oh)
1662 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1663 _omap4_clkctrl_managed_by_clkfwk(oh))
1667 * Since integration code might still be doing something, only
1668 * disable if all lines are under hardreset.
1670 if (_are_any_hardreset_lines_asserted(oh))
1673 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1675 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1676 oh->prcm.omap4.clkctrl_offs);
1678 v = _omap4_wait_target_disable(oh);
1680 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1687 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1688 * @oh: struct omap_hwmod *
1690 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1691 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1692 * reset this way, -EINVAL if the hwmod is in the wrong state,
1693 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1695 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1696 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1697 * use the SYSCONFIG softreset bit to provide the status.
1699 * Note that some IP like McBSP do have reset control but don't have
1702 static int _ocp_softreset(struct omap_hwmod *oh)
1708 if (!oh->class->sysc ||
1709 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1712 /* clocks must be on for this operation */
1713 if (oh->_state != _HWMOD_STATE_ENABLED) {
1714 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1719 /* For some modules, all optionnal clocks need to be enabled as well */
1720 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1721 _enable_optional_clocks(oh);
1723 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1725 v = oh->_sysc_cache;
1726 ret = _set_softreset(oh, &v);
1730 _write_sysconfig(v, oh);
1732 if (oh->class->sysc->srst_udelay)
1733 udelay(oh->class->sysc->srst_udelay);
1735 c = _wait_softreset_complete(oh);
1736 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1737 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1738 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1742 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1745 ret = _clear_softreset(oh, &v);
1749 _write_sysconfig(v, oh);
1752 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1753 * _wait_target_ready() or _reset()
1757 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1758 _disable_optional_clocks(oh);
1764 * _reset - reset an omap_hwmod
1765 * @oh: struct omap_hwmod *
1767 * Resets an omap_hwmod @oh. If the module has a custom reset
1768 * function pointer defined, then call it to reset the IP block, and
1769 * pass along its return value to the caller. Otherwise, if the IP
1770 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1771 * associated with it, call a function to reset the IP block via that
1772 * method, and pass along the return value to the caller. Finally, if
1773 * the IP block has some hardreset lines associated with it, assert
1774 * all of those, but do _not_ deassert them. (This is because driver
1775 * authors have expressed an apparent requirement to control the
1776 * deassertion of the hardreset lines themselves.)
1778 * The default software reset mechanism for most OMAP IP blocks is
1779 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1780 * hwmods cannot be reset via this method. Some are not targets and
1781 * therefore have no OCP header registers to access. Others (like the
1782 * IVA) have idiosyncratic reset sequences. So for these relatively
1783 * rare cases, custom reset code can be supplied in the struct
1784 * omap_hwmod_class .reset function pointer.
1786 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1787 * does not prevent idling of the system. This is necessary for cases
1788 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1789 * kernel without disabling dma.
1791 * Passes along the return value from either _ocp_softreset() or the
1792 * custom reset function - these must return -EINVAL if the hwmod
1793 * cannot be reset this way or if the hwmod is in the wrong state,
1794 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1796 static int _reset(struct omap_hwmod *oh)
1800 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1802 if (oh->class->reset) {
1803 r = oh->class->reset(oh);
1805 if (oh->rst_lines_cnt > 0) {
1806 for (i = 0; i < oh->rst_lines_cnt; i++)
1807 _assert_hardreset(oh, oh->rst_lines[i].name);
1810 r = _ocp_softreset(oh);
1816 _set_dmadisable(oh);
1819 * OCP_SYSCONFIG bits need to be reprogrammed after a
1820 * softreset. The _enable() function should be split to avoid
1821 * the rewrite of the OCP_SYSCONFIG register.
1823 if (oh->class->sysc) {
1824 _update_sysc_cache(oh);
1832 * _omap4_update_context_lost - increment hwmod context loss counter if
1833 * hwmod context was lost, and clear hardware context loss reg
1834 * @oh: hwmod to check for context loss
1836 * If the PRCM indicates that the hwmod @oh lost context, increment
1837 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1838 * bits. No return value.
1840 static void _omap4_update_context_lost(struct omap_hwmod *oh)
1842 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1845 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1846 oh->clkdm->pwrdm.ptr->prcm_offs,
1847 oh->prcm.omap4.context_offs))
1850 oh->prcm.omap4.context_lost_counter++;
1851 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1852 oh->clkdm->pwrdm.ptr->prcm_offs,
1853 oh->prcm.omap4.context_offs);
1857 * _omap4_get_context_lost - get context loss counter for a hwmod
1858 * @oh: hwmod to get context loss counter for
1860 * Returns the in-memory context loss counter for a hwmod.
1862 static int _omap4_get_context_lost(struct omap_hwmod *oh)
1864 return oh->prcm.omap4.context_lost_counter;
1868 * _enable_preprogram - Pre-program an IP block during the _enable() process
1869 * @oh: struct omap_hwmod *
1871 * Some IP blocks (such as AESS) require some additional programming
1872 * after enable before they can enter idle. If a function pointer to
1873 * do so is present in the hwmod data, then call it and pass along the
1874 * return value; otherwise, return 0.
1876 static int _enable_preprogram(struct omap_hwmod *oh)
1878 if (!oh->class->enable_preprogram)
1881 return oh->class->enable_preprogram(oh);
1885 * _enable - enable an omap_hwmod
1886 * @oh: struct omap_hwmod *
1888 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1889 * register target. Returns -EINVAL if the hwmod is in the wrong
1890 * state or passes along the return value of _wait_target_ready().
1892 static int _enable(struct omap_hwmod *oh)
1896 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1899 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1902 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1903 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1907 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1908 oh->_state != _HWMOD_STATE_IDLE &&
1909 oh->_state != _HWMOD_STATE_DISABLED) {
1910 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1916 * If an IP block contains HW reset lines and all of them are
1917 * asserted, we let integration code associated with that
1918 * block handle the enable. We've received very little
1919 * information on what those driver authors need, and until
1920 * detailed information is provided and the driver code is
1921 * posted to the public lists, this is probably the best we
1924 if (_are_all_hardreset_lines_asserted(oh))
1927 _add_initiator_dep(oh, mpu_oh);
1931 * A clockdomain must be in SW_SUP before enabling
1932 * completely the module. The clockdomain can be set
1933 * in HW_AUTO only when the module become ready.
1935 clkdm_deny_idle(oh->clkdm);
1936 r = clkdm_hwmod_enable(oh->clkdm, oh);
1938 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1939 oh->name, oh->clkdm->name, r);
1945 if (soc_ops.enable_module)
1946 soc_ops.enable_module(oh);
1947 if (oh->flags & HWMOD_BLOCK_WFI)
1948 cpu_idle_poll_ctrl(true);
1950 if (soc_ops.update_context_lost)
1951 soc_ops.update_context_lost(oh);
1953 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1955 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1956 clkdm_allow_idle(oh->clkdm);
1959 oh->_state = _HWMOD_STATE_ENABLED;
1961 /* Access the sysconfig only if the target is ready */
1962 if (oh->class->sysc) {
1963 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1964 _update_sysc_cache(oh);
1967 r = _enable_preprogram(oh);
1969 if (soc_ops.disable_module)
1970 soc_ops.disable_module(oh);
1971 _disable_clocks(oh);
1972 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1976 clkdm_hwmod_disable(oh->clkdm, oh);
1983 * _idle - idle an omap_hwmod
1984 * @oh: struct omap_hwmod *
1986 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1987 * no further work. Returns -EINVAL if the hwmod is in the wrong
1988 * state or returns 0.
1990 static int _idle(struct omap_hwmod *oh)
1992 if (oh->flags & HWMOD_NO_IDLE) {
1993 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1997 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1999 if (_are_all_hardreset_lines_asserted(oh))
2002 if (oh->_state != _HWMOD_STATE_ENABLED) {
2003 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2008 if (oh->class->sysc)
2010 _del_initiator_dep(oh, mpu_oh);
2013 * If HWMOD_CLKDM_NOAUTO is set then we don't
2014 * deny idle the clkdm again since idle was already denied
2017 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2018 clkdm_deny_idle(oh->clkdm);
2020 if (oh->flags & HWMOD_BLOCK_WFI)
2021 cpu_idle_poll_ctrl(false);
2022 if (soc_ops.disable_module)
2023 soc_ops.disable_module(oh);
2026 * The module must be in idle mode before disabling any parents
2027 * clocks. Otherwise, the parent clock might be disabled before
2028 * the module transition is done, and thus will prevent the
2029 * transition to complete properly.
2031 _disable_clocks(oh);
2033 clkdm_allow_idle(oh->clkdm);
2034 clkdm_hwmod_disable(oh->clkdm, oh);
2037 oh->_state = _HWMOD_STATE_IDLE;
2043 * _shutdown - shutdown an omap_hwmod
2044 * @oh: struct omap_hwmod *
2046 * Shut down an omap_hwmod @oh. This should be called when the driver
2047 * used for the hwmod is removed or unloaded or if the driver is not
2048 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2049 * state or returns 0.
2051 static int _shutdown(struct omap_hwmod *oh)
2056 if (_are_all_hardreset_lines_asserted(oh))
2059 if (oh->_state != _HWMOD_STATE_IDLE &&
2060 oh->_state != _HWMOD_STATE_ENABLED) {
2061 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2066 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2068 if (oh->class->pre_shutdown) {
2069 prev_state = oh->_state;
2070 if (oh->_state == _HWMOD_STATE_IDLE)
2072 ret = oh->class->pre_shutdown(oh);
2074 if (prev_state == _HWMOD_STATE_IDLE)
2080 if (oh->class->sysc) {
2081 if (oh->_state == _HWMOD_STATE_IDLE)
2086 /* clocks and deps are already disabled in idle */
2087 if (oh->_state == _HWMOD_STATE_ENABLED) {
2088 _del_initiator_dep(oh, mpu_oh);
2089 /* XXX what about the other system initiators here? dma, dsp */
2090 if (oh->flags & HWMOD_BLOCK_WFI)
2091 cpu_idle_poll_ctrl(false);
2092 if (soc_ops.disable_module)
2093 soc_ops.disable_module(oh);
2094 _disable_clocks(oh);
2096 clkdm_hwmod_disable(oh->clkdm, oh);
2098 /* XXX Should this code also force-disable the optional clocks? */
2100 for (i = 0; i < oh->rst_lines_cnt; i++)
2101 _assert_hardreset(oh, oh->rst_lines[i].name);
2103 oh->_state = _HWMOD_STATE_DISABLED;
2108 static int of_dev_find_hwmod(struct device_node *np,
2109 struct omap_hwmod *oh)
2114 count = of_property_count_strings(np, "ti,hwmods");
2118 for (i = 0; i < count; i++) {
2119 res = of_property_read_string_index(np, "ti,hwmods",
2123 if (!strcmp(p, oh->name)) {
2124 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2134 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2135 * @np: struct device_node *
2136 * @oh: struct omap_hwmod *
2137 * @index: index of the entry found
2138 * @found: struct device_node * found or NULL
2140 * Parse the dt blob and find out needed hwmod. Recursive function is
2141 * implemented to take care hierarchical dt blob parsing.
2142 * Return: Returns 0 on success, -ENODEV when not found.
2144 static int of_dev_hwmod_lookup(struct device_node *np,
2145 struct omap_hwmod *oh,
2147 struct device_node **found)
2149 struct device_node *np0 = NULL;
2152 res = of_dev_find_hwmod(np, oh);
2159 for_each_child_of_node(np, np0) {
2160 struct device_node *fc;
2163 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2178 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2180 * @oh: struct omap_hwmod *
2181 * @np: struct device_node *
2183 * Fix up module register offsets for modules with mpu_rt_idx.
2184 * Only needed for cpsw with interconnect target module defined
2185 * in device tree while still using legacy hwmod platform data
2186 * for rev, sysc and syss registers.
2188 * Can be removed when all cpsw hwmod platform data has been
2191 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2192 struct device_node *np,
2193 struct resource *res)
2195 struct device_node *child = NULL;
2198 child = of_get_next_child(np, child);
2202 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2204 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2209 * omap_hwmod_parse_module_range - map module IO range from device tree
2210 * @oh: struct omap_hwmod *
2211 * @np: struct device_node *
2213 * Parse the device tree range an interconnect target module provides
2214 * for it's child device IP blocks. This way we can support the old
2215 * "ti,hwmods" property with just dts data without a need for platform
2216 * data for IO resources. And we don't need all the child IP device
2217 * nodes available in the dts.
2219 int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2220 struct device_node *np,
2221 struct resource *res)
2223 struct property *prop;
2224 const __be32 *ranges;
2226 u32 nr_addr, nr_size;
2233 ranges = of_get_property(np, "ranges", &len);
2237 len /= sizeof(*ranges);
2242 of_property_for_each_string(np, "compatible", prop, name)
2243 if (!strncmp("ti,sysc-", name, 8))
2249 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2253 error = of_property_read_u32(np, "#size-cells", &nr_size);
2257 if (nr_addr != 1 || nr_size != 1) {
2258 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2264 base = of_translate_address(np, ranges++);
2265 size = be32_to_cpup(ranges);
2267 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2268 oh->name, np, base, size);
2270 if (oh && oh->mpu_rt_idx) {
2271 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2277 res->end = base + size - 1;
2278 res->flags = IORESOURCE_MEM;
2284 * _init_mpu_rt_base - populate the virtual address for a hwmod
2285 * @oh: struct omap_hwmod * to locate the virtual address
2286 * @data: (unused, caller should pass NULL)
2287 * @index: index of the reg entry iospace in device tree
2288 * @np: struct device_node * of the IP block's device node in the DT data
2290 * Cache the virtual address used by the MPU to access this IP block's
2291 * registers. This address is needed early so the OCP registers that
2292 * are part of the device's address space can be ioremapped properly.
2294 * If SYSC access is not needed, the registers will not be remapped
2295 * and non-availability of MPU access is not treated as an error.
2297 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2298 * -ENXIO on absent or invalid register target address space.
2300 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2301 int index, struct device_node *np)
2303 void __iomem *va_start = NULL;
2304 struct resource res;
2310 _save_mpu_port_index(oh);
2312 /* if we don't need sysc access we don't need to ioremap */
2313 if (!oh->class->sysc)
2316 /* we can't continue without MPU PORT if we need sysc access */
2317 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2321 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2325 /* Do we have a dts range for the interconnect target module? */
2326 error = omap_hwmod_parse_module_range(oh, np, &res);
2328 va_start = ioremap(res.start, resource_size(&res));
2330 /* No ranges, rely on device reg entry */
2332 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2334 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2335 oh->name, index, np);
2339 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2340 oh->name, va_start);
2342 oh->_mpu_rt_va = va_start;
2347 * _init - initialize internal data for the hwmod @oh
2348 * @oh: struct omap_hwmod *
2351 * Look up the clocks and the address space used by the MPU to access
2352 * registers belonging to the hwmod @oh. @oh must already be
2353 * registered at this point. This is the first of two phases for
2354 * hwmod initialization. Code called here does not touch any hardware
2355 * registers, it simply prepares internal data structures. Returns 0
2356 * upon success or if the hwmod isn't registered or if the hwmod's
2357 * address space is not defined, or -EINVAL upon failure.
2359 static int __init _init(struct omap_hwmod *oh, void *data)
2362 struct device_node *np = NULL;
2363 struct device_node *bus;
2365 if (oh->_state != _HWMOD_STATE_REGISTERED)
2368 bus = of_find_node_by_name(NULL, "ocp");
2372 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2374 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2375 else if (np && index)
2376 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2379 r = _init_mpu_rt_base(oh, NULL, index, np);
2381 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2386 r = _init_clocks(oh, np);
2388 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2393 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2394 oh->flags |= HWMOD_INIT_NO_RESET;
2395 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2396 oh->flags |= HWMOD_INIT_NO_IDLE;
2397 if (of_find_property(np, "ti,no-idle", NULL))
2398 oh->flags |= HWMOD_NO_IDLE;
2401 oh->_state = _HWMOD_STATE_INITIALIZED;
2407 * _setup_iclk_autoidle - configure an IP block's interface clocks
2408 * @oh: struct omap_hwmod *
2410 * Set up the module's interface clocks. XXX This function is still mostly
2411 * a stub; implementing this properly requires iclk autoidle usecounting in
2412 * the clock code. No return value.
2414 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2416 struct omap_hwmod_ocp_if *os;
2418 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2421 list_for_each_entry(os, &oh->slave_ports, node) {
2425 if (os->flags & OCPIF_SWSUP_IDLE) {
2426 /* XXX omap_iclk_deny_idle(c); */
2428 /* XXX omap_iclk_allow_idle(c); */
2429 clk_enable(os->_clk);
2437 * _setup_reset - reset an IP block during the setup process
2438 * @oh: struct omap_hwmod *
2440 * Reset the IP block corresponding to the hwmod @oh during the setup
2441 * process. The IP block is first enabled so it can be successfully
2442 * reset. Returns 0 upon success or a negative error code upon
2445 static int __init _setup_reset(struct omap_hwmod *oh)
2449 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2452 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2455 if (oh->rst_lines_cnt == 0) {
2458 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2459 oh->name, oh->_state);
2464 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2471 * _setup_postsetup - transition to the appropriate state after _setup
2472 * @oh: struct omap_hwmod *
2474 * Place an IP block represented by @oh into a "post-setup" state --
2475 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2476 * this function is called at the end of _setup().) The postsetup
2477 * state for an IP block can be changed by calling
2478 * omap_hwmod_enter_postsetup_state() early in the boot process,
2479 * before one of the omap_hwmod_setup*() functions are called for the
2482 * The IP block stays in this state until a PM runtime-based driver is
2483 * loaded for that IP block. A post-setup state of IDLE is
2484 * appropriate for almost all IP blocks with runtime PM-enabled
2485 * drivers, since those drivers are able to enable the IP block. A
2486 * post-setup state of ENABLED is appropriate for kernels with PM
2487 * runtime disabled. The DISABLED state is appropriate for unusual IP
2488 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2489 * included, since the WDTIMER starts running on reset and will reset
2490 * the MPU if left active.
2492 * This post-setup mechanism is deprecated. Once all of the OMAP
2493 * drivers have been converted to use PM runtime, and all of the IP
2494 * block data and interconnect data is available to the hwmod code, it
2495 * should be possible to replace this mechanism with a "lazy reset"
2496 * arrangement. In a "lazy reset" setup, each IP block is enabled
2497 * when the driver first probes, then all remaining IP blocks without
2498 * drivers are either shut down or enabled after the drivers have
2499 * loaded. However, this cannot take place until the above
2500 * preconditions have been met, since otherwise the late reset code
2501 * has no way of knowing which IP blocks are in use by drivers, and
2502 * which ones are unused.
2506 static void __init _setup_postsetup(struct omap_hwmod *oh)
2510 if (oh->rst_lines_cnt > 0)
2513 postsetup_state = oh->_postsetup_state;
2514 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2515 postsetup_state = _HWMOD_STATE_ENABLED;
2518 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2519 * it should be set by the core code as a runtime flag during startup
2521 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2522 (postsetup_state == _HWMOD_STATE_IDLE)) {
2523 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2524 postsetup_state = _HWMOD_STATE_ENABLED;
2527 if (postsetup_state == _HWMOD_STATE_IDLE)
2529 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2531 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2532 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2533 oh->name, postsetup_state);
2539 * _setup - prepare IP block hardware for use
2540 * @oh: struct omap_hwmod *
2541 * @n: (unused, pass NULL)
2543 * Configure the IP block represented by @oh. This may include
2544 * enabling the IP block, resetting it, and placing it into a
2545 * post-setup state, depending on the type of IP block and applicable
2546 * flags. IP blocks are reset to prevent any previous configuration
2547 * by the bootloader or previous operating system from interfering
2548 * with power management or other parts of the system. The reset can
2549 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2550 * two phases for hwmod initialization. Code called here generally
2551 * affects the IP block hardware, or system integration hardware
2552 * associated with the IP block. Returns 0.
2554 static int _setup(struct omap_hwmod *oh, void *data)
2556 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2559 if (oh->parent_hwmod) {
2562 r = _enable(oh->parent_hwmod);
2563 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2564 oh->name, oh->parent_hwmod->name);
2567 _setup_iclk_autoidle(oh);
2569 if (!_setup_reset(oh))
2570 _setup_postsetup(oh);
2572 if (oh->parent_hwmod) {
2575 postsetup_state = oh->parent_hwmod->_postsetup_state;
2577 if (postsetup_state == _HWMOD_STATE_IDLE)
2578 _idle(oh->parent_hwmod);
2579 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2580 _shutdown(oh->parent_hwmod);
2581 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2582 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2583 oh->parent_hwmod->name, postsetup_state);
2590 * _register - register a struct omap_hwmod
2591 * @oh: struct omap_hwmod *
2593 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2594 * already has been registered by the same name; -EINVAL if the
2595 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2596 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2597 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2600 * XXX The data should be copied into bootmem, so the original data
2601 * should be marked __initdata and freed after init. This would allow
2602 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2603 * that the copy process would be relatively complex due to the large number
2606 static int __init _register(struct omap_hwmod *oh)
2608 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2609 (oh->_state != _HWMOD_STATE_UNKNOWN))
2612 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2614 if (_lookup(oh->name))
2617 list_add_tail(&oh->node, &omap_hwmod_list);
2619 INIT_LIST_HEAD(&oh->slave_ports);
2620 spin_lock_init(&oh->_lock);
2621 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2623 oh->_state = _HWMOD_STATE_REGISTERED;
2626 * XXX Rather than doing a strcmp(), this should test a flag
2627 * set in the hwmod data, inserted by the autogenerator code.
2629 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2636 * _add_link - add an interconnect between two IP blocks
2637 * @oi: pointer to a struct omap_hwmod_ocp_if record
2639 * Add struct omap_hwmod_link records connecting the slave IP block
2640 * specified in @oi->slave to @oi. This code is assumed to run before
2641 * preemption or SMP has been enabled, thus avoiding the need for
2642 * locking in this code. Changes to this assumption will require
2643 * additional locking. Returns 0.
2645 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2647 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2650 list_add(&oi->node, &oi->slave->slave_ports);
2651 oi->slave->slaves_cnt++;
2657 * _register_link - register a struct omap_hwmod_ocp_if
2658 * @oi: struct omap_hwmod_ocp_if *
2660 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2661 * has already been registered; -EINVAL if @oi is NULL or if the
2662 * record pointed to by @oi is missing required fields; or 0 upon
2665 * XXX The data should be copied into bootmem, so the original data
2666 * should be marked __initdata and freed after init. This would allow
2667 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2669 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2671 if (!oi || !oi->master || !oi->slave || !oi->user)
2674 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2677 pr_debug("omap_hwmod: registering link from %s to %s\n",
2678 oi->master->name, oi->slave->name);
2681 * Register the connected hwmods, if they haven't been
2682 * registered already
2684 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2685 _register(oi->master);
2687 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2688 _register(oi->slave);
2692 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2697 /* Static functions intended only for use in soc_ops field function pointers */
2700 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2701 * @oh: struct omap_hwmod *
2703 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2704 * does not have an IDLEST bit or if the module successfully leaves
2705 * slave idle; otherwise, pass along the return value of the
2706 * appropriate *_cm*_wait_module_ready() function.
2708 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2713 if (oh->flags & HWMOD_NO_IDLEST)
2716 if (!_find_mpu_rt_port(oh))
2719 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2721 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2722 oh->prcm.omap2.idlest_reg_id,
2723 oh->prcm.omap2.idlest_idle_bit);
2727 * _omap4_wait_target_ready - wait for a module to leave slave idle
2728 * @oh: struct omap_hwmod *
2730 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2731 * does not have an IDLEST bit or if the module successfully leaves
2732 * slave idle; otherwise, pass along the return value of the
2733 * appropriate *_cm*_wait_module_ready() function.
2735 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2740 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2743 if (!_find_mpu_rt_port(oh))
2746 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2749 if (!_omap4_has_clkctrl_clock(oh))
2752 /* XXX check module SIDLEMODE, hardreset status */
2754 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2756 oh->prcm.omap4.clkctrl_offs, 0);
2760 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2761 * @oh: struct omap_hwmod * to assert hardreset
2762 * @ohri: hardreset line data
2764 * Call omap2_prm_assert_hardreset() with parameters extracted from
2765 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2766 * use as an soc_ops function pointer. Passes along the return value
2767 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2768 * for removal when the PRM code is moved into drivers/.
2770 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2771 struct omap_hwmod_rst_info *ohri)
2773 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2774 oh->prcm.omap2.module_offs, 0);
2778 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2779 * @oh: struct omap_hwmod * to deassert hardreset
2780 * @ohri: hardreset line data
2782 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2783 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2784 * use as an soc_ops function pointer. Passes along the return value
2785 * from omap2_prm_deassert_hardreset(). XXX This function is
2786 * scheduled for removal when the PRM code is moved into drivers/.
2788 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2789 struct omap_hwmod_rst_info *ohri)
2791 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2792 oh->prcm.omap2.module_offs, 0, 0);
2796 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2797 * @oh: struct omap_hwmod * to test hardreset
2798 * @ohri: hardreset line data
2800 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2801 * from the hwmod @oh and the hardreset line data @ohri. Only
2802 * intended for use as an soc_ops function pointer. Passes along the
2803 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2804 * function is scheduled for removal when the PRM code is moved into
2807 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2808 struct omap_hwmod_rst_info *ohri)
2810 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2811 oh->prcm.omap2.module_offs, 0);
2815 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2816 * @oh: struct omap_hwmod * to assert hardreset
2817 * @ohri: hardreset line data
2819 * Call omap4_prminst_assert_hardreset() with parameters extracted
2820 * from the hwmod @oh and the hardreset line data @ohri. Only
2821 * intended for use as an soc_ops function pointer. Passes along the
2822 * return value from omap4_prminst_assert_hardreset(). XXX This
2823 * function is scheduled for removal when the PRM code is moved into
2826 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2827 struct omap_hwmod_rst_info *ohri)
2832 return omap_prm_assert_hardreset(ohri->rst_shift,
2833 oh->clkdm->pwrdm.ptr->prcm_partition,
2834 oh->clkdm->pwrdm.ptr->prcm_offs,
2835 oh->prcm.omap4.rstctrl_offs);
2839 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2840 * @oh: struct omap_hwmod * to deassert hardreset
2841 * @ohri: hardreset line data
2843 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2844 * from the hwmod @oh and the hardreset line data @ohri. Only
2845 * intended for use as an soc_ops function pointer. Passes along the
2846 * return value from omap4_prminst_deassert_hardreset(). XXX This
2847 * function is scheduled for removal when the PRM code is moved into
2850 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2851 struct omap_hwmod_rst_info *ohri)
2857 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2858 oh->name, ohri->name);
2859 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2860 oh->clkdm->pwrdm.ptr->prcm_partition,
2861 oh->clkdm->pwrdm.ptr->prcm_offs,
2862 oh->prcm.omap4.rstctrl_offs,
2863 oh->prcm.omap4.rstctrl_offs +
2864 OMAP4_RST_CTRL_ST_OFFSET);
2868 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2869 * @oh: struct omap_hwmod * to test hardreset
2870 * @ohri: hardreset line data
2872 * Call omap4_prminst_is_hardreset_asserted() with parameters
2873 * extracted from the hwmod @oh and the hardreset line data @ohri.
2874 * Only intended for use as an soc_ops function pointer. Passes along
2875 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2876 * This function is scheduled for removal when the PRM code is moved
2879 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2880 struct omap_hwmod_rst_info *ohri)
2885 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2886 oh->clkdm->pwrdm.ptr->
2888 oh->clkdm->pwrdm.ptr->prcm_offs,
2889 oh->prcm.omap4.rstctrl_offs);
2893 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2894 * @oh: struct omap_hwmod * to disable control for
2896 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2897 * will be using its main_clk to enable/disable the module. Returns
2900 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2905 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2911 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2912 * @oh: struct omap_hwmod * to deassert hardreset
2913 * @ohri: hardreset line data
2915 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2916 * from the hwmod @oh and the hardreset line data @ohri. Only
2917 * intended for use as an soc_ops function pointer. Passes along the
2918 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2919 * function is scheduled for removal when the PRM code is moved into
2922 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2923 struct omap_hwmod_rst_info *ohri)
2925 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2926 oh->clkdm->pwrdm.ptr->prcm_partition,
2927 oh->clkdm->pwrdm.ptr->prcm_offs,
2928 oh->prcm.omap4.rstctrl_offs,
2929 oh->prcm.omap4.rstst_offs);
2932 /* Public functions */
2934 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2936 if (oh->flags & HWMOD_16BIT_REG)
2937 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2939 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2942 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2944 if (oh->flags & HWMOD_16BIT_REG)
2945 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2947 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2951 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2952 * @oh: struct omap_hwmod *
2954 * This is a public function exposed to drivers. Some drivers may need to do
2955 * some settings before and after resetting the device. Those drivers after
2956 * doing the necessary settings could use this function to start a reset by
2957 * setting the SYSCONFIG.SOFTRESET bit.
2959 int omap_hwmod_softreset(struct omap_hwmod *oh)
2964 if (!oh || !(oh->_sysc_cache))
2967 v = oh->_sysc_cache;
2968 ret = _set_softreset(oh, &v);
2971 _write_sysconfig(v, oh);
2973 ret = _clear_softreset(oh, &v);
2976 _write_sysconfig(v, oh);
2983 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2984 * @name: name of the omap_hwmod to look up
2986 * Given a @name of an omap_hwmod, return a pointer to the registered
2987 * struct omap_hwmod *, or NULL upon error.
2989 struct omap_hwmod *omap_hwmod_lookup(const char *name)
2991 struct omap_hwmod *oh;
3002 * omap_hwmod_for_each - call function for each registered omap_hwmod
3003 * @fn: pointer to a callback function
3004 * @data: void * data to pass to callback function
3006 * Call @fn for each registered omap_hwmod, passing @data to each
3007 * function. @fn must return 0 for success or any other value for
3008 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3009 * will stop and the non-zero return value will be passed to the
3010 * caller of omap_hwmod_for_each(). @fn is called with
3011 * omap_hwmod_for_each() held.
3013 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3016 struct omap_hwmod *temp_oh;
3022 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3023 ret = (*fn)(temp_oh, data);
3032 * omap_hwmod_register_links - register an array of hwmod links
3033 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3035 * Intended to be called early in boot before the clock framework is
3036 * initialized. If @ois is not null, will register all omap_hwmods
3037 * listed in @ois that are valid for this chip. Returns -EINVAL if
3038 * omap_hwmod_init() hasn't been called before calling this function,
3039 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3042 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3052 if (ois[0] == NULL) /* Empty list */
3057 r = _register_link(ois[i]);
3058 WARN(r && r != -EEXIST,
3059 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3060 ois[i]->master->name, ois[i]->slave->name, r);
3067 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3068 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3070 * If the hwmod data corresponding to the MPU subsystem IP block
3071 * hasn't been initialized and set up yet, do so now. This must be
3072 * done first since sleep dependencies may be added from other hwmods
3073 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3076 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3078 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3079 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3080 __func__, MPU_INITIATOR_NAME);
3081 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3082 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3086 * omap_hwmod_setup_one - set up a single hwmod
3087 * @oh_name: const char * name of the already-registered hwmod to set up
3089 * Initialize and set up a single hwmod. Intended to be used for a
3090 * small number of early devices, such as the timer IP blocks used for
3091 * the scheduler clock. Must be called after omap2_clk_init().
3092 * Resolves the struct clk names to struct clk pointers for each
3093 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3094 * -EINVAL upon error or 0 upon success.
3096 int __init omap_hwmod_setup_one(const char *oh_name)
3098 struct omap_hwmod *oh;
3100 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3102 oh = _lookup(oh_name);
3104 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3108 _ensure_mpu_hwmod_is_setup(oh);
3116 static void omap_hwmod_check_one(struct device *dev,
3117 const char *name, s8 v1, u8 v2)
3123 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3127 * omap_hwmod_check_sysc - check sysc against platform sysc
3128 * @dev: struct device
3129 * @data: module data
3130 * @sysc_fields: new sysc configuration
3132 static int omap_hwmod_check_sysc(struct device *dev,
3133 const struct ti_sysc_module_data *data,
3134 struct sysc_regbits *sysc_fields)
3136 const struct sysc_regbits *regbits = data->cap->regbits;
3138 omap_hwmod_check_one(dev, "dmadisable_shift",
3139 regbits->dmadisable_shift,
3140 sysc_fields->dmadisable_shift);
3141 omap_hwmod_check_one(dev, "midle_shift",
3142 regbits->midle_shift,
3143 sysc_fields->midle_shift);
3144 omap_hwmod_check_one(dev, "sidle_shift",
3145 regbits->sidle_shift,
3146 sysc_fields->sidle_shift);
3147 omap_hwmod_check_one(dev, "clkact_shift",
3148 regbits->clkact_shift,
3149 sysc_fields->clkact_shift);
3150 omap_hwmod_check_one(dev, "enwkup_shift",
3151 regbits->enwkup_shift,
3152 sysc_fields->enwkup_shift);
3153 omap_hwmod_check_one(dev, "srst_shift",
3154 regbits->srst_shift,
3155 sysc_fields->srst_shift);
3156 omap_hwmod_check_one(dev, "autoidle_shift",
3157 regbits->autoidle_shift,
3158 sysc_fields->autoidle_shift);
3164 * omap_hwmod_init_regbits - init sysconfig specific register bits
3165 * @dev: struct device
3166 * @data: module data
3167 * @sysc_fields: new sysc configuration
3169 static int omap_hwmod_init_regbits(struct device *dev,
3170 const struct ti_sysc_module_data *data,
3171 struct sysc_regbits **sysc_fields)
3173 *sysc_fields = NULL;
3175 switch (data->cap->type) {
3177 case TI_SYSC_OMAP2_TIMER:
3178 *sysc_fields = &omap_hwmod_sysc_type1;
3180 case TI_SYSC_OMAP3_SHAM:
3181 *sysc_fields = &omap3_sham_sysc_fields;
3183 case TI_SYSC_OMAP3_AES:
3184 *sysc_fields = &omap3xxx_aes_sysc_fields;
3187 case TI_SYSC_OMAP4_TIMER:
3188 *sysc_fields = &omap_hwmod_sysc_type2;
3190 case TI_SYSC_OMAP4_SIMPLE:
3191 *sysc_fields = &omap_hwmod_sysc_type3;
3193 case TI_SYSC_OMAP34XX_SR:
3194 *sysc_fields = &omap34xx_sr_sysc_fields;
3196 case TI_SYSC_OMAP36XX_SR:
3197 *sysc_fields = &omap36xx_sr_sysc_fields;
3199 case TI_SYSC_OMAP4_SR:
3200 *sysc_fields = &omap36xx_sr_sysc_fields;
3202 case TI_SYSC_OMAP4_MCASP:
3203 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3205 case TI_SYSC_OMAP4_USB_HOST_FS:
3206 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3212 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3216 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3217 * @dev: struct device
3218 * @data: module data
3219 * @rev_offs: revision register offset
3220 * @sysc_offs: sysc register offset
3221 * @syss_offs: syss register offset
3223 int omap_hwmod_init_reg_offs(struct device *dev,
3224 const struct ti_sysc_module_data *data,
3225 s32 *rev_offs, s32 *sysc_offs, s32 *syss_offs)
3227 *rev_offs = -ENODEV;
3231 if (data->offsets[SYSC_REVISION] >= 0)
3232 *rev_offs = data->offsets[SYSC_REVISION];
3234 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3235 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3237 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3238 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3244 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3245 * @dev: struct device
3246 * @data: module data
3247 * @sysc_flags: module configuration
3249 int omap_hwmod_init_sysc_flags(struct device *dev,
3250 const struct ti_sysc_module_data *data,
3255 switch (data->cap->type) {
3257 case TI_SYSC_OMAP2_TIMER:
3258 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3259 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3260 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3261 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3262 *sysc_flags |= SYSC_HAS_EMUFREE;
3263 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3264 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3265 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3266 *sysc_flags |= SYSC_HAS_SOFTRESET;
3267 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3268 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3271 case TI_SYSC_OMAP4_TIMER:
3272 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3273 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3274 *sysc_flags |= SYSC_HAS_DMADISABLE;
3275 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3276 *sysc_flags |= SYSC_HAS_EMUFREE;
3277 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3278 *sysc_flags |= SYSC_HAS_SOFTRESET;
3280 case TI_SYSC_OMAP34XX_SR:
3281 case TI_SYSC_OMAP36XX_SR:
3282 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3283 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3284 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3287 if (data->cap->regbits->emufree_shift >= 0)
3288 *sysc_flags |= SYSC_HAS_EMUFREE;
3289 if (data->cap->regbits->enwkup_shift >= 0)
3290 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3291 if (data->cap->regbits->srst_shift >= 0)
3292 *sysc_flags |= SYSC_HAS_SOFTRESET;
3293 if (data->cap->regbits->autoidle_shift >= 0)
3294 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3298 if (data->cap->regbits->midle_shift >= 0 &&
3299 data->cfg->midlemodes)
3300 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3302 if (data->cap->regbits->sidle_shift >= 0 &&
3303 data->cfg->sidlemodes)
3304 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3306 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3307 *sysc_flags |= SYSC_NO_CACHE;
3308 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3309 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3311 if (data->cfg->syss_mask & 1)
3312 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3318 * omap_hwmod_init_idlemodes - initialize module idle modes
3319 * @dev: struct device
3320 * @data: module data
3321 * @idlemodes: module supported idle modes
3323 int omap_hwmod_init_idlemodes(struct device *dev,
3324 const struct ti_sysc_module_data *data,
3329 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3330 *idlemodes |= MSTANDBY_FORCE;
3331 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3332 *idlemodes |= MSTANDBY_NO;
3333 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3334 *idlemodes |= MSTANDBY_SMART;
3335 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3336 *idlemodes |= MSTANDBY_SMART_WKUP;
3338 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3339 *idlemodes |= SIDLE_FORCE;
3340 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3341 *idlemodes |= SIDLE_NO;
3342 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3343 *idlemodes |= SIDLE_SMART;
3344 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3345 *idlemodes |= SIDLE_SMART_WKUP;
3351 * omap_hwmod_check_module - check new module against platform data
3352 * @dev: struct device
3354 * @data: new module data
3355 * @sysc_fields: sysc register bits
3356 * @rev_offs: revision register offset
3357 * @sysc_offs: sysconfig register offset
3358 * @syss_offs: sysstatus register offset
3359 * @sysc_flags: sysc specific flags
3360 * @idlemodes: sysc supported idlemodes
3362 static int omap_hwmod_check_module(struct device *dev,
3363 struct omap_hwmod *oh,
3364 const struct ti_sysc_module_data *data,
3365 struct sysc_regbits *sysc_fields,
3366 s32 rev_offs, s32 sysc_offs,
3367 s32 syss_offs, u32 sysc_flags,
3370 if (!oh->class->sysc)
3373 if (sysc_fields != oh->class->sysc->sysc_fields)
3374 dev_warn(dev, "sysc_fields %p != %p\n", sysc_fields,
3375 oh->class->sysc->sysc_fields);
3377 if (rev_offs != oh->class->sysc->rev_offs)
3378 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3379 oh->class->sysc->rev_offs);
3380 if (sysc_offs != oh->class->sysc->sysc_offs)
3381 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3382 oh->class->sysc->sysc_offs);
3383 if (syss_offs != oh->class->sysc->syss_offs)
3384 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3385 oh->class->sysc->syss_offs);
3387 if (sysc_flags != oh->class->sysc->sysc_flags)
3388 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3389 oh->class->sysc->sysc_flags);
3391 if (idlemodes != oh->class->sysc->idlemodes)
3392 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3393 oh->class->sysc->idlemodes);
3395 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3396 dev_warn(dev, "srst_udelay %i != %i\n",
3397 data->cfg->srst_udelay,
3398 oh->class->sysc->srst_udelay);
3404 * omap_hwmod_allocate_module - allocate new module
3405 * @dev: struct device
3407 * @sysc_fields: sysc register bits
3408 * @rev_offs: revision register offset
3409 * @sysc_offs: sysconfig register offset
3410 * @syss_offs: sysstatus register offset
3411 * @sysc_flags: sysc specific flags
3412 * @idlemodes: sysc supported idlemodes
3414 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3416 int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3417 const struct ti_sysc_module_data *data,
3418 struct sysc_regbits *sysc_fields,
3419 s32 rev_offs, s32 sysc_offs, s32 syss_offs,
3420 u32 sysc_flags, u32 idlemodes)
3422 struct omap_hwmod_class_sysconfig *sysc;
3423 struct omap_hwmod_class *class;
3424 void __iomem *regs = NULL;
3425 unsigned long flags;
3427 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3431 sysc->sysc_fields = sysc_fields;
3432 sysc->rev_offs = rev_offs;
3433 sysc->sysc_offs = sysc_offs;
3434 sysc->syss_offs = syss_offs;
3435 sysc->sysc_flags = sysc_flags;
3436 sysc->idlemodes = idlemodes;
3437 sysc->srst_udelay = data->cfg->srst_udelay;
3439 if (!oh->_mpu_rt_va) {
3440 regs = ioremap(data->module_pa,
3447 * We need new oh->class as the other devices in the same class
3448 * may not yet have ioremapped their registers.
3450 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3456 spin_lock_irqsave(&oh->_lock, flags);
3458 oh->_mpu_rt_va = regs;
3460 oh->_state = _HWMOD_STATE_INITIALIZED;
3462 spin_unlock_irqrestore(&oh->_lock, flags);
3468 * omap_hwmod_init_module - initialize new module
3469 * @dev: struct device
3470 * @data: module data
3471 * @cookie: cookie for the caller to use for later calls
3473 int omap_hwmod_init_module(struct device *dev,
3474 const struct ti_sysc_module_data *data,
3475 struct ti_sysc_cookie *cookie)
3477 struct omap_hwmod *oh;
3478 struct sysc_regbits *sysc_fields;
3479 s32 rev_offs, sysc_offs, syss_offs;
3480 u32 sysc_flags, idlemodes;
3486 oh = _lookup(data->name);
3492 error = omap_hwmod_init_regbits(dev, data, &sysc_fields);
3496 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3497 &sysc_offs, &syss_offs);
3501 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3505 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3509 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3510 oh->flags |= HWMOD_INIT_NO_IDLE;
3511 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3512 oh->flags |= HWMOD_INIT_NO_RESET;
3514 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3515 rev_offs, sysc_offs, syss_offs,
3516 sysc_flags, idlemodes);
3520 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3521 rev_offs, sysc_offs, syss_offs,
3522 sysc_flags, idlemodes);
3526 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3528 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3529 * early concole so that hwmod core doesn't reset and keep it in idle
3530 * that specific uart.
3532 #ifdef CONFIG_SERIAL_EARLYCON
3533 static void __init omap_hwmod_setup_earlycon_flags(void)
3535 struct device_node *np;
3536 struct omap_hwmod *oh;
3539 np = of_find_node_by_path("/chosen");
3541 uart = of_get_property(np, "stdout-path", NULL);
3543 np = of_find_node_by_path(uart);
3545 uart = of_get_property(np, "ti,hwmods", NULL);
3546 oh = omap_hwmod_lookup(uart);
3548 uart = of_get_property(np->parent,
3551 oh = omap_hwmod_lookup(uart);
3554 oh->flags |= DEBUG_OMAPUART_FLAGS;
3562 * omap_hwmod_setup_all - set up all registered IP blocks
3564 * Initialize and set up all IP blocks registered with the hwmod code.
3565 * Must be called after omap2_clk_init(). Resolves the struct clk
3566 * names to struct clk pointers for each registered omap_hwmod. Also
3567 * calls _setup() on each hwmod. Returns 0 upon success.
3569 static int __init omap_hwmod_setup_all(void)
3571 _ensure_mpu_hwmod_is_setup(NULL);
3573 omap_hwmod_for_each(_init, NULL);
3574 #ifdef CONFIG_SERIAL_EARLYCON
3575 omap_hwmod_setup_earlycon_flags();
3577 omap_hwmod_for_each(_setup, NULL);
3581 omap_postcore_initcall(omap_hwmod_setup_all);
3584 * omap_hwmod_enable - enable an omap_hwmod
3585 * @oh: struct omap_hwmod *
3587 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3588 * Returns -EINVAL on error or passes along the return value from _enable().
3590 int omap_hwmod_enable(struct omap_hwmod *oh)
3593 unsigned long flags;
3598 spin_lock_irqsave(&oh->_lock, flags);
3600 spin_unlock_irqrestore(&oh->_lock, flags);
3606 * omap_hwmod_idle - idle an omap_hwmod
3607 * @oh: struct omap_hwmod *
3609 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3610 * Returns -EINVAL on error or passes along the return value from _idle().
3612 int omap_hwmod_idle(struct omap_hwmod *oh)
3615 unsigned long flags;
3620 spin_lock_irqsave(&oh->_lock, flags);
3622 spin_unlock_irqrestore(&oh->_lock, flags);
3628 * omap_hwmod_shutdown - shutdown an omap_hwmod
3629 * @oh: struct omap_hwmod *
3631 * Shutdown an omap_hwmod @oh. Intended to be called by
3632 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3633 * the return value from _shutdown().
3635 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3638 unsigned long flags;
3643 spin_lock_irqsave(&oh->_lock, flags);
3645 spin_unlock_irqrestore(&oh->_lock, flags);
3651 * IP block data retrieval functions
3655 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3656 * @oh: struct omap_hwmod *
3658 * Return the powerdomain pointer associated with the OMAP module
3659 * @oh's main clock. If @oh does not have a main clk, return the
3660 * powerdomain associated with the interface clock associated with the
3661 * module's MPU port. (XXX Perhaps this should use the SDMA port
3662 * instead?) Returns NULL on error, or a struct powerdomain * on
3665 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3668 struct omap_hwmod_ocp_if *oi;
3669 struct clockdomain *clkdm;
3670 struct clk_hw_omap *clk;
3676 return oh->clkdm->pwrdm.ptr;
3681 oi = _find_mpu_rt_port(oh);
3687 clk = to_clk_hw_omap(__clk_get_hw(c));
3692 return clkdm->pwrdm.ptr;
3696 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3697 * @oh: struct omap_hwmod *
3699 * Returns the virtual address corresponding to the beginning of the
3700 * module's register target, in the address range that is intended to
3701 * be used by the MPU. Returns the virtual address upon success or NULL
3704 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3709 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3712 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3715 return oh->_mpu_rt_va;
3719 * XXX what about functions for drivers to save/restore ocp_sysconfig
3720 * for context save/restore operations?
3724 * omap_hwmod_enable_wakeup - allow device to wake up the system
3725 * @oh: struct omap_hwmod *
3727 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3728 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3729 * this IP block if it has dynamic mux entries. Eventually this
3730 * should set PRCM wakeup registers to cause the PRCM to receive
3731 * wakeup events from the module. Does not set any wakeup routing
3732 * registers beyond this point - if the module is to wake up any other
3733 * module or subsystem, that must be set separately. Called by
3734 * omap_device code. Returns -EINVAL on error or 0 upon success.
3736 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3738 unsigned long flags;
3741 spin_lock_irqsave(&oh->_lock, flags);
3743 if (oh->class->sysc &&
3744 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3745 v = oh->_sysc_cache;
3746 _enable_wakeup(oh, &v);
3747 _write_sysconfig(v, oh);
3750 spin_unlock_irqrestore(&oh->_lock, flags);
3756 * omap_hwmod_disable_wakeup - prevent device from waking the system
3757 * @oh: struct omap_hwmod *
3759 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3760 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3761 * events for this IP block if it has dynamic mux entries. Eventually
3762 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3763 * wakeup events from the module. Does not set any wakeup routing
3764 * registers beyond this point - if the module is to wake up any other
3765 * module or subsystem, that must be set separately. Called by
3766 * omap_device code. Returns -EINVAL on error or 0 upon success.
3768 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3770 unsigned long flags;
3773 spin_lock_irqsave(&oh->_lock, flags);
3775 if (oh->class->sysc &&
3776 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3777 v = oh->_sysc_cache;
3778 _disable_wakeup(oh, &v);
3779 _write_sysconfig(v, oh);
3782 spin_unlock_irqrestore(&oh->_lock, flags);
3788 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3789 * contained in the hwmod module.
3790 * @oh: struct omap_hwmod *
3791 * @name: name of the reset line to lookup and assert
3793 * Some IP like dsp, ipu or iva contain processor that require
3794 * an HW reset line to be assert / deassert in order to enable fully
3795 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3796 * yet supported on this OMAP; otherwise, passes along the return value
3797 * from _assert_hardreset().
3799 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3802 unsigned long flags;
3807 spin_lock_irqsave(&oh->_lock, flags);
3808 ret = _assert_hardreset(oh, name);
3809 spin_unlock_irqrestore(&oh->_lock, flags);
3815 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3816 * contained in the hwmod module.
3817 * @oh: struct omap_hwmod *
3818 * @name: name of the reset line to look up and deassert
3820 * Some IP like dsp, ipu or iva contain processor that require
3821 * an HW reset line to be assert / deassert in order to enable fully
3822 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3823 * yet supported on this OMAP; otherwise, passes along the return value
3824 * from _deassert_hardreset().
3826 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3829 unsigned long flags;
3834 spin_lock_irqsave(&oh->_lock, flags);
3835 ret = _deassert_hardreset(oh, name);
3836 spin_unlock_irqrestore(&oh->_lock, flags);
3842 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3843 * @classname: struct omap_hwmod_class name to search for
3844 * @fn: callback function pointer to call for each hwmod in class @classname
3845 * @user: arbitrary context data to pass to the callback function
3847 * For each omap_hwmod of class @classname, call @fn.
3848 * If the callback function returns something other than
3849 * zero, the iterator is terminated, and the callback function's return
3850 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3851 * if @classname or @fn are NULL, or passes back the error code from @fn.
3853 int omap_hwmod_for_each_by_class(const char *classname,
3854 int (*fn)(struct omap_hwmod *oh,
3858 struct omap_hwmod *temp_oh;
3861 if (!classname || !fn)
3864 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3865 __func__, classname);
3867 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3868 if (!strcmp(temp_oh->class->name, classname)) {
3869 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3870 __func__, temp_oh->name);
3871 ret = (*fn)(temp_oh, user);
3878 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3885 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3886 * @oh: struct omap_hwmod *
3887 * @state: state that _setup() should leave the hwmod in
3889 * Sets the hwmod state that @oh will enter at the end of _setup()
3890 * (called by omap_hwmod_setup_*()). See also the documentation
3891 * for _setup_postsetup(), above. Returns 0 upon success or
3892 * -EINVAL if there is a problem with the arguments or if the hwmod is
3893 * in the wrong state.
3895 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3898 unsigned long flags;
3903 if (state != _HWMOD_STATE_DISABLED &&
3904 state != _HWMOD_STATE_ENABLED &&
3905 state != _HWMOD_STATE_IDLE)
3908 spin_lock_irqsave(&oh->_lock, flags);
3910 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3915 oh->_postsetup_state = state;
3919 spin_unlock_irqrestore(&oh->_lock, flags);
3925 * omap_hwmod_get_context_loss_count - get lost context count
3926 * @oh: struct omap_hwmod *
3928 * Returns the context loss count of associated @oh
3929 * upon success, or zero if no context loss data is available.
3931 * On OMAP4, this queries the per-hwmod context loss register,
3932 * assuming one exists. If not, or on OMAP2/3, this queries the
3933 * enclosing powerdomain context loss count.
3935 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3937 struct powerdomain *pwrdm;
3940 if (soc_ops.get_context_lost)
3941 return soc_ops.get_context_lost(oh);
3943 pwrdm = omap_hwmod_get_pwrdm(oh);
3945 ret = pwrdm_get_context_loss_count(pwrdm);
3951 * omap_hwmod_init - initialize the hwmod code
3953 * Sets up some function pointers needed by the hwmod code to operate on the
3954 * currently-booted SoC. Intended to be called once during kernel init
3955 * before any hwmods are registered. No return value.
3957 void __init omap_hwmod_init(void)
3959 if (cpu_is_omap24xx()) {
3960 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3961 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3962 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3963 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3964 } else if (cpu_is_omap34xx()) {
3965 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3966 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3967 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3968 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3969 soc_ops.init_clkdm = _init_clkdm;
3970 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
3971 soc_ops.enable_module = _omap4_enable_module;
3972 soc_ops.disable_module = _omap4_disable_module;
3973 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3974 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3975 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3976 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3977 soc_ops.init_clkdm = _init_clkdm;
3978 soc_ops.update_context_lost = _omap4_update_context_lost;
3979 soc_ops.get_context_lost = _omap4_get_context_lost;
3980 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3981 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3982 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
3984 soc_ops.enable_module = _omap4_enable_module;
3985 soc_ops.disable_module = _omap4_disable_module;
3986 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3987 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3988 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3989 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3990 soc_ops.init_clkdm = _init_clkdm;
3991 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3992 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3994 WARN(1, "omap_hwmod: unknown SoC type\n");
3997 _init_clkctrl_providers();
4003 * omap_hwmod_get_main_clk - get pointer to main clock name
4004 * @oh: struct omap_hwmod *
4006 * Returns the main clock name assocated with @oh upon success,
4007 * or NULL if @oh is NULL.
4009 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4014 return oh->main_clk;