2 * board-devkit8000.c - TimLL Devkit8000
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
7 * Modified from mach-omap2/board-omap3beagle.c
9 * Initial code: Syed Mohammed Khasim
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/delay.h>
20 #include <linux/err.h>
21 #include <linux/clk.h>
23 #include <linux/leds.h>
24 #include <linux/gpio.h>
25 #include <linux/input.h>
26 #include <linux/gpio_keys.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mtd/nand.h>
31 #include <linux/mmc/host.h>
33 #include <linux/regulator/machine.h>
34 #include <linux/i2c/twl.h>
36 #include <mach/hardware.h>
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
41 #include <asm/mach/flash.h>
43 #include <plat/board.h>
45 #include <plat/gpmc.h>
46 #include <plat/nand.h>
48 #include <video/omapdss.h>
49 #include <video/omap-panel-generic-dpi.h>
50 #include <video/omap-panel-tfp410.h>
52 #include <plat/mcspi.h>
53 #include <linux/input/matrix_keypad.h>
54 #include <linux/spi/spi.h>
55 #include <linux/dm9000.h>
56 #include <linux/interrupt.h>
58 #include "sdram-micron-mt46h32m32lf-6.h"
62 #include "common-board-devices.h"
64 #define OMAP_DM9000_GPIO_IRQ 25
65 #define OMAP3_DEVKIT_TS_GPIO 27
67 static struct mtd_partition devkit8000_nand_partitions[] = {
68 /* All the partition sizes are listed in terms of NAND block size */
72 .size = 4 * NAND_BLOCK_SIZE,
73 .mask_flags = MTD_WRITEABLE, /* force read-only */
77 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
78 .size = 15 * NAND_BLOCK_SIZE,
79 .mask_flags = MTD_WRITEABLE, /* force read-only */
83 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
84 .size = 1 * NAND_BLOCK_SIZE,
88 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
89 .size = 32 * NAND_BLOCK_SIZE,
92 .name = "File System",
93 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
94 .size = MTDPART_SIZ_FULL,
98 static struct omap2_hsmmc_info mmc[] = {
101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
108 static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
110 if (gpio_is_valid(dssdev->reset_gpio))
111 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
115 static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
117 if (gpio_is_valid(dssdev->reset_gpio))
118 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
121 static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
122 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
126 static struct regulator_consumer_supply devkit8000_vio_supply[] = {
127 REGULATOR_SUPPLY("vcc", "spi2.0"),
130 static struct panel_generic_dpi_data lcd_panel = {
131 .name = "innolux_at070tn83",
132 .platform_enable = devkit8000_panel_enable_lcd,
133 .platform_disable = devkit8000_panel_disable_lcd,
136 static struct omap_dss_device devkit8000_lcd_device = {
138 .type = OMAP_DISPLAY_TYPE_DPI,
139 .driver_name = "generic_dpi_panel",
141 .phy.dpi.data_lines = 24,
144 static struct tfp410_platform_data dvi_panel = {
145 .power_down_gpio = -1,
148 static struct omap_dss_device devkit8000_dvi_device = {
150 .type = OMAP_DISPLAY_TYPE_DPI,
151 .driver_name = "tfp410",
153 .phy.dpi.data_lines = 24,
156 static struct omap_dss_device devkit8000_tv_device = {
158 .driver_name = "venc",
159 .type = OMAP_DISPLAY_TYPE_VENC,
160 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
164 static struct omap_dss_device *devkit8000_dss_devices[] = {
165 &devkit8000_lcd_device,
166 &devkit8000_dvi_device,
167 &devkit8000_tv_device,
170 static struct omap_dss_board_info devkit8000_dss_data = {
171 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
172 .devices = devkit8000_dss_devices,
173 .default_device = &devkit8000_lcd_device,
176 static uint32_t board_keymap[] = {
191 PERSISTENT_KEY(4, 5),
192 KEY(4, 4, KEY_VOLUMEUP),
193 KEY(5, 5, KEY_VOLUMEDOWN),
197 static struct matrix_keymap_data board_map_data = {
198 .keymap = board_keymap,
199 .keymap_size = ARRAY_SIZE(board_keymap),
202 static struct twl4030_keypad_data devkit8000_kp_data = {
203 .keymap_data = &board_map_data,
209 static struct gpio_led gpio_leds[];
211 static int devkit8000_twl_gpio_setup(struct device *dev,
212 unsigned gpio, unsigned ngpio)
216 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
217 mmc[0].gpio_cd = gpio + 0;
218 omap_hsmmc_late_init(mmc);
220 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
221 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
223 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
224 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
225 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
226 GPIOF_OUT_INIT_LOW, "LCD_PWREN");
228 devkit8000_lcd_device.reset_gpio = -EINVAL;
229 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
232 /* gpio + 7 is "DVI_PD" (out, active low) */
233 dvi_panel.power_down_gpio = gpio + 7;
238 static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
239 .gpio_base = OMAP_MAX_GPIO_LINES,
240 .irq_base = TWL4030_GPIO_IRQ_BASE,
241 .irq_end = TWL4030_GPIO_IRQ_END,
243 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
244 | BIT(15) | BIT(16) | BIT(17),
245 .setup = devkit8000_twl_gpio_setup,
248 static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
249 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
250 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
253 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
254 static struct regulator_init_data devkit8000_vmmc1 = {
258 .valid_modes_mask = REGULATOR_MODE_NORMAL
259 | REGULATOR_MODE_STANDBY,
260 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
261 | REGULATOR_CHANGE_MODE
262 | REGULATOR_CHANGE_STATUS,
264 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
265 .consumer_supplies = devkit8000_vmmc1_supply,
268 /* VPLL1 for digital video outputs */
269 static struct regulator_init_data devkit8000_vpll1 = {
273 .valid_modes_mask = REGULATOR_MODE_NORMAL
274 | REGULATOR_MODE_STANDBY,
275 .valid_ops_mask = REGULATOR_CHANGE_MODE
276 | REGULATOR_CHANGE_STATUS,
278 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
279 .consumer_supplies = devkit8000_vpll1_supplies,
282 /* VAUX4 for ads7846 and nubs */
283 static struct regulator_init_data devkit8000_vio = {
288 .valid_modes_mask = REGULATOR_MODE_NORMAL
289 | REGULATOR_MODE_STANDBY,
290 .valid_ops_mask = REGULATOR_CHANGE_MODE
291 | REGULATOR_CHANGE_STATUS,
293 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
294 .consumer_supplies = devkit8000_vio_supply,
297 static struct twl4030_platform_data devkit8000_twldata = {
298 /* platform_data for children goes here */
299 .gpio = &devkit8000_gpio_data,
300 .vmmc1 = &devkit8000_vmmc1,
301 .vpll1 = &devkit8000_vpll1,
302 .vio = &devkit8000_vio,
303 .keypad = &devkit8000_kp_data,
306 static int __init devkit8000_i2c_init(void)
308 omap3_pmic_get_config(&devkit8000_twldata,
309 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
310 TWL_COMMON_REGULATOR_VDAC);
311 omap3_pmic_init("tps65930", &devkit8000_twldata);
312 /* Bus 3 is attached to the DVI port where devices like the pico DLP
313 * projector don't work reliably with 400kHz */
314 omap_register_i2c_bus(3, 400, NULL, 0);
318 static struct gpio_led gpio_leds[] = {
321 .default_trigger = "heartbeat",
327 .default_trigger = "mmc0",
333 .default_trigger = "none",
339 .default_trigger = "none",
345 static struct gpio_led_platform_data gpio_led_info = {
347 .num_leds = ARRAY_SIZE(gpio_leds),
350 static struct platform_device leds_gpio = {
354 .platform_data = &gpio_led_info,
358 static struct gpio_keys_button gpio_buttons[] = {
367 static struct gpio_keys_platform_data gpio_key_info = {
368 .buttons = gpio_buttons,
369 .nbuttons = ARRAY_SIZE(gpio_buttons),
372 static struct platform_device keys_gpio = {
376 .platform_data = &gpio_key_info,
380 #define OMAP_DM9000_BASE 0x2c000000
382 static struct resource omap_dm9000_resources[] = {
384 .start = OMAP_DM9000_BASE,
385 .end = (OMAP_DM9000_BASE + 0x4 - 1),
386 .flags = IORESOURCE_MEM,
389 .start = (OMAP_DM9000_BASE + 0x400),
390 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
391 .flags = IORESOURCE_MEM,
394 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
398 static struct dm9000_plat_data omap_dm9000_platdata = {
399 .flags = DM9000_PLATF_16BITONLY,
402 static struct platform_device omap_dm9000_dev = {
405 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
406 .resource = omap_dm9000_resources,
408 .platform_data = &omap_dm9000_platdata,
412 static void __init omap_dm9000_init(void)
414 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
415 struct omap_die_id odi;
418 ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq");
420 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
421 OMAP_DM9000_GPIO_IRQ);
425 /* init the mac address using DIE id */
426 omap_get_die_id(&odi);
428 eth_addr[0] = 0x02; /* locally administered */
429 eth_addr[1] = odi.id_1 & 0xff;
430 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
431 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
432 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
433 eth_addr[5] = (odi.id_0 & 0x000000ff);
436 static struct platform_device *devkit8000_devices[] __initdata = {
442 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
444 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
445 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
446 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
449 .reset_gpio_port[0] = -EINVAL,
450 .reset_gpio_port[1] = -EINVAL,
451 .reset_gpio_port[2] = -EINVAL
454 #ifdef CONFIG_OMAP_MUX
455 static struct omap_board_mux board_mux[] __initdata = {
456 /* nCS and IRQ for Devkit8000 ethernet */
457 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
458 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
461 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
462 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
463 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
464 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
465 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
468 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
471 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
472 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
473 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
474 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
475 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
476 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
477 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
478 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
479 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
480 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
481 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
482 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
485 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
486 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
487 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
488 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
489 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
490 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
491 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
492 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
493 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
494 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
495 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
496 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
499 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
500 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
501 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
502 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
503 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
504 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
505 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
506 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
507 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
508 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
511 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
512 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
513 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
514 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
517 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
518 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
521 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
522 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
525 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
526 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
529 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
530 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
533 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
534 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
535 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
536 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
539 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
540 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
541 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
542 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
543 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
544 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
545 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
546 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
547 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
548 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
549 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
550 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
551 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
552 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
553 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
554 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
555 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
556 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
557 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
558 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
559 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
560 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
561 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
562 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
563 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
564 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
565 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
566 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
570 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
571 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
572 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
573 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
574 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
577 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
580 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
581 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
582 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
583 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
586 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
587 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
588 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
589 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
592 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
593 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
595 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
596 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
597 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
599 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
600 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
603 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
604 OMAP_PIN_INPUT_PULLUP),
606 { .reg_offset = OMAP_MUX_TERMINATOR },
610 static void __init devkit8000_init(void)
612 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
614 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
615 mt46h32m32lf6_sdrc_params);
619 omap_hsmmc_init(mmc);
620 devkit8000_i2c_init();
621 omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ);
622 platform_add_devices(devkit8000_devices,
623 ARRAY_SIZE(devkit8000_devices));
625 omap_display_init(&devkit8000_dss_data);
627 omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
630 usbhs_init(&usbhs_bdata);
631 omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
632 ARRAY_SIZE(devkit8000_nand_partitions));
634 /* Ensure SDRC pins are mux'd for self-refresh */
635 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
636 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
639 MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
640 .atag_offset = 0x100,
641 .reserve = omap_reserve,
642 .map_io = omap3_map_io,
643 .init_early = omap35xx_init_early,
644 .init_irq = omap3_init_irq,
645 .handle_irq = omap3_intc_handle_irq,
646 .init_machine = devkit8000_init,
647 .init_late = omap35xx_init_late,
648 .timer = &omap3_secure_timer,
649 .restart = omap_prcm_restart,