2 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/clk.h>
22 #include <linux/irq.h>
23 #include <linux/gpio.h>
25 #include <mach/hardware.h>
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/time.h>
29 #include <asm/memory.h>
30 #include <asm/mach/map.h>
31 #include <mach/common.h>
32 #include <mach/board-mx31pdk.h>
33 #include <mach/imx-uart.h>
34 #include <mach/iomux-mx3.h>
40 * @brief This file contains the board-specific initialization routines.
45 static int mx31pdk_pins[] = {
51 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
54 static struct imxuart_platform_data uart_pdata = {
55 .flags = IMXUART_HAVE_RTSCTS,
59 * Routines for the CPLD on the debug board. It contains a CPLD handling
60 * LEDs, switches, interrupts for Ethernet.
63 static void mx31pdk_expio_irq_handler(uint32_t irq, struct irq_desc *desc)
69 imr_val = __raw_readw(CPLD_INT_MASK_REG);
70 int_valid = __raw_readw(CPLD_INT_STATUS_REG) & ~imr_val;
72 expio_irq = MXC_EXP_IO_BASE;
73 for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
74 if ((int_valid & 1) == 0)
76 generic_handle_irq(expio_irq);
81 * Disable an expio pin's interrupt by setting the bit in the imr.
82 * @param irq an expio virtual irq number
84 static void expio_mask_irq(uint32_t irq)
87 uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
89 /* mask the interrupt */
90 reg = __raw_readw(CPLD_INT_MASK_REG);
92 __raw_writew(reg, CPLD_INT_MASK_REG);
96 * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
97 * @param irq an expanded io virtual irq number
99 static void expio_ack_irq(uint32_t irq)
101 uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
103 /* clear the interrupt status */
104 __raw_writew(1 << expio, CPLD_INT_RESET_REG);
105 __raw_writew(0, CPLD_INT_RESET_REG);
106 /* mask the interrupt */
111 * Enable a expio pin's interrupt by clearing the bit in the imr.
112 * @param irq a expio virtual irq number
114 static void expio_unmask_irq(uint32_t irq)
117 uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
119 /* unmask the interrupt */
120 reg = __raw_readw(CPLD_INT_MASK_REG);
121 reg &= ~(1 << expio);
122 __raw_writew(reg, CPLD_INT_MASK_REG);
125 static struct irq_chip expio_irq_chip = {
126 .ack = expio_ack_irq,
127 .mask = expio_mask_irq,
128 .unmask = expio_unmask_irq,
131 static int __init mx31pdk_init_expio(void)
136 /* Check if there's a debug board connected */
137 if ((__raw_readw(CPLD_MAGIC_NUMBER1_REG) != 0xAAAA) ||
138 (__raw_readw(CPLD_MAGIC_NUMBER2_REG) != 0x5555) ||
139 (__raw_readw(CPLD_MAGIC_NUMBER3_REG) != 0xCAFE)) {
140 /* No Debug board found */
144 pr_info("i.MX31PDK Debug board detected, rev = 0x%04X\n",
145 __raw_readw(CPLD_CODE_VER_REG));
148 * Configure INT line as GPIO input
150 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "sms9217-irq");
152 pr_warning("could not get LAN irq gpio\n");
154 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
156 /* Disable the interrupts and clear the status */
157 __raw_writew(0, CPLD_INT_MASK_REG);
158 __raw_writew(0xFFFF, CPLD_INT_RESET_REG);
159 __raw_writew(0, CPLD_INT_RESET_REG);
160 __raw_writew(0x1F, CPLD_INT_MASK_REG);
161 for (i = MXC_EXP_IO_BASE;
162 i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
164 set_irq_chip(i, &expio_irq_chip);
165 set_irq_handler(i, handle_level_irq);
166 set_irq_flags(i, IRQF_VALID);
168 set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW);
169 set_irq_chained_handler(EXPIO_PARENT_INT, mx31pdk_expio_irq_handler);
175 * This structure defines the MX31 memory map.
177 static struct map_desc mx31pdk_io_desc[] __initdata = {
179 .virtual = SPBA0_BASE_ADDR_VIRT,
180 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
181 .length = SPBA0_SIZE,
182 .type = MT_DEVICE_NONSHARED,
184 .virtual = CS5_BASE_ADDR_VIRT,
185 .pfn = __phys_to_pfn(CS5_BASE_ADDR),
192 * Set up static virtual mappings.
194 static void __init mx31pdk_map_io(void)
197 iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc));
201 * Board specific initialization.
203 static void __init mxc_board_init(void)
205 mxc_iomux_setup_multiple_pins(mx31pdk_pins, ARRAY_SIZE(mx31pdk_pins),
208 mxc_register_device(&mxc_uart_device0, &uart_pdata);
210 mx31pdk_init_expio();
213 static void __init mx31pdk_timer_init(void)
215 mx31_clocks_init(26000000);
218 static struct sys_timer mx31pdk_timer = {
219 .init = mx31pdk_timer_init,
223 * The following uses standard kernel macros defined in arch.h in order to
224 * initialize __mach_desc_MX31PDK data structure.
226 MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
227 /* Maintainer: Freescale Semiconductor, Inc. */
228 .phys_io = AIPS1_BASE_ADDR,
229 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
230 .boot_params = PHYS_OFFSET + 0x100,
231 .map_io = mx31pdk_map_io,
232 .init_irq = mxc_init_irq,
233 .init_machine = mxc_board_init,
234 .timer = &mx31pdk_timer,