1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-ks8695/pci.c
5 * Copyright (C) 2003, Micrel Semiconductors
6 * Copyright (C) 2006, Greg Ungerer <gerg@snapgear.com>
7 * Copyright (C) 2006, Ben Dooks
8 * Copyright (C) 2007, Andrew Victor
11 #include <linux/kernel.h>
12 #include <linux/pci.h>
14 #include <linux/init.h>
15 #include <linux/irq.h>
16 #include <linux/delay.h>
19 #include <asm/signal.h>
20 #include <asm/mach/pci.h>
21 #include <mach/hardware.h>
29 static void ks8695_pci_setupconfig(unsigned int bus_nr, unsigned int devfn, unsigned int where)
33 pbca = PBCA_ENABLE | (where & ~3);
34 pbca |= PCI_SLOT(devfn) << 11 ;
35 pbca |= PCI_FUNC(devfn) << 8;
39 /* use Type-0 transaction */
40 __raw_writel(pbca, KS8695_PCI_VA + KS8695_PBCA);
42 /* use Type-1 transaction */
43 __raw_writel(pbca | PBCA_TYPE1, KS8695_PCI_VA + KS8695_PBCA);
47 static void __iomem *ks8695_pci_map_bus(struct pci_bus *bus, unsigned int devfn,
50 ks8695_pci_setupconfig(bus->number, devfn, where);
51 return KS8695_PCI_VA + KS8695_PBCD;
54 static void ks8695_local_writeconfig(int where, u32 value)
56 ks8695_pci_setupconfig(0, 0, where);
57 __raw_writel(value, KS8695_PCI_VA + KS8695_PBCD);
60 static struct pci_ops ks8695_pci_ops = {
61 .map_bus = ks8695_pci_map_bus,
62 .read = pci_generic_config_read32,
63 .write = pci_generic_config_write32,
66 static struct resource pci_mem = {
67 .name = "PCI Memory space",
68 .start = KS8695_PCIMEM_PA,
69 .end = KS8695_PCIMEM_PA + (KS8695_PCIMEM_SIZE - 1),
70 .flags = IORESOURCE_MEM,
73 static struct resource pci_io = {
74 .name = "PCI IO space",
75 .start = KS8695_PCIIO_PA,
76 .end = KS8695_PCIIO_PA + (KS8695_PCIIO_SIZE - 1),
77 .flags = IORESOURCE_IO,
80 static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys)
85 request_resource(&iomem_resource, &pci_mem);
86 request_resource(&ioport_resource, &pci_io);
88 pci_add_resource_offset(&sys->resources, &pci_io, sys->io_offset);
89 pci_add_resource_offset(&sys->resources, &pci_mem, sys->mem_offset);
91 /* Assign and enable processor bridge */
92 ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA);
94 /* Enable bus-master & Memory Space access */
95 ks8695_local_writeconfig(PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
97 /* Set cache-line size & latency. */
98 ks8695_local_writeconfig(PCI_CACHE_LINE_SIZE, (32 << 8) | (L1_CACHE_BYTES / sizeof(u32)));
100 /* Reserve PCI memory space for PCI-AHB resources */
101 if (!request_mem_region(KS8695_PCIMEM_PA, SZ_64M, "PCI-AHB Bridge")) {
102 printk(KERN_ERR "Cannot allocate PCI-AHB Bridge memory.\n");
109 static inline unsigned int size_mask(unsigned long size)
114 static int ks8695_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
116 unsigned long pc = instruction_pointer(regs);
117 unsigned long instr = *(unsigned long *)pc;
118 unsigned long cmdstat;
120 cmdstat = __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS);
122 printk(KERN_ERR "PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx [%s%s%s%s%s]\n",
123 addr, fsr, regs->ARM_pc, regs->ARM_lr,
124 cmdstat & (PCI_STATUS_SIG_TARGET_ABORT << 16) ? "GenTarget" : " ",
125 cmdstat & (PCI_STATUS_REC_TARGET_ABORT << 16) ? "RecvTarget" : " ",
126 cmdstat & (PCI_STATUS_REC_MASTER_ABORT << 16) ? "MasterAbort" : " ",
127 cmdstat & (PCI_STATUS_SIG_SYSTEM_ERROR << 16) ? "SysError" : " ",
128 cmdstat & (PCI_STATUS_DETECTED_PARITY << 16) ? "Parity" : " "
131 __raw_writel(cmdstat, KS8695_PCI_VA + KS8695_CRCFCS);
134 * If the instruction being executed was a read,
135 * make it look like it read all-ones.
137 if ((instr & 0x0c100000) == 0x04100000) {
138 int reg = (instr >> 12) & 15;
141 if (instr & 0x00400000)
146 regs->uregs[reg] = val;
151 if ((instr & 0x0e100090) == 0x00100090) {
152 int reg = (instr >> 12) & 15;
154 regs->uregs[reg] = -1;
162 static void __init ks8695_pci_preinit(void)
164 /* make software reset to avoid freeze if PCI bus was messed up */
165 __raw_writel(0x80000000, KS8695_PCI_VA + KS8695_PBCS);
167 /* stage 1 initialization, subid, subdevice = 0x0001 */
168 __raw_writel(0x00010001, KS8695_PCI_VA + KS8695_CRCSID);
170 /* stage 2 initialization */
171 /* prefetch limits with 16 words, retry enable */
172 __raw_writel(0x40000000, KS8695_PCI_VA + KS8695_PBCS);
174 /* configure memory mapping */
175 __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBA);
176 __raw_writel(size_mask(KS8695_PCIMEM_SIZE), KS8695_PCI_VA + KS8695_PMBAM);
177 __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBAT);
178 __raw_writel(0, KS8695_PCI_VA + KS8695_PMBAC);
180 /* configure IO mapping */
181 __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBA);
182 __raw_writel(size_mask(KS8695_PCIIO_SIZE), KS8695_PCI_VA + KS8695_PIOBAM);
183 __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBAT);
184 __raw_writel(0, KS8695_PCI_VA + KS8695_PIOBAC);
186 /* hook in fault handlers */
187 hook_fault_code(8, ks8695_pci_fault, SIGBUS, 0, "external abort on non-linefetch");
188 hook_fault_code(10, ks8695_pci_fault, SIGBUS, 0, "external abort on non-linefetch");
191 static void ks8695_show_pciregs(void)
196 printk(KERN_INFO "PCI: CRCFID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFID));
197 printk(KERN_INFO "PCI: CRCFCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS));
198 printk(KERN_INFO "PCI: CRCFRV = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFRV));
199 printk(KERN_INFO "PCI: CRCFLT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFLT));
200 printk(KERN_INFO "PCI: CRCBMA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCBMA));
201 printk(KERN_INFO "PCI: CRCSID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCSID));
202 printk(KERN_INFO "PCI: CRCFIT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFIT));
204 printk(KERN_INFO "PCI: PBM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBM));
205 printk(KERN_INFO "PCI: PBCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBCS));
207 printk(KERN_INFO "PCI: PMBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBA));
208 printk(KERN_INFO "PCI: PMBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAC));
209 printk(KERN_INFO "PCI: PMBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAM));
210 printk(KERN_INFO "PCI: PMBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAT));
212 printk(KERN_INFO "PCI: PIOBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBA));
213 printk(KERN_INFO "PCI: PIOBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAC));
214 printk(KERN_INFO "PCI: PIOBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAM));
215 printk(KERN_INFO "PCI: PIOBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAT));
219 static struct hw_pci ks8695_pci __initdata = {
221 .ops = &ks8695_pci_ops,
222 .preinit = ks8695_pci_preinit,
223 .setup = ks8695_pci_setup,
228 void __init ks8695_init_pci(struct ks8695_pci_cfg *cfg)
230 if (__raw_readl(KS8695_PCI_VA + KS8695_CRCFRV) & CFRV_GUEST) {
231 printk("PCI: KS8695 in guest mode, not initialising\n");
238 printk(KERN_INFO "PCI: Initialising\n");
239 ks8695_show_pciregs();
242 __raw_writel(cfg->mode << 29, KS8695_PCI_VA + KS8695_PBM);
244 ks8695_pci.map_irq = cfg->map_irq; /* board-specific map_irq method */
246 pci_common_init(&ks8695_pci);