2 * Author: MontaVista Software, Inc.
5 * Based on the OMAP devices.c
7 * 2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
12 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
13 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
14 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
15 * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
16 * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version 2
21 * of the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
32 #include <linux/module.h>
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/platform_device.h>
36 #include <linux/gpio.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/serial.h>
40 #include <mach/irqs.h>
41 #include <mach/hardware.h>
42 #include <mach/common.h>
47 #if defined(CONFIG_ARCH_MX1)
48 static struct resource imx1_camera_resources[] = {
52 .flags = IORESOURCE_MEM,
56 .flags = IORESOURCE_IRQ,
60 static u64 imx1_camera_dmamask = DMA_BIT_MASK(32);
62 struct platform_device imx1_camera_device = {
64 .id = 0, /* This is used to put cameras on this interface */
66 .dma_mask = &imx1_camera_dmamask,
67 .coherent_dma_mask = DMA_BIT_MASK(32),
69 .resource = imx1_camera_resources,
70 .num_resources = ARRAY_SIZE(imx1_camera_resources),
73 static struct resource imx_rtc_resources[] = {
77 .flags = IORESOURCE_MEM,
81 .flags = IORESOURCE_IRQ,
83 .start = MX1_RTC_SAMINT,
84 .end = MX1_RTC_SAMINT,
85 .flags = IORESOURCE_IRQ,
89 struct platform_device imx_rtc_device = {
92 .resource = imx_rtc_resources,
93 .num_resources = ARRAY_SIZE(imx_rtc_resources),
96 static struct resource imx_wdt_resources[] = {
100 .flags = IORESOURCE_MEM,
102 .start = MX1_WDT_INT,
104 .flags = IORESOURCE_IRQ,
108 struct platform_device imx_wdt_device = {
111 .resource = imx_wdt_resources,
112 .num_resources = ARRAY_SIZE(imx_wdt_resources),
115 static struct resource imx_usb_resources[] = {
119 .flags = IORESOURCE_MEM,
121 .start = MX1_USBD_INT0,
122 .end = MX1_USBD_INT0,
123 .flags = IORESOURCE_IRQ,
125 .start = MX1_USBD_INT1,
126 .end = MX1_USBD_INT1,
127 .flags = IORESOURCE_IRQ,
129 .start = MX1_USBD_INT2,
130 .end = MX1_USBD_INT2,
131 .flags = IORESOURCE_IRQ,
133 .start = MX1_USBD_INT3,
134 .end = MX1_USBD_INT3,
135 .flags = IORESOURCE_IRQ,
137 .start = MX1_USBD_INT4,
138 .end = MX1_USBD_INT4,
139 .flags = IORESOURCE_IRQ,
141 .start = MX1_USBD_INT5,
142 .end = MX1_USBD_INT5,
143 .flags = IORESOURCE_IRQ,
145 .start = MX1_USBD_INT6,
146 .end = MX1_USBD_INT6,
147 .flags = IORESOURCE_IRQ,
151 struct platform_device imx_usb_device = {
154 .num_resources = ARRAY_SIZE(imx_usb_resources),
155 .resource = imx_usb_resources,
158 /* GPIO port description */
159 static struct mxc_gpio_port imx_gpio_ports[] = {
161 .chip.label = "gpio-0",
162 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
163 .irq = MX1_GPIO_INT_PORTA,
164 .virtual_irq_start = MXC_GPIO_IRQ_START,
166 .chip.label = "gpio-1",
167 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
168 .irq = MX1_GPIO_INT_PORTB,
169 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
171 .chip.label = "gpio-2",
172 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
173 .irq = MX1_GPIO_INT_PORTC,
174 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
176 .chip.label = "gpio-3",
177 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
178 .irq = MX1_GPIO_INT_PORTD,
179 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
183 int __init imx1_register_gpios(void)
185 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
189 #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
191 * General Purpose Timer
195 #define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq) \
196 static struct resource timer ## n ##_resources[] = { \
199 .end = baseaddr + SZ_4K - 1, \
200 .flags = IORESOURCE_MEM, \
204 .flags = IORESOURCE_IRQ, \
208 struct platform_device mxc_gpt ## n = { \
211 .num_resources = ARRAY_SIZE(timer ## n ## _resources), \
212 .resource = timer ## n ## _resources, \
215 /* We use gpt1 as system timer, so do not add a device for this one */
216 DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR, MX2x_INT_GPT2);
217 DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR, MX2x_INT_GPT3);
219 #ifdef CONFIG_MACH_MX27
220 DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR, MX27_INT_GPT4);
221 DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5);
222 DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6);
225 /* Watchdog: i.MX1 has seperate driver, i.MX21 and i.MX27 are equal */
226 static struct resource mxc_wdt_resources[] = {
228 .start = MX2x_WDOG_BASE_ADDR,
229 .end = MX2x_WDOG_BASE_ADDR + SZ_4K - 1,
230 .flags = IORESOURCE_MEM,
234 struct platform_device mxc_wdt = {
237 .num_resources = ARRAY_SIZE(mxc_wdt_resources),
238 .resource = mxc_wdt_resources,
241 static struct resource mxc_w1_master_resources[] = {
243 .start = MX2x_OWIRE_BASE_ADDR,
244 .end = MX2x_OWIRE_BASE_ADDR + SZ_4K - 1,
245 .flags = IORESOURCE_MEM,
249 struct platform_device mxc_w1_master_device = {
252 .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
253 .resource = mxc_w1_master_resources,
258 * - i.MX1: the basic controller
259 * - i.MX21: to be checked
260 * - i.MX27: like i.MX1, with slightly variations
262 static struct resource mxc_fb[] = {
264 .start = MX2x_LCDC_BASE_ADDR,
265 .end = MX2x_LCDC_BASE_ADDR + SZ_4K - 1,
266 .flags = IORESOURCE_MEM,
268 .start = MX2x_INT_LCDC,
269 .end = MX2x_INT_LCDC,
270 .flags = IORESOURCE_IRQ,
275 struct platform_device mxc_fb_device = {
278 .num_resources = ARRAY_SIZE(mxc_fb),
281 .coherent_dma_mask = DMA_BIT_MASK(32),
285 #ifdef CONFIG_MACH_MX27
286 static struct resource mxc_fec_resources[] = {
288 .start = MX27_FEC_BASE_ADDR,
289 .end = MX27_FEC_BASE_ADDR + SZ_4K - 1,
290 .flags = IORESOURCE_MEM,
292 .start = MX27_INT_FEC,
294 .flags = IORESOURCE_IRQ,
298 struct platform_device mxc_fec_device = {
301 .num_resources = ARRAY_SIZE(mxc_fec_resources),
302 .resource = mxc_fec_resources,
306 static struct resource mxc_pwm_resources[] = {
308 .start = MX2x_PWM_BASE_ADDR,
309 .end = MX2x_PWM_BASE_ADDR + SZ_4K - 1,
310 .flags = IORESOURCE_MEM,
312 .start = MX2x_INT_PWM,
314 .flags = IORESOURCE_IRQ,
318 struct platform_device mxc_pwm_device = {
321 .num_resources = ARRAY_SIZE(mxc_pwm_resources),
322 .resource = mxc_pwm_resources,
325 #define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq) \
326 static struct resource mxc_sdhc_resources ## n[] = { \
329 .end = baseaddr + SZ_4K - 1, \
330 .flags = IORESOURCE_MEM, \
334 .flags = IORESOURCE_IRQ, \
338 .flags = IORESOURCE_DMA, \
342 static u64 mxc_sdhc ## n ## _dmamask = DMA_BIT_MASK(32); \
344 struct platform_device mxc_sdhc_device ## n = { \
348 .dma_mask = &mxc_sdhc ## n ## _dmamask, \
349 .coherent_dma_mask = DMA_BIT_MASK(32), \
351 .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n), \
352 .resource = mxc_sdhc_resources ## n, \
355 DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1);
356 DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2);
358 #ifdef CONFIG_MACH_MX27
359 static struct resource otg_resources[] = {
361 .start = MX27_USBOTG_BASE_ADDR,
362 .end = MX27_USBOTG_BASE_ADDR + 0x1ff,
363 .flags = IORESOURCE_MEM,
365 .start = MX27_INT_USB3,
366 .end = MX27_INT_USB3,
367 .flags = IORESOURCE_IRQ,
371 static u64 otg_dmamask = DMA_BIT_MASK(32);
373 /* OTG gadget device */
374 struct platform_device mxc_otg_udc_device = {
375 .name = "fsl-usb2-udc",
378 .dma_mask = &otg_dmamask,
379 .coherent_dma_mask = DMA_BIT_MASK(32),
381 .resource = otg_resources,
382 .num_resources = ARRAY_SIZE(otg_resources),
386 struct platform_device mxc_otg_host = {
390 .coherent_dma_mask = DMA_BIT_MASK(32),
391 .dma_mask = &otg_dmamask,
393 .resource = otg_resources,
394 .num_resources = ARRAY_SIZE(otg_resources),
399 static u64 usbh1_dmamask = DMA_BIT_MASK(32);
401 static struct resource mxc_usbh1_resources[] = {
403 .start = MX27_USBOTG_BASE_ADDR + 0x200,
404 .end = MX27_USBOTG_BASE_ADDR + 0x3ff,
405 .flags = IORESOURCE_MEM,
407 .start = MX27_INT_USB1,
408 .end = MX27_INT_USB1,
409 .flags = IORESOURCE_IRQ,
413 struct platform_device mxc_usbh1 = {
417 .coherent_dma_mask = DMA_BIT_MASK(32),
418 .dma_mask = &usbh1_dmamask,
420 .resource = mxc_usbh1_resources,
421 .num_resources = ARRAY_SIZE(mxc_usbh1_resources),
425 static u64 usbh2_dmamask = DMA_BIT_MASK(32);
427 static struct resource mxc_usbh2_resources[] = {
429 .start = MX27_USBOTG_BASE_ADDR + 0x400,
430 .end = MX27_USBOTG_BASE_ADDR + 0x5ff,
431 .flags = IORESOURCE_MEM,
433 .start = MX27_INT_USB2,
434 .end = MX27_INT_USB2,
435 .flags = IORESOURCE_IRQ,
439 struct platform_device mxc_usbh2 = {
443 .coherent_dma_mask = DMA_BIT_MASK(32),
444 .dma_mask = &usbh2_dmamask,
446 .resource = mxc_usbh2_resources,
447 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
451 #define DEFINE_IMX_SSI_DMARES(_name, ssin, suffix) \
454 .start = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix, \
455 .end = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix, \
456 .flags = IORESOURCE_DMA, \
459 #define DEFINE_IMX_SSI_DEVICE(n, ssin, baseaddr, irq) \
460 static struct resource imx_ssi_resources ## n[] = { \
462 .start = MX2x_SSI ## ssin ## _BASE_ADDR, \
463 .end = MX2x_SSI ## ssin ## _BASE_ADDR + 0x6f, \
464 .flags = IORESOURCE_MEM, \
466 .start = MX2x_INT_SSI1, \
467 .end = MX2x_INT_SSI1, \
468 .flags = IORESOURCE_IRQ, \
470 DEFINE_IMX_SSI_DMARES("tx0", ssin, TX0), \
471 DEFINE_IMX_SSI_DMARES("rx0", ssin, RX0), \
472 DEFINE_IMX_SSI_DMARES("tx1", ssin, TX1), \
473 DEFINE_IMX_SSI_DMARES("rx1", ssin, RX1), \
476 struct platform_device imx_ssi_device ## n = { \
479 .num_resources = ARRAY_SIZE(imx_ssi_resources ## n), \
480 .resource = imx_ssi_resources ## n, \
483 DEFINE_IMX_SSI_DEVICE(0, 1, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
484 DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
486 /* GPIO port description */
487 #define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq) \
489 .chip.label = "gpio-" #n, \
491 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
493 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
496 #define DEFINE_MXC_GPIO_PORT(SOC, n) \
498 .chip.label = "gpio-" #n, \
499 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
501 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
504 #define DEFINE_MXC_GPIO_PORTS(SOC, pfx) \
505 static struct mxc_gpio_port pfx ## _gpio_ports[] = { \
506 DEFINE_MXC_GPIO_PORT_IRQ(SOC, 0, SOC ## _INT_GPIO), \
507 DEFINE_MXC_GPIO_PORT(SOC, 1), \
508 DEFINE_MXC_GPIO_PORT(SOC, 2), \
509 DEFINE_MXC_GPIO_PORT(SOC, 3), \
510 DEFINE_MXC_GPIO_PORT(SOC, 4), \
511 DEFINE_MXC_GPIO_PORT(SOC, 5), \
514 #ifdef CONFIG_MACH_MX21
515 DEFINE_MXC_GPIO_PORTS(MX21, imx21);
517 int __init imx21_register_gpios(void)
519 return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
523 #ifdef CONFIG_MACH_MX27
524 DEFINE_MXC_GPIO_PORTS(MX27, imx27);
526 int __init imx27_register_gpios(void)
528 return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
532 #ifdef CONFIG_MACH_MX21
533 static struct resource mx21_usbhc_resources[] = {
535 .start = MX21_USBOTG_BASE_ADDR,
536 .end = MX21_USBOTG_BASE_ADDR + SZ_8K - 1,
537 .flags = IORESOURCE_MEM,
540 .start = MX21_INT_USBHOST,
541 .end = MX21_INT_USBHOST,
542 .flags = IORESOURCE_IRQ,
546 struct platform_device mx21_usbhc_device = {
550 .dma_mask = &mx21_usbhc_device.dev.coherent_dma_mask,
551 .coherent_dma_mask = DMA_BIT_MASK(32),
553 .num_resources = ARRAY_SIZE(mx21_usbhc_resources),
554 .resource = mx21_usbhc_resources,