2 * arch/arm/mach-dove/common.c
4 * Core functions for Marvell Dove 88AP510 System On Chip
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/pci.h>
16 #include <linux/serial_8250.h>
17 #include <linux/clk.h>
18 #include <linux/mbus.h>
19 #include <linux/mv643xx_eth.h>
20 #include <linux/mv643xx_i2c.h>
21 #include <linux/ata_platform.h>
22 #include <linux/serial_8250.h>
23 #include <linux/spi/orion_spi.h>
24 #include <linux/gpio.h>
26 #include <asm/setup.h>
27 #include <asm/timex.h>
28 #include <asm/hardware/cache-tauros2.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/time.h>
31 #include <asm/mach/pci.h>
32 #include <mach/dove.h>
33 #include <mach/bridge-regs.h>
34 #include <asm/mach/arch.h>
35 #include <linux/irq.h>
36 #include <plat/mv_xor.h>
37 #include <plat/ehci-orion.h>
38 #include <plat/time.h>
41 /*****************************************************************************
43 ****************************************************************************/
44 static struct map_desc dove_io_desc[] __initdata = {
46 .virtual = DOVE_SB_REGS_VIRT_BASE,
47 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
48 .length = DOVE_SB_REGS_SIZE,
51 .virtual = DOVE_NB_REGS_VIRT_BASE,
52 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
53 .length = DOVE_NB_REGS_SIZE,
56 .virtual = DOVE_PCIE0_IO_VIRT_BASE,
57 .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
58 .length = DOVE_PCIE0_IO_SIZE,
61 .virtual = DOVE_PCIE1_IO_VIRT_BASE,
62 .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
63 .length = DOVE_PCIE1_IO_SIZE,
68 void __init dove_map_io(void)
70 iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
73 /*****************************************************************************
75 ****************************************************************************/
76 static struct orion_ehci_data dove_ehci_data = {
77 .dram = &dove_mbus_dram_info,
78 .phy_version = EHCI_PHY_NA,
81 static u64 ehci_dmamask = DMA_BIT_MASK(32);
83 /*****************************************************************************
85 ****************************************************************************/
86 static struct resource dove_ehci0_resources[] = {
88 .start = DOVE_USB0_PHYS_BASE,
89 .end = DOVE_USB0_PHYS_BASE + SZ_4K - 1,
90 .flags = IORESOURCE_MEM,
92 .start = IRQ_DOVE_USB0,
94 .flags = IORESOURCE_IRQ,
98 static struct platform_device dove_ehci0 = {
102 .dma_mask = &ehci_dmamask,
103 .coherent_dma_mask = DMA_BIT_MASK(32),
104 .platform_data = &dove_ehci_data,
106 .resource = dove_ehci0_resources,
107 .num_resources = ARRAY_SIZE(dove_ehci0_resources),
110 void __init dove_ehci0_init(void)
112 platform_device_register(&dove_ehci0);
115 /*****************************************************************************
117 ****************************************************************************/
118 static struct resource dove_ehci1_resources[] = {
120 .start = DOVE_USB1_PHYS_BASE,
121 .end = DOVE_USB1_PHYS_BASE + SZ_4K - 1,
122 .flags = IORESOURCE_MEM,
124 .start = IRQ_DOVE_USB1,
125 .end = IRQ_DOVE_USB1,
126 .flags = IORESOURCE_IRQ,
130 static struct platform_device dove_ehci1 = {
131 .name = "orion-ehci",
134 .dma_mask = &ehci_dmamask,
135 .coherent_dma_mask = DMA_BIT_MASK(32),
136 .platform_data = &dove_ehci_data,
138 .resource = dove_ehci1_resources,
139 .num_resources = ARRAY_SIZE(dove_ehci1_resources),
142 void __init dove_ehci1_init(void)
144 platform_device_register(&dove_ehci1);
147 /*****************************************************************************
149 ****************************************************************************/
150 struct mv643xx_eth_shared_platform_data dove_ge00_shared_data = {
152 .dram = &dove_mbus_dram_info,
155 static struct resource dove_ge00_shared_resources[] = {
158 .start = DOVE_GE00_PHYS_BASE + 0x2000,
159 .end = DOVE_GE00_PHYS_BASE + SZ_16K - 1,
160 .flags = IORESOURCE_MEM,
164 static struct platform_device dove_ge00_shared = {
165 .name = MV643XX_ETH_SHARED_NAME,
168 .platform_data = &dove_ge00_shared_data,
171 .resource = dove_ge00_shared_resources,
174 static struct resource dove_ge00_resources[] = {
177 .start = IRQ_DOVE_GE00_SUM,
178 .end = IRQ_DOVE_GE00_SUM,
179 .flags = IORESOURCE_IRQ,
183 static struct platform_device dove_ge00 = {
184 .name = MV643XX_ETH_NAME,
187 .resource = dove_ge00_resources,
189 .coherent_dma_mask = 0xffffffff,
193 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
195 eth_data->shared = &dove_ge00_shared;
196 dove_ge00.dev.platform_data = eth_data;
198 platform_device_register(&dove_ge00_shared);
199 platform_device_register(&dove_ge00);
202 /*****************************************************************************
204 ****************************************************************************/
205 static struct resource dove_rtc_resource[] = {
207 .start = DOVE_RTC_PHYS_BASE,
208 .end = DOVE_RTC_PHYS_BASE + 32 - 1,
209 .flags = IORESOURCE_MEM,
211 .start = IRQ_DOVE_RTC,
212 .flags = IORESOURCE_IRQ,
216 void __init dove_rtc_init(void)
218 platform_device_register_simple("rtc-mv", -1, dove_rtc_resource, 2);
221 /*****************************************************************************
223 ****************************************************************************/
224 static struct resource dove_sata_resources[] = {
227 .start = DOVE_SATA_PHYS_BASE,
228 .end = DOVE_SATA_PHYS_BASE + 0x5000 - 1,
229 .flags = IORESOURCE_MEM,
232 .start = IRQ_DOVE_SATA,
233 .end = IRQ_DOVE_SATA,
234 .flags = IORESOURCE_IRQ,
238 static struct platform_device dove_sata = {
242 .coherent_dma_mask = DMA_BIT_MASK(32),
244 .num_resources = ARRAY_SIZE(dove_sata_resources),
245 .resource = dove_sata_resources,
248 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
250 sata_data->dram = &dove_mbus_dram_info;
251 dove_sata.dev.platform_data = sata_data;
252 platform_device_register(&dove_sata);
255 /*****************************************************************************
257 ****************************************************************************/
258 static struct plat_serial8250_port dove_uart0_data[] = {
260 .mapbase = DOVE_UART0_PHYS_BASE,
261 .membase = (char *)DOVE_UART0_VIRT_BASE,
262 .irq = IRQ_DOVE_UART_0,
263 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
271 static struct resource dove_uart0_resources[] = {
273 .start = DOVE_UART0_PHYS_BASE,
274 .end = DOVE_UART0_PHYS_BASE + SZ_256 - 1,
275 .flags = IORESOURCE_MEM,
277 .start = IRQ_DOVE_UART_0,
278 .end = IRQ_DOVE_UART_0,
279 .flags = IORESOURCE_IRQ,
283 static struct platform_device dove_uart0 = {
284 .name = "serial8250",
285 .id = PLAT8250_DEV_PLATFORM,
287 .platform_data = dove_uart0_data,
289 .resource = dove_uart0_resources,
290 .num_resources = ARRAY_SIZE(dove_uart0_resources),
293 void __init dove_uart0_init(void)
295 platform_device_register(&dove_uart0);
298 /*****************************************************************************
300 ****************************************************************************/
301 static struct plat_serial8250_port dove_uart1_data[] = {
303 .mapbase = DOVE_UART1_PHYS_BASE,
304 .membase = (char *)DOVE_UART1_VIRT_BASE,
305 .irq = IRQ_DOVE_UART_1,
306 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
314 static struct resource dove_uart1_resources[] = {
316 .start = DOVE_UART1_PHYS_BASE,
317 .end = DOVE_UART1_PHYS_BASE + SZ_256 - 1,
318 .flags = IORESOURCE_MEM,
320 .start = IRQ_DOVE_UART_1,
321 .end = IRQ_DOVE_UART_1,
322 .flags = IORESOURCE_IRQ,
326 static struct platform_device dove_uart1 = {
327 .name = "serial8250",
328 .id = PLAT8250_DEV_PLATFORM1,
330 .platform_data = dove_uart1_data,
332 .resource = dove_uart1_resources,
333 .num_resources = ARRAY_SIZE(dove_uart1_resources),
336 void __init dove_uart1_init(void)
338 platform_device_register(&dove_uart1);
341 /*****************************************************************************
343 ****************************************************************************/
344 static struct plat_serial8250_port dove_uart2_data[] = {
346 .mapbase = DOVE_UART2_PHYS_BASE,
347 .membase = (char *)DOVE_UART2_VIRT_BASE,
348 .irq = IRQ_DOVE_UART_2,
349 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
357 static struct resource dove_uart2_resources[] = {
359 .start = DOVE_UART2_PHYS_BASE,
360 .end = DOVE_UART2_PHYS_BASE + SZ_256 - 1,
361 .flags = IORESOURCE_MEM,
363 .start = IRQ_DOVE_UART_2,
364 .end = IRQ_DOVE_UART_2,
365 .flags = IORESOURCE_IRQ,
369 static struct platform_device dove_uart2 = {
370 .name = "serial8250",
371 .id = PLAT8250_DEV_PLATFORM2,
373 .platform_data = dove_uart2_data,
375 .resource = dove_uart2_resources,
376 .num_resources = ARRAY_SIZE(dove_uart2_resources),
379 void __init dove_uart2_init(void)
381 platform_device_register(&dove_uart2);
384 /*****************************************************************************
386 ****************************************************************************/
387 static struct plat_serial8250_port dove_uart3_data[] = {
389 .mapbase = DOVE_UART3_PHYS_BASE,
390 .membase = (char *)DOVE_UART3_VIRT_BASE,
391 .irq = IRQ_DOVE_UART_3,
392 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
400 static struct resource dove_uart3_resources[] = {
402 .start = DOVE_UART3_PHYS_BASE,
403 .end = DOVE_UART3_PHYS_BASE + SZ_256 - 1,
404 .flags = IORESOURCE_MEM,
406 .start = IRQ_DOVE_UART_3,
407 .end = IRQ_DOVE_UART_3,
408 .flags = IORESOURCE_IRQ,
412 static struct platform_device dove_uart3 = {
413 .name = "serial8250",
416 .platform_data = dove_uart3_data,
418 .resource = dove_uart3_resources,
419 .num_resources = ARRAY_SIZE(dove_uart3_resources),
422 void __init dove_uart3_init(void)
424 platform_device_register(&dove_uart3);
427 /*****************************************************************************
429 ****************************************************************************/
430 static struct orion_spi_info dove_spi0_data = {
434 static struct resource dove_spi0_resources[] = {
436 .start = DOVE_SPI0_PHYS_BASE,
437 .end = DOVE_SPI0_PHYS_BASE + SZ_512 - 1,
438 .flags = IORESOURCE_MEM,
440 .start = IRQ_DOVE_SPI0,
441 .end = IRQ_DOVE_SPI0,
442 .flags = IORESOURCE_IRQ,
446 static struct platform_device dove_spi0 = {
449 .resource = dove_spi0_resources,
451 .platform_data = &dove_spi0_data,
453 .num_resources = ARRAY_SIZE(dove_spi0_resources),
456 void __init dove_spi0_init(void)
458 platform_device_register(&dove_spi0);
461 /*****************************************************************************
463 ****************************************************************************/
464 static struct orion_spi_info dove_spi1_data = {
468 static struct resource dove_spi1_resources[] = {
470 .start = DOVE_SPI1_PHYS_BASE,
471 .end = DOVE_SPI1_PHYS_BASE + SZ_512 - 1,
472 .flags = IORESOURCE_MEM,
474 .start = IRQ_DOVE_SPI1,
475 .end = IRQ_DOVE_SPI1,
476 .flags = IORESOURCE_IRQ,
480 static struct platform_device dove_spi1 = {
483 .resource = dove_spi1_resources,
485 .platform_data = &dove_spi1_data,
487 .num_resources = ARRAY_SIZE(dove_spi1_resources),
490 void __init dove_spi1_init(void)
492 platform_device_register(&dove_spi1);
495 /*****************************************************************************
497 ****************************************************************************/
498 static struct mv64xxx_i2c_pdata dove_i2c_data = {
499 .freq_m = 10, /* assumes 166 MHz TCLK gets 94.3kHz */
501 .timeout = 1000, /* Default timeout of 1 second */
504 static struct resource dove_i2c_resources[] = {
507 .start = DOVE_I2C_PHYS_BASE,
508 .end = DOVE_I2C_PHYS_BASE + 0x20 - 1,
509 .flags = IORESOURCE_MEM,
512 .start = IRQ_DOVE_I2C,
514 .flags = IORESOURCE_IRQ,
518 static struct platform_device dove_i2c = {
519 .name = MV64XXX_I2C_CTLR_NAME,
521 .num_resources = ARRAY_SIZE(dove_i2c_resources),
522 .resource = dove_i2c_resources,
524 .platform_data = &dove_i2c_data,
528 void __init dove_i2c_init(void)
530 platform_device_register(&dove_i2c);
533 /*****************************************************************************
535 ****************************************************************************/
536 void __init dove_init_early(void)
538 orion_time_set_base(TIMER_VIRT_BASE);
541 static int get_tclk(void)
543 /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
547 static void dove_timer_init(void)
549 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
550 IRQ_DOVE_BRIDGE, get_tclk());
553 struct sys_timer dove_timer = {
554 .init = dove_timer_init,
557 /*****************************************************************************
559 ****************************************************************************/
560 static struct mv_xor_platform_shared_data dove_xor_shared_data = {
561 .dram = &dove_mbus_dram_info,
564 /*****************************************************************************
566 ****************************************************************************/
567 static u64 dove_xor0_dmamask = DMA_BIT_MASK(32);
569 static struct resource dove_xor0_shared_resources[] = {
572 .start = DOVE_XOR0_PHYS_BASE,
573 .end = DOVE_XOR0_PHYS_BASE + 0xff,
574 .flags = IORESOURCE_MEM,
576 .name = "xor 0 high",
577 .start = DOVE_XOR0_HIGH_PHYS_BASE,
578 .end = DOVE_XOR0_HIGH_PHYS_BASE + 0xff,
579 .flags = IORESOURCE_MEM,
583 static struct platform_device dove_xor0_shared = {
584 .name = MV_XOR_SHARED_NAME,
587 .platform_data = &dove_xor_shared_data,
589 .num_resources = ARRAY_SIZE(dove_xor0_shared_resources),
590 .resource = dove_xor0_shared_resources,
593 static struct resource dove_xor00_resources[] = {
595 .start = IRQ_DOVE_XOR_00,
596 .end = IRQ_DOVE_XOR_00,
597 .flags = IORESOURCE_IRQ,
601 static struct mv_xor_platform_data dove_xor00_data = {
602 .shared = &dove_xor0_shared,
604 .pool_size = PAGE_SIZE,
607 static struct platform_device dove_xor00_channel = {
610 .num_resources = ARRAY_SIZE(dove_xor00_resources),
611 .resource = dove_xor00_resources,
613 .dma_mask = &dove_xor0_dmamask,
614 .coherent_dma_mask = DMA_BIT_MASK(64),
615 .platform_data = &dove_xor00_data,
619 static struct resource dove_xor01_resources[] = {
621 .start = IRQ_DOVE_XOR_01,
622 .end = IRQ_DOVE_XOR_01,
623 .flags = IORESOURCE_IRQ,
627 static struct mv_xor_platform_data dove_xor01_data = {
628 .shared = &dove_xor0_shared,
630 .pool_size = PAGE_SIZE,
633 static struct platform_device dove_xor01_channel = {
636 .num_resources = ARRAY_SIZE(dove_xor01_resources),
637 .resource = dove_xor01_resources,
639 .dma_mask = &dove_xor0_dmamask,
640 .coherent_dma_mask = DMA_BIT_MASK(64),
641 .platform_data = &dove_xor01_data,
645 void __init dove_xor0_init(void)
647 platform_device_register(&dove_xor0_shared);
650 * two engines can't do memset simultaneously, this limitation
651 * satisfied by removing memset support from one of the engines.
653 dma_cap_set(DMA_MEMCPY, dove_xor00_data.cap_mask);
654 dma_cap_set(DMA_XOR, dove_xor00_data.cap_mask);
655 platform_device_register(&dove_xor00_channel);
657 dma_cap_set(DMA_MEMCPY, dove_xor01_data.cap_mask);
658 dma_cap_set(DMA_MEMSET, dove_xor01_data.cap_mask);
659 dma_cap_set(DMA_XOR, dove_xor01_data.cap_mask);
660 platform_device_register(&dove_xor01_channel);
663 /*****************************************************************************
665 ****************************************************************************/
666 static u64 dove_xor1_dmamask = DMA_BIT_MASK(32);
668 static struct resource dove_xor1_shared_resources[] = {
671 .start = DOVE_XOR1_PHYS_BASE,
672 .end = DOVE_XOR1_PHYS_BASE + 0xff,
673 .flags = IORESOURCE_MEM,
675 .name = "xor 0 high",
676 .start = DOVE_XOR1_HIGH_PHYS_BASE,
677 .end = DOVE_XOR1_HIGH_PHYS_BASE + 0xff,
678 .flags = IORESOURCE_MEM,
682 static struct platform_device dove_xor1_shared = {
683 .name = MV_XOR_SHARED_NAME,
686 .platform_data = &dove_xor_shared_data,
688 .num_resources = ARRAY_SIZE(dove_xor1_shared_resources),
689 .resource = dove_xor1_shared_resources,
692 static struct resource dove_xor10_resources[] = {
694 .start = IRQ_DOVE_XOR_10,
695 .end = IRQ_DOVE_XOR_10,
696 .flags = IORESOURCE_IRQ,
700 static struct mv_xor_platform_data dove_xor10_data = {
701 .shared = &dove_xor1_shared,
703 .pool_size = PAGE_SIZE,
706 static struct platform_device dove_xor10_channel = {
709 .num_resources = ARRAY_SIZE(dove_xor10_resources),
710 .resource = dove_xor10_resources,
712 .dma_mask = &dove_xor1_dmamask,
713 .coherent_dma_mask = DMA_BIT_MASK(64),
714 .platform_data = &dove_xor10_data,
718 static struct resource dove_xor11_resources[] = {
720 .start = IRQ_DOVE_XOR_11,
721 .end = IRQ_DOVE_XOR_11,
722 .flags = IORESOURCE_IRQ,
726 static struct mv_xor_platform_data dove_xor11_data = {
727 .shared = &dove_xor1_shared,
729 .pool_size = PAGE_SIZE,
732 static struct platform_device dove_xor11_channel = {
735 .num_resources = ARRAY_SIZE(dove_xor11_resources),
736 .resource = dove_xor11_resources,
738 .dma_mask = &dove_xor1_dmamask,
739 .coherent_dma_mask = DMA_BIT_MASK(64),
740 .platform_data = &dove_xor11_data,
744 void __init dove_xor1_init(void)
746 platform_device_register(&dove_xor1_shared);
749 * two engines can't do memset simultaneously, this limitation
750 * satisfied by removing memset support from one of the engines.
752 dma_cap_set(DMA_MEMCPY, dove_xor10_data.cap_mask);
753 dma_cap_set(DMA_XOR, dove_xor10_data.cap_mask);
754 platform_device_register(&dove_xor10_channel);
756 dma_cap_set(DMA_MEMCPY, dove_xor11_data.cap_mask);
757 dma_cap_set(DMA_MEMSET, dove_xor11_data.cap_mask);
758 dma_cap_set(DMA_XOR, dove_xor11_data.cap_mask);
759 platform_device_register(&dove_xor11_channel);
762 /*****************************************************************************
764 ****************************************************************************/
765 static u64 sdio_dmamask = DMA_BIT_MASK(32);
767 static struct resource dove_sdio0_resources[] = {
769 .start = DOVE_SDIO0_PHYS_BASE,
770 .end = DOVE_SDIO0_PHYS_BASE + 0xff,
771 .flags = IORESOURCE_MEM,
773 .start = IRQ_DOVE_SDIO0,
774 .end = IRQ_DOVE_SDIO0,
775 .flags = IORESOURCE_IRQ,
779 static struct platform_device dove_sdio0 = {
780 .name = "sdhci-dove",
783 .dma_mask = &sdio_dmamask,
784 .coherent_dma_mask = DMA_BIT_MASK(32),
786 .resource = dove_sdio0_resources,
787 .num_resources = ARRAY_SIZE(dove_sdio0_resources),
790 void __init dove_sdio0_init(void)
792 platform_device_register(&dove_sdio0);
795 static struct resource dove_sdio1_resources[] = {
797 .start = DOVE_SDIO1_PHYS_BASE,
798 .end = DOVE_SDIO1_PHYS_BASE + 0xff,
799 .flags = IORESOURCE_MEM,
801 .start = IRQ_DOVE_SDIO1,
802 .end = IRQ_DOVE_SDIO1,
803 .flags = IORESOURCE_IRQ,
807 static struct platform_device dove_sdio1 = {
808 .name = "sdhci-dove",
811 .dma_mask = &sdio_dmamask,
812 .coherent_dma_mask = DMA_BIT_MASK(32),
814 .resource = dove_sdio1_resources,
815 .num_resources = ARRAY_SIZE(dove_sdio1_resources),
818 void __init dove_sdio1_init(void)
820 platform_device_register(&dove_sdio1);
823 void __init dove_init(void)
829 printk(KERN_INFO "Dove 88AP510 SoC, ");
830 printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
832 #ifdef CONFIG_CACHE_TAUROS2
835 dove_setup_cpu_mbus();
837 dove_ge00_shared_data.t_clk = tclk;
838 dove_uart0_data[0].uartclk = tclk;
839 dove_uart1_data[0].uartclk = tclk;
840 dove_uart2_data[0].uartclk = tclk;
841 dove_uart3_data[0].uartclk = tclk;
842 dove_spi0_data.tclk = tclk;
843 dove_spi1_data.tclk = tclk;
845 /* internal devices that every board has */