2 * DaVinci interrupt controller definitions
4 * Copyright (C) 2006 Texas Instruments.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 #ifndef __ASM_ARCH_IRQS_H
28 #define __ASM_ARCH_IRQS_H
31 #define DAVINCI_ARM_INTC_BASE 0x01C48000
45 #define IRQ_VLCDINT 11
47 #define IRQ_EMACINT 13
50 #define IRQ_CCERRINT 17
51 #define IRQ_TCERRINT0 18
52 #define IRQ_TCERRINT 19
60 #define IRQ_SDIOINT 27
63 #define IRQ_AEMIFINT 30
65 #define IRQ_TINT0_TINT12 32
66 #define IRQ_TINT0_TINT34 33
67 #define IRQ_TINT1_TINT12 34
68 #define IRQ_TINT1_TINT34 35
69 #define IRQ_PWMINT0 36
70 #define IRQ_PWMINT1 37
71 #define IRQ_PWMINT2 38
73 #define IRQ_UARTINT0 40
74 #define IRQ_UARTINT1 41
75 #define IRQ_UARTINT2 42
79 #define IRQ_DSP2ARM0 46
80 #define IRQ_DSP2ARM1 47
89 #define IRQ_GPIOBNK0 56
90 #define IRQ_GPIOBNK1 57
91 #define IRQ_GPIOBNK2 58
92 #define IRQ_GPIOBNK3 59
93 #define IRQ_GPIOBNK4 60
98 #define DAVINCI_N_AINTC_IRQ 64
99 #define DAVINCI_N_GPIO 104
101 #define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO)
103 #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
105 /* DaVinci DM6467-specific Interrupts */
106 #define IRQ_DM646X_VP_VERTINT0 0
107 #define IRQ_DM646X_VP_VERTINT1 1
108 #define IRQ_DM646X_VP_VERTINT2 2
109 #define IRQ_DM646X_VP_VERTINT3 3
110 #define IRQ_DM646X_VP_ERRINT 4
111 #define IRQ_DM646X_RESERVED_1 5
112 #define IRQ_DM646X_RESERVED_2 6
113 #define IRQ_DM646X_WDINT 7
114 #define IRQ_DM646X_CRGENINT0 8
115 #define IRQ_DM646X_CRGENINT1 9
116 #define IRQ_DM646X_TSIFINT0 10
117 #define IRQ_DM646X_TSIFINT1 11
118 #define IRQ_DM646X_VDCEINT 12
119 #define IRQ_DM646X_USBINT 13
120 #define IRQ_DM646X_USBDMAINT 14
121 #define IRQ_DM646X_PCIINT 15
122 #define IRQ_DM646X_TCERRINT2 20
123 #define IRQ_DM646X_TCERRINT3 21
124 #define IRQ_DM646X_IDE 22
125 #define IRQ_DM646X_HPIINT 23
126 #define IRQ_DM646X_EMACRXTHINT 24
127 #define IRQ_DM646X_EMACRXINT 25
128 #define IRQ_DM646X_EMACTXINT 26
129 #define IRQ_DM646X_EMACMISCINT 27
130 #define IRQ_DM646X_MCASP0TXINT 28
131 #define IRQ_DM646X_MCASP0RXINT 29
132 #define IRQ_DM646X_RESERVED_3 31
133 #define IRQ_DM646X_MCASP1TXINT 32
134 #define IRQ_DM646X_VLQINT 38
135 #define IRQ_DM646X_UARTINT2 42
136 #define IRQ_DM646X_SPINT0 43
137 #define IRQ_DM646X_SPINT1 44
138 #define IRQ_DM646X_DSP2ARMINT 45
139 #define IRQ_DM646X_RESERVED_4 46
140 #define IRQ_DM646X_PSCINT 47
141 #define IRQ_DM646X_GPIO0 48
142 #define IRQ_DM646X_GPIO1 49
143 #define IRQ_DM646X_GPIO2 50
144 #define IRQ_DM646X_GPIO3 51
145 #define IRQ_DM646X_GPIO4 52
146 #define IRQ_DM646X_GPIO5 53
147 #define IRQ_DM646X_GPIO6 54
148 #define IRQ_DM646X_GPIO7 55
149 #define IRQ_DM646X_GPIOBNK0 56
150 #define IRQ_DM646X_GPIOBNK1 57
151 #define IRQ_DM646X_GPIOBNK2 58
152 #define IRQ_DM646X_DDRINT 59
153 #define IRQ_DM646X_AEMIFINT 60
155 /* DaVinci DM355-specific Interrupts */
156 #define IRQ_DM355_CCDC_VDINT0 0
157 #define IRQ_DM355_CCDC_VDINT1 1
158 #define IRQ_DM355_CCDC_VDINT2 2
159 #define IRQ_DM355_IPIPE_HST 3
160 #define IRQ_DM355_H3AINT 4
161 #define IRQ_DM355_IPIPE_SDR 5
162 #define IRQ_DM355_IPIPEIFINT 6
163 #define IRQ_DM355_OSDINT 7
164 #define IRQ_DM355_VENCINT 8
165 #define IRQ_DM355_IMCOPINT 11
166 #define IRQ_DM355_RTOINT 13
167 #define IRQ_DM355_TINT4 13
168 #define IRQ_DM355_TINT2_TINT12 13
169 #define IRQ_DM355_UARTINT2 14
170 #define IRQ_DM355_TINT5 14
171 #define IRQ_DM355_TINT2_TINT34 14
172 #define IRQ_DM355_TINT6 15
173 #define IRQ_DM355_TINT3_TINT12 15
174 #define IRQ_DM355_SPINT1_0 17
175 #define IRQ_DM355_SPINT1_1 18
176 #define IRQ_DM355_SPINT2_0 19
177 #define IRQ_DM355_SPINT2_1 21
178 #define IRQ_DM355_TINT7 22
179 #define IRQ_DM355_TINT3_TINT34 22
180 #define IRQ_DM355_SDIOINT0 23
181 #define IRQ_DM355_MMCINT0 26
182 #define IRQ_DM355_MSINT 26
183 #define IRQ_DM355_MMCINT1 27
184 #define IRQ_DM355_PWMINT3 28
185 #define IRQ_DM355_SDIOINT1 31
186 #define IRQ_DM355_SPINT0_0 42
187 #define IRQ_DM355_SPINT0_1 43
188 #define IRQ_DM355_GPIO0 44
189 #define IRQ_DM355_GPIO1 45
190 #define IRQ_DM355_GPIO2 46
191 #define IRQ_DM355_GPIO3 47
192 #define IRQ_DM355_GPIO4 48
193 #define IRQ_DM355_GPIO5 49
194 #define IRQ_DM355_GPIO6 50
195 #define IRQ_DM355_GPIO7 51
196 #define IRQ_DM355_GPIO8 52
197 #define IRQ_DM355_GPIO9 53
198 #define IRQ_DM355_GPIOBNK0 54
199 #define IRQ_DM355_GPIOBNK1 55
200 #define IRQ_DM355_GPIOBNK2 56
201 #define IRQ_DM355_GPIOBNK3 57
202 #define IRQ_DM355_GPIOBNK4 58
203 #define IRQ_DM355_GPIOBNK5 59
204 #define IRQ_DM355_GPIOBNK6 60
206 #endif /* __ASM_ARCH_IRQS_H */