2 * Copyright (C) 2007 Atmel Corporation
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive for
9 #include <asm/mach/arch.h>
10 #include <asm/mach/map.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/gpio.h>
14 #include <linux/platform_device.h>
15 #include <linux/i2c-gpio.h>
18 #include <video/atmel_lcdc.h>
20 #include <mach/board.h>
21 #include <mach/at91sam9rl.h>
22 #include <mach/at91sam9rl_matrix.h>
23 #include <mach/at91sam9_smc.h>
24 #include <mach/at_hdmac.h>
29 /* --------------------------------------------------------------------
30 * HDMAC - AHB DMA Controller
31 * -------------------------------------------------------------------- */
33 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
34 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
36 static struct at_dma_platform_data atdma_pdata = {
40 static struct resource hdmac_resources[] = {
42 .start = AT91_BASE_SYS + AT91_DMA,
43 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
44 .flags = IORESOURCE_MEM,
47 .start = AT91SAM9RL_ID_DMA,
48 .end = AT91SAM9RL_ID_DMA,
49 .flags = IORESOURCE_IRQ,
53 static struct platform_device at_hdmac_device = {
57 .dma_mask = &hdmac_dmamask,
58 .coherent_dma_mask = DMA_BIT_MASK(32),
59 .platform_data = &atdma_pdata,
61 .resource = hdmac_resources,
62 .num_resources = ARRAY_SIZE(hdmac_resources),
65 void __init at91_add_device_hdmac(void)
67 dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
68 platform_device_register(&at_hdmac_device);
71 void __init at91_add_device_hdmac(void) {}
74 /* --------------------------------------------------------------------
75 * USB HS Device (Gadget)
76 * -------------------------------------------------------------------- */
78 #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
80 static struct resource usba_udc_resources[] = {
82 .start = AT91SAM9RL_UDPHS_FIFO,
83 .end = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
84 .flags = IORESOURCE_MEM,
87 .start = AT91SAM9RL_BASE_UDPHS,
88 .end = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
89 .flags = IORESOURCE_MEM,
92 .start = AT91SAM9RL_ID_UDPHS,
93 .end = AT91SAM9RL_ID_UDPHS,
94 .flags = IORESOURCE_IRQ,
98 #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
102 .fifo_size = maxpkt, \
108 static struct usba_ep_data usba_udc_ep[] __initdata = {
109 EP("ep0", 0, 64, 1, 0, 0),
110 EP("ep1", 1, 1024, 2, 1, 1),
111 EP("ep2", 2, 1024, 2, 1, 1),
112 EP("ep3", 3, 1024, 3, 1, 0),
113 EP("ep4", 4, 1024, 3, 1, 0),
114 EP("ep5", 5, 1024, 3, 1, 1),
115 EP("ep6", 6, 1024, 3, 1, 1),
121 * pdata doesn't have room for any endpoints, so we need to
122 * append room for the ones we need right after it.
125 struct usba_platform_data pdata;
126 struct usba_ep_data ep[7];
129 static struct platform_device at91_usba_udc_device = {
130 .name = "atmel_usba_udc",
133 .platform_data = &usba_udc_data.pdata,
135 .resource = usba_udc_resources,
136 .num_resources = ARRAY_SIZE(usba_udc_resources),
139 void __init at91_add_device_usba(struct usba_platform_data *data)
142 * Invalid pins are 0 on AT91, but the usba driver is shared
143 * with AVR32, which use negative values instead. Once/if
144 * gpio_is_valid() is ported to AT91, revisit this code.
146 usba_udc_data.pdata.vbus_pin = -EINVAL;
147 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
148 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
150 if (data && data->vbus_pin > 0) {
151 at91_set_gpio_input(data->vbus_pin, 0);
152 at91_set_deglitch(data->vbus_pin, 1);
153 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
156 /* Pullup pin is handled internally by USB device peripheral */
158 platform_device_register(&at91_usba_udc_device);
161 void __init at91_add_device_usba(struct usba_platform_data *data) {}
165 /* --------------------------------------------------------------------
167 * -------------------------------------------------------------------- */
169 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
170 static u64 mmc_dmamask = DMA_BIT_MASK(32);
171 static struct at91_mmc_data mmc_data;
173 static struct resource mmc_resources[] = {
175 .start = AT91SAM9RL_BASE_MCI,
176 .end = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
177 .flags = IORESOURCE_MEM,
180 .start = AT91SAM9RL_ID_MCI,
181 .end = AT91SAM9RL_ID_MCI,
182 .flags = IORESOURCE_IRQ,
186 static struct platform_device at91sam9rl_mmc_device = {
190 .dma_mask = &mmc_dmamask,
191 .coherent_dma_mask = DMA_BIT_MASK(32),
192 .platform_data = &mmc_data,
194 .resource = mmc_resources,
195 .num_resources = ARRAY_SIZE(mmc_resources),
198 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
205 at91_set_gpio_input(data->det_pin, 1);
206 at91_set_deglitch(data->det_pin, 1);
209 at91_set_gpio_input(data->wp_pin, 1);
211 at91_set_gpio_output(data->vcc_pin, 0);
214 at91_set_A_periph(AT91_PIN_PA2, 0);
217 at91_set_A_periph(AT91_PIN_PA1, 1);
219 /* DAT0, maybe DAT1..DAT3 */
220 at91_set_A_periph(AT91_PIN_PA0, 1);
222 at91_set_A_periph(AT91_PIN_PA3, 1);
223 at91_set_A_periph(AT91_PIN_PA4, 1);
224 at91_set_A_periph(AT91_PIN_PA5, 1);
228 platform_device_register(&at91sam9rl_mmc_device);
231 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
235 /* --------------------------------------------------------------------
237 * -------------------------------------------------------------------- */
239 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
240 static struct atmel_nand_data nand_data;
242 #define NAND_BASE AT91_CHIPSELECT_3
244 static struct resource nand_resources[] = {
247 .end = NAND_BASE + SZ_256M - 1,
248 .flags = IORESOURCE_MEM,
251 .start = AT91_BASE_SYS + AT91_ECC,
252 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
253 .flags = IORESOURCE_MEM,
257 static struct platform_device atmel_nand_device = {
258 .name = "atmel_nand",
261 .platform_data = &nand_data,
263 .resource = nand_resources,
264 .num_resources = ARRAY_SIZE(nand_resources),
267 void __init at91_add_device_nand(struct atmel_nand_data *data)
274 csa = at91_sys_read(AT91_MATRIX_EBICSA);
275 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
278 if (data->enable_pin)
279 at91_set_gpio_output(data->enable_pin, 1);
283 at91_set_gpio_input(data->rdy_pin, 1);
285 /* card detect pin */
287 at91_set_gpio_input(data->det_pin, 1);
289 at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
290 at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */
293 platform_device_register(&atmel_nand_device);
297 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
301 /* --------------------------------------------------------------------
303 * -------------------------------------------------------------------- */
306 * Prefer the GPIO code since the TWI controller isn't robust
307 * (gets overruns and underruns under load) and can only issue
308 * repeated STARTs in one scenario (the driver doesn't yet handle them).
310 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
312 static struct i2c_gpio_platform_data pdata = {
313 .sda_pin = AT91_PIN_PA23,
314 .sda_is_open_drain = 1,
315 .scl_pin = AT91_PIN_PA24,
316 .scl_is_open_drain = 1,
317 .udelay = 2, /* ~100 kHz */
320 static struct platform_device at91sam9rl_twi_device = {
323 .dev.platform_data = &pdata,
326 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
328 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
329 at91_set_multi_drive(AT91_PIN_PA23, 1);
331 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
332 at91_set_multi_drive(AT91_PIN_PA24, 1);
334 i2c_register_board_info(0, devices, nr_devices);
335 platform_device_register(&at91sam9rl_twi_device);
338 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
340 static struct resource twi_resources[] = {
342 .start = AT91SAM9RL_BASE_TWI0,
343 .end = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
344 .flags = IORESOURCE_MEM,
347 .start = AT91SAM9RL_ID_TWI0,
348 .end = AT91SAM9RL_ID_TWI0,
349 .flags = IORESOURCE_IRQ,
353 static struct platform_device at91sam9rl_twi_device = {
356 .resource = twi_resources,
357 .num_resources = ARRAY_SIZE(twi_resources),
360 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
362 /* pins used for TWI interface */
363 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
364 at91_set_multi_drive(AT91_PIN_PA23, 1);
366 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
367 at91_set_multi_drive(AT91_PIN_PA24, 1);
369 i2c_register_board_info(0, devices, nr_devices);
370 platform_device_register(&at91sam9rl_twi_device);
373 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
377 /* --------------------------------------------------------------------
379 * -------------------------------------------------------------------- */
381 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
382 static u64 spi_dmamask = DMA_BIT_MASK(32);
384 static struct resource spi_resources[] = {
386 .start = AT91SAM9RL_BASE_SPI,
387 .end = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
388 .flags = IORESOURCE_MEM,
391 .start = AT91SAM9RL_ID_SPI,
392 .end = AT91SAM9RL_ID_SPI,
393 .flags = IORESOURCE_IRQ,
397 static struct platform_device at91sam9rl_spi_device = {
401 .dma_mask = &spi_dmamask,
402 .coherent_dma_mask = DMA_BIT_MASK(32),
404 .resource = spi_resources,
405 .num_resources = ARRAY_SIZE(spi_resources),
408 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
411 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
414 unsigned long cs_pin;
416 at91_set_A_periph(AT91_PIN_PA25, 0); /* MISO */
417 at91_set_A_periph(AT91_PIN_PA26, 0); /* MOSI */
418 at91_set_A_periph(AT91_PIN_PA27, 0); /* SPCK */
420 /* Enable SPI chip-selects */
421 for (i = 0; i < nr_devices; i++) {
422 if (devices[i].controller_data)
423 cs_pin = (unsigned long) devices[i].controller_data;
425 cs_pin = spi_standard_cs[devices[i].chip_select];
427 /* enable chip-select pin */
428 at91_set_gpio_output(cs_pin, 1);
430 /* pass chip-select pin to driver */
431 devices[i].controller_data = (void *) cs_pin;
434 spi_register_board_info(devices, nr_devices);
435 platform_device_register(&at91sam9rl_spi_device);
438 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
442 /* --------------------------------------------------------------------
444 * -------------------------------------------------------------------- */
446 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
447 static u64 ac97_dmamask = DMA_BIT_MASK(32);
448 static struct ac97c_platform_data ac97_data;
450 static struct resource ac97_resources[] = {
452 .start = AT91SAM9RL_BASE_AC97C,
453 .end = AT91SAM9RL_BASE_AC97C + SZ_16K - 1,
454 .flags = IORESOURCE_MEM,
457 .start = AT91SAM9RL_ID_AC97C,
458 .end = AT91SAM9RL_ID_AC97C,
459 .flags = IORESOURCE_IRQ,
463 static struct platform_device at91sam9rl_ac97_device = {
464 .name = "atmel_ac97c",
467 .dma_mask = &ac97_dmamask,
468 .coherent_dma_mask = DMA_BIT_MASK(32),
469 .platform_data = &ac97_data,
471 .resource = ac97_resources,
472 .num_resources = ARRAY_SIZE(ac97_resources),
475 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
480 at91_set_A_periph(AT91_PIN_PD1, 0); /* AC97FS */
481 at91_set_A_periph(AT91_PIN_PD2, 0); /* AC97CK */
482 at91_set_A_periph(AT91_PIN_PD3, 0); /* AC97TX */
483 at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */
487 at91_set_gpio_output(data->reset_pin, 0);
490 platform_device_register(&at91sam9rl_ac97_device);
493 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
497 /* --------------------------------------------------------------------
499 * -------------------------------------------------------------------- */
501 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
502 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
503 static struct atmel_lcdfb_info lcdc_data;
505 static struct resource lcdc_resources[] = {
507 .start = AT91SAM9RL_LCDC_BASE,
508 .end = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
509 .flags = IORESOURCE_MEM,
512 .start = AT91SAM9RL_ID_LCDC,
513 .end = AT91SAM9RL_ID_LCDC,
514 .flags = IORESOURCE_IRQ,
518 static struct platform_device at91_lcdc_device = {
519 .name = "atmel_lcdfb",
522 .dma_mask = &lcdc_dmamask,
523 .coherent_dma_mask = DMA_BIT_MASK(32),
524 .platform_data = &lcdc_data,
526 .resource = lcdc_resources,
527 .num_resources = ARRAY_SIZE(lcdc_resources),
530 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
536 at91_set_B_periph(AT91_PIN_PC1, 0); /* LCDPWR */
537 at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */
538 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */
539 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDDEN */
540 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDCC */
541 at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */
542 at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */
543 at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */
544 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */
545 at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */
546 at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */
547 at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */
548 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */
549 at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */
550 at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */
551 at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */
552 at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */
553 at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */
554 at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */
555 at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
556 at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
559 platform_device_register(&at91_lcdc_device);
562 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
566 /* --------------------------------------------------------------------
567 * Timer/Counter block
568 * -------------------------------------------------------------------- */
570 #ifdef CONFIG_ATMEL_TCLIB
572 static struct resource tcb_resources[] = {
574 .start = AT91SAM9RL_BASE_TCB0,
575 .end = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
576 .flags = IORESOURCE_MEM,
579 .start = AT91SAM9RL_ID_TC0,
580 .end = AT91SAM9RL_ID_TC0,
581 .flags = IORESOURCE_IRQ,
584 .start = AT91SAM9RL_ID_TC1,
585 .end = AT91SAM9RL_ID_TC1,
586 .flags = IORESOURCE_IRQ,
589 .start = AT91SAM9RL_ID_TC2,
590 .end = AT91SAM9RL_ID_TC2,
591 .flags = IORESOURCE_IRQ,
595 static struct platform_device at91sam9rl_tcb_device = {
598 .resource = tcb_resources,
599 .num_resources = ARRAY_SIZE(tcb_resources),
602 static void __init at91_add_device_tc(void)
604 platform_device_register(&at91sam9rl_tcb_device);
607 static void __init at91_add_device_tc(void) { }
611 /* --------------------------------------------------------------------
613 * -------------------------------------------------------------------- */
615 #if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
616 static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
617 static struct at91_tsadcc_data tsadcc_data;
619 static struct resource tsadcc_resources[] = {
621 .start = AT91SAM9RL_BASE_TSC,
622 .end = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
623 .flags = IORESOURCE_MEM,
626 .start = AT91SAM9RL_ID_TSC,
627 .end = AT91SAM9RL_ID_TSC,
628 .flags = IORESOURCE_IRQ,
632 static struct platform_device at91sam9rl_tsadcc_device = {
633 .name = "atmel_tsadcc",
636 .dma_mask = &tsadcc_dmamask,
637 .coherent_dma_mask = DMA_BIT_MASK(32),
638 .platform_data = &tsadcc_data,
640 .resource = tsadcc_resources,
641 .num_resources = ARRAY_SIZE(tsadcc_resources),
644 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data)
649 at91_set_A_periph(AT91_PIN_PA17, 0); /* AD0_XR */
650 at91_set_A_periph(AT91_PIN_PA18, 0); /* AD1_XL */
651 at91_set_A_periph(AT91_PIN_PA19, 0); /* AD2_YT */
652 at91_set_A_periph(AT91_PIN_PA20, 0); /* AD3_TB */
655 platform_device_register(&at91sam9rl_tsadcc_device);
658 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
662 /* --------------------------------------------------------------------
664 * -------------------------------------------------------------------- */
666 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
667 static struct platform_device at91sam9rl_rtc_device = {
673 static void __init at91_add_device_rtc(void)
675 platform_device_register(&at91sam9rl_rtc_device);
678 static void __init at91_add_device_rtc(void) {}
682 /* --------------------------------------------------------------------
684 * -------------------------------------------------------------------- */
686 static struct resource rtt_resources[] = {
688 .start = AT91_BASE_SYS + AT91_RTT,
689 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
690 .flags = IORESOURCE_MEM,
694 static struct platform_device at91sam9rl_rtt_device = {
697 .resource = rtt_resources,
698 .num_resources = ARRAY_SIZE(rtt_resources),
701 static void __init at91_add_device_rtt(void)
703 platform_device_register(&at91sam9rl_rtt_device);
707 /* --------------------------------------------------------------------
709 * -------------------------------------------------------------------- */
711 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
712 static struct platform_device at91sam9rl_wdt_device = {
718 static void __init at91_add_device_watchdog(void)
720 platform_device_register(&at91sam9rl_wdt_device);
723 static void __init at91_add_device_watchdog(void) {}
727 /* --------------------------------------------------------------------
729 * --------------------------------------------------------------------*/
731 #if defined(CONFIG_ATMEL_PWM)
734 static struct resource pwm_resources[] = {
736 .start = AT91SAM9RL_BASE_PWMC,
737 .end = AT91SAM9RL_BASE_PWMC + SZ_16K - 1,
738 .flags = IORESOURCE_MEM,
741 .start = AT91SAM9RL_ID_PWMC,
742 .end = AT91SAM9RL_ID_PWMC,
743 .flags = IORESOURCE_IRQ,
747 static struct platform_device at91sam9rl_pwm0_device = {
751 .platform_data = &pwm_mask,
753 .resource = pwm_resources,
754 .num_resources = ARRAY_SIZE(pwm_resources),
757 void __init at91_add_device_pwm(u32 mask)
759 if (mask & (1 << AT91_PWM0))
760 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM0 */
762 if (mask & (1 << AT91_PWM1))
763 at91_set_B_periph(AT91_PIN_PB9, 1); /* enable PWM1 */
765 if (mask & (1 << AT91_PWM2))
766 at91_set_B_periph(AT91_PIN_PD5, 1); /* enable PWM2 */
768 if (mask & (1 << AT91_PWM3))
769 at91_set_B_periph(AT91_PIN_PD8, 1); /* enable PWM3 */
773 platform_device_register(&at91sam9rl_pwm0_device);
776 void __init at91_add_device_pwm(u32 mask) {}
780 /* --------------------------------------------------------------------
781 * SSC -- Synchronous Serial Controller
782 * -------------------------------------------------------------------- */
784 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
785 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
787 static struct resource ssc0_resources[] = {
789 .start = AT91SAM9RL_BASE_SSC0,
790 .end = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1,
791 .flags = IORESOURCE_MEM,
794 .start = AT91SAM9RL_ID_SSC0,
795 .end = AT91SAM9RL_ID_SSC0,
796 .flags = IORESOURCE_IRQ,
800 static struct platform_device at91sam9rl_ssc0_device = {
804 .dma_mask = &ssc0_dmamask,
805 .coherent_dma_mask = DMA_BIT_MASK(32),
807 .resource = ssc0_resources,
808 .num_resources = ARRAY_SIZE(ssc0_resources),
811 static inline void configure_ssc0_pins(unsigned pins)
813 if (pins & ATMEL_SSC_TF)
814 at91_set_A_periph(AT91_PIN_PC0, 1);
815 if (pins & ATMEL_SSC_TK)
816 at91_set_A_periph(AT91_PIN_PC1, 1);
817 if (pins & ATMEL_SSC_TD)
818 at91_set_A_periph(AT91_PIN_PA15, 1);
819 if (pins & ATMEL_SSC_RD)
820 at91_set_A_periph(AT91_PIN_PA16, 1);
821 if (pins & ATMEL_SSC_RK)
822 at91_set_B_periph(AT91_PIN_PA10, 1);
823 if (pins & ATMEL_SSC_RF)
824 at91_set_B_periph(AT91_PIN_PA22, 1);
827 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
829 static struct resource ssc1_resources[] = {
831 .start = AT91SAM9RL_BASE_SSC1,
832 .end = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1,
833 .flags = IORESOURCE_MEM,
836 .start = AT91SAM9RL_ID_SSC1,
837 .end = AT91SAM9RL_ID_SSC1,
838 .flags = IORESOURCE_IRQ,
842 static struct platform_device at91sam9rl_ssc1_device = {
846 .dma_mask = &ssc1_dmamask,
847 .coherent_dma_mask = DMA_BIT_MASK(32),
849 .resource = ssc1_resources,
850 .num_resources = ARRAY_SIZE(ssc1_resources),
853 static inline void configure_ssc1_pins(unsigned pins)
855 if (pins & ATMEL_SSC_TF)
856 at91_set_B_periph(AT91_PIN_PA29, 1);
857 if (pins & ATMEL_SSC_TK)
858 at91_set_B_periph(AT91_PIN_PA30, 1);
859 if (pins & ATMEL_SSC_TD)
860 at91_set_B_periph(AT91_PIN_PA13, 1);
861 if (pins & ATMEL_SSC_RD)
862 at91_set_B_periph(AT91_PIN_PA14, 1);
863 if (pins & ATMEL_SSC_RK)
864 at91_set_B_periph(AT91_PIN_PA9, 1);
865 if (pins & ATMEL_SSC_RF)
866 at91_set_B_periph(AT91_PIN_PA8, 1);
870 * SSC controllers are accessed through library code, instead of any
871 * kind of all-singing/all-dancing driver. For example one could be
872 * used by a particular I2S audio codec's driver, while another one
873 * on the same system might be used by a custom data capture driver.
875 void __init at91_add_device_ssc(unsigned id, unsigned pins)
877 struct platform_device *pdev;
880 * NOTE: caller is responsible for passing information matching
881 * "pins" to whatever will be using each particular controller.
884 case AT91SAM9RL_ID_SSC0:
885 pdev = &at91sam9rl_ssc0_device;
886 configure_ssc0_pins(pins);
888 case AT91SAM9RL_ID_SSC1:
889 pdev = &at91sam9rl_ssc1_device;
890 configure_ssc1_pins(pins);
896 platform_device_register(pdev);
900 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
904 /* --------------------------------------------------------------------
906 * -------------------------------------------------------------------- */
908 #if defined(CONFIG_SERIAL_ATMEL)
909 static struct resource dbgu_resources[] = {
911 .start = AT91_BASE_SYS + AT91_DBGU,
912 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
913 .flags = IORESOURCE_MEM,
916 .start = AT91_ID_SYS,
918 .flags = IORESOURCE_IRQ,
922 static struct atmel_uart_data dbgu_data = {
924 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
927 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
929 static struct platform_device at91sam9rl_dbgu_device = {
930 .name = "atmel_usart",
933 .dma_mask = &dbgu_dmamask,
934 .coherent_dma_mask = DMA_BIT_MASK(32),
935 .platform_data = &dbgu_data,
937 .resource = dbgu_resources,
938 .num_resources = ARRAY_SIZE(dbgu_resources),
941 static inline void configure_dbgu_pins(void)
943 at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */
944 at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */
947 static struct resource uart0_resources[] = {
949 .start = AT91SAM9RL_BASE_US0,
950 .end = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
951 .flags = IORESOURCE_MEM,
954 .start = AT91SAM9RL_ID_US0,
955 .end = AT91SAM9RL_ID_US0,
956 .flags = IORESOURCE_IRQ,
960 static struct atmel_uart_data uart0_data = {
965 static u64 uart0_dmamask = DMA_BIT_MASK(32);
967 static struct platform_device at91sam9rl_uart0_device = {
968 .name = "atmel_usart",
971 .dma_mask = &uart0_dmamask,
972 .coherent_dma_mask = DMA_BIT_MASK(32),
973 .platform_data = &uart0_data,
975 .resource = uart0_resources,
976 .num_resources = ARRAY_SIZE(uart0_resources),
979 static inline void configure_usart0_pins(unsigned pins)
981 at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */
982 at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */
984 if (pins & ATMEL_UART_RTS)
985 at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */
986 if (pins & ATMEL_UART_CTS)
987 at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */
988 if (pins & ATMEL_UART_DSR)
989 at91_set_A_periph(AT91_PIN_PD14, 0); /* DSR0 */
990 if (pins & ATMEL_UART_DTR)
991 at91_set_A_periph(AT91_PIN_PD15, 0); /* DTR0 */
992 if (pins & ATMEL_UART_DCD)
993 at91_set_A_periph(AT91_PIN_PD16, 0); /* DCD0 */
994 if (pins & ATMEL_UART_RI)
995 at91_set_A_periph(AT91_PIN_PD17, 0); /* RI0 */
998 static struct resource uart1_resources[] = {
1000 .start = AT91SAM9RL_BASE_US1,
1001 .end = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
1002 .flags = IORESOURCE_MEM,
1005 .start = AT91SAM9RL_ID_US1,
1006 .end = AT91SAM9RL_ID_US1,
1007 .flags = IORESOURCE_IRQ,
1011 static struct atmel_uart_data uart1_data = {
1016 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1018 static struct platform_device at91sam9rl_uart1_device = {
1019 .name = "atmel_usart",
1022 .dma_mask = &uart1_dmamask,
1023 .coherent_dma_mask = DMA_BIT_MASK(32),
1024 .platform_data = &uart1_data,
1026 .resource = uart1_resources,
1027 .num_resources = ARRAY_SIZE(uart1_resources),
1030 static inline void configure_usart1_pins(unsigned pins)
1032 at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */
1033 at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */
1035 if (pins & ATMEL_UART_RTS)
1036 at91_set_B_periph(AT91_PIN_PA18, 0); /* RTS1 */
1037 if (pins & ATMEL_UART_CTS)
1038 at91_set_B_periph(AT91_PIN_PA19, 0); /* CTS1 */
1041 static struct resource uart2_resources[] = {
1043 .start = AT91SAM9RL_BASE_US2,
1044 .end = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
1045 .flags = IORESOURCE_MEM,
1048 .start = AT91SAM9RL_ID_US2,
1049 .end = AT91SAM9RL_ID_US2,
1050 .flags = IORESOURCE_IRQ,
1054 static struct atmel_uart_data uart2_data = {
1059 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1061 static struct platform_device at91sam9rl_uart2_device = {
1062 .name = "atmel_usart",
1065 .dma_mask = &uart2_dmamask,
1066 .coherent_dma_mask = DMA_BIT_MASK(32),
1067 .platform_data = &uart2_data,
1069 .resource = uart2_resources,
1070 .num_resources = ARRAY_SIZE(uart2_resources),
1073 static inline void configure_usart2_pins(unsigned pins)
1075 at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */
1076 at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */
1078 if (pins & ATMEL_UART_RTS)
1079 at91_set_A_periph(AT91_PIN_PA29, 0); /* RTS2 */
1080 if (pins & ATMEL_UART_CTS)
1081 at91_set_A_periph(AT91_PIN_PA30, 0); /* CTS2 */
1084 static struct resource uart3_resources[] = {
1086 .start = AT91SAM9RL_BASE_US3,
1087 .end = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
1088 .flags = IORESOURCE_MEM,
1091 .start = AT91SAM9RL_ID_US3,
1092 .end = AT91SAM9RL_ID_US3,
1093 .flags = IORESOURCE_IRQ,
1097 static struct atmel_uart_data uart3_data = {
1102 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1104 static struct platform_device at91sam9rl_uart3_device = {
1105 .name = "atmel_usart",
1108 .dma_mask = &uart3_dmamask,
1109 .coherent_dma_mask = DMA_BIT_MASK(32),
1110 .platform_data = &uart3_data,
1112 .resource = uart3_resources,
1113 .num_resources = ARRAY_SIZE(uart3_resources),
1116 static inline void configure_usart3_pins(unsigned pins)
1118 at91_set_A_periph(AT91_PIN_PB0, 1); /* TXD3 */
1119 at91_set_A_periph(AT91_PIN_PB1, 0); /* RXD3 */
1121 if (pins & ATMEL_UART_RTS)
1122 at91_set_B_periph(AT91_PIN_PD4, 0); /* RTS3 */
1123 if (pins & ATMEL_UART_CTS)
1124 at91_set_B_periph(AT91_PIN_PD3, 0); /* CTS3 */
1127 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1128 struct platform_device *atmel_default_console_device; /* the serial console device */
1130 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1132 struct platform_device *pdev;
1133 struct atmel_uart_data *pdata;
1137 pdev = &at91sam9rl_dbgu_device;
1138 configure_dbgu_pins();
1140 case AT91SAM9RL_ID_US0:
1141 pdev = &at91sam9rl_uart0_device;
1142 configure_usart0_pins(pins);
1144 case AT91SAM9RL_ID_US1:
1145 pdev = &at91sam9rl_uart1_device;
1146 configure_usart1_pins(pins);
1148 case AT91SAM9RL_ID_US2:
1149 pdev = &at91sam9rl_uart2_device;
1150 configure_usart2_pins(pins);
1152 case AT91SAM9RL_ID_US3:
1153 pdev = &at91sam9rl_uart3_device;
1154 configure_usart3_pins(pins);
1159 pdata = pdev->dev.platform_data;
1160 pdata->num = portnr; /* update to mapped ID */
1162 if (portnr < ATMEL_MAX_UART)
1163 at91_uarts[portnr] = pdev;
1166 void __init at91_set_serial_console(unsigned portnr)
1168 if (portnr < ATMEL_MAX_UART) {
1169 atmel_default_console_device = at91_uarts[portnr];
1170 at91sam9rl_set_console_clock(at91_uarts[portnr]->id);
1174 void __init at91_add_device_serial(void)
1178 for (i = 0; i < ATMEL_MAX_UART; i++) {
1180 platform_device_register(at91_uarts[i]);
1183 if (!atmel_default_console_device)
1184 printk(KERN_INFO "AT91: No default serial console defined.\n");
1187 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1188 void __init at91_set_serial_console(unsigned portnr) {}
1189 void __init at91_add_device_serial(void) {}
1193 /* -------------------------------------------------------------------- */
1196 * These devices are always present and don't need any board-specific
1199 static int __init at91_add_standard_devices(void)
1201 at91_add_device_hdmac();
1202 at91_add_device_rtc();
1203 at91_add_device_rtt();
1204 at91_add_device_watchdog();
1205 at91_add_device_tc();
1209 arch_initcall(at91_add_standard_devices);