2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 #ifndef __ARM_KVM_MMU_H__
20 #define __ARM_KVM_MMU_H__
22 #include <asm/memory.h>
26 * We directly use the kernel VA for the HYP, as we can directly share
27 * the mapping (HTTBR "covers" TTBR1).
29 #define kern_hyp_va(kva) (kva)
31 /* Contrary to arm64, there is no need to generate a PC-relative address */
32 #define hyp_symbol_addr(s) \
34 typeof(s) *addr = &(s); \
40 #include <linux/highmem.h>
41 #include <asm/cacheflush.h>
42 #include <asm/cputype.h>
43 #include <asm/kvm_arm.h>
44 #include <asm/kvm_hyp.h>
45 #include <asm/pgalloc.h>
46 #include <asm/stage2_pgtable.h>
48 /* Ensure compatibility with arm64 */
51 #define kvm_phys_shift(kvm) KVM_PHYS_SHIFT
52 #define kvm_phys_size(kvm) (1ULL << kvm_phys_shift(kvm))
53 #define kvm_phys_mask(kvm) (kvm_phys_size(kvm) - 1ULL)
54 #define kvm_vttbr_baddr_mask(kvm) VTTBR_BADDR_MASK
56 #define stage2_pgd_size(kvm) (PTRS_PER_S2_PGD * sizeof(pgd_t))
58 int create_hyp_mappings(void *from, void *to, pgprot_t prot);
59 int create_hyp_io_mappings(phys_addr_t phys_addr, size_t size,
61 void __iomem **haddr);
62 int create_hyp_exec_mappings(phys_addr_t phys_addr, size_t size,
64 void free_hyp_pgds(void);
66 void stage2_unmap_vm(struct kvm *kvm);
67 int kvm_alloc_stage2_pgd(struct kvm *kvm);
68 void kvm_free_stage2_pgd(struct kvm *kvm);
69 int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
70 phys_addr_t pa, unsigned long size, bool writable);
72 int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
74 void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu);
76 phys_addr_t kvm_mmu_get_httbr(void);
77 phys_addr_t kvm_get_idmap_vector(void);
78 int kvm_mmu_init(void);
79 void kvm_clear_hyp_idmap(void);
81 #define kvm_mk_pmd(ptep) __pmd(__pa(ptep) | PMD_TYPE_TABLE)
82 #define kvm_mk_pud(pmdp) __pud(__pa(pmdp) | PMD_TYPE_TABLE)
83 #define kvm_mk_pgd(pudp) ({ BUILD_BUG(); 0; })
85 #define kvm_pfn_pte(pfn, prot) pfn_pte(pfn, prot)
86 #define kvm_pfn_pmd(pfn, prot) pfn_pmd(pfn, prot)
87 #define kvm_pfn_pud(pfn, prot) (__pud(0))
89 #define kvm_pud_pfn(pud) ({ WARN_ON(1); 0; })
92 #define kvm_pmd_mkhuge(pmd) pmd_mkhuge(pmd)
93 /* No support for pud hugepages */
94 #define kvm_pud_mkhuge(pud) ( {WARN_ON(1); pud; })
97 * The following kvm_*pud*() functions are provided strictly to allow
98 * sharing code with arm64. They should never be called in practice.
100 static inline void kvm_set_s2pud_readonly(pud_t *pud)
105 static inline bool kvm_s2pud_readonly(pud_t *pud)
111 static inline void kvm_set_pud(pud_t *pud, pud_t new_pud)
116 static inline pud_t kvm_s2pud_mkwrite(pud_t pud)
122 static inline pud_t kvm_s2pud_mkexec(pud_t pud)
128 static inline bool kvm_s2pud_exec(pud_t *pud)
134 static inline pud_t kvm_s2pud_mkyoung(pud_t pud)
140 static inline bool kvm_s2pud_young(pud_t pud)
146 static inline pte_t kvm_s2pte_mkwrite(pte_t pte)
148 pte_val(pte) |= L_PTE_S2_RDWR;
152 static inline pmd_t kvm_s2pmd_mkwrite(pmd_t pmd)
154 pmd_val(pmd) |= L_PMD_S2_RDWR;
158 static inline pte_t kvm_s2pte_mkexec(pte_t pte)
160 pte_val(pte) &= ~L_PTE_XN;
164 static inline pmd_t kvm_s2pmd_mkexec(pmd_t pmd)
166 pmd_val(pmd) &= ~PMD_SECT_XN;
170 static inline void kvm_set_s2pte_readonly(pte_t *pte)
172 pte_val(*pte) = (pte_val(*pte) & ~L_PTE_S2_RDWR) | L_PTE_S2_RDONLY;
175 static inline bool kvm_s2pte_readonly(pte_t *pte)
177 return (pte_val(*pte) & L_PTE_S2_RDWR) == L_PTE_S2_RDONLY;
180 static inline bool kvm_s2pte_exec(pte_t *pte)
182 return !(pte_val(*pte) & L_PTE_XN);
185 static inline void kvm_set_s2pmd_readonly(pmd_t *pmd)
187 pmd_val(*pmd) = (pmd_val(*pmd) & ~L_PMD_S2_RDWR) | L_PMD_S2_RDONLY;
190 static inline bool kvm_s2pmd_readonly(pmd_t *pmd)
192 return (pmd_val(*pmd) & L_PMD_S2_RDWR) == L_PMD_S2_RDONLY;
195 static inline bool kvm_s2pmd_exec(pmd_t *pmd)
197 return !(pmd_val(*pmd) & PMD_SECT_XN);
200 static inline bool kvm_page_empty(void *ptr)
202 struct page *ptr_page = virt_to_page(ptr);
203 return page_count(ptr_page) == 1;
206 #define kvm_pte_table_empty(kvm, ptep) kvm_page_empty(ptep)
207 #define kvm_pmd_table_empty(kvm, pmdp) kvm_page_empty(pmdp)
208 #define kvm_pud_table_empty(kvm, pudp) false
210 #define hyp_pte_table_empty(ptep) kvm_page_empty(ptep)
211 #define hyp_pmd_table_empty(pmdp) kvm_page_empty(pmdp)
212 #define hyp_pud_table_empty(pudp) false
216 #define kvm_flush_dcache_to_poc(a,l) __cpuc_flush_dcache_area((a), (l))
218 static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu)
220 return (vcpu_cp15(vcpu, c1_SCTLR) & 0b101) == 0b101;
223 static inline void __clean_dcache_guest_page(kvm_pfn_t pfn, unsigned long size)
226 * Clean the dcache to the Point of Coherency.
228 * We need to do this through a kernel mapping (using the
229 * user-space mapping has proved to be the wrong
230 * solution). For that, we need to kmap one page at a time,
231 * and iterate over the range.
234 VM_BUG_ON(size & ~PAGE_MASK);
237 void *va = kmap_atomic_pfn(pfn);
239 kvm_flush_dcache_to_poc(va, PAGE_SIZE);
248 static inline void __invalidate_icache_guest_page(kvm_pfn_t pfn,
254 * If we are going to insert an instruction page and the icache is
255 * either VIPT or PIPT, there is a potential problem where the host
256 * (or another VM) may have used the same page as this guest, and we
257 * read incorrect data from the icache. If we're using a PIPT cache,
258 * we can invalidate just that page, but if we are using a VIPT cache
259 * we need to invalidate the entire icache - damn shame - as written
260 * in the ARM ARM (DDI 0406C.b - Page B3-1393).
262 * VIVT caches are tagged using both the ASID and the VMID and doesn't
263 * need any kind of flushing (DDI 0406C.b - Page B3-1392).
266 VM_BUG_ON(size & ~PAGE_MASK);
268 if (icache_is_vivt_asid_tagged())
271 if (!icache_is_pipt()) {
272 /* any kind of VIPT cache */
273 __flush_icache_all();
278 * CTR IminLine contains Log2 of the number of words in the
279 * cache line, so we can get the number of words as
280 * 2 << (IminLine - 1). To get the number of bytes, we
281 * multiply by 4 (the number of bytes in a 32-bit word), and
282 * get 4 << (IminLine).
284 iclsz = 4 << (read_cpuid(CPUID_CACHETYPE) & 0xf);
287 void *va = kmap_atomic_pfn(pfn);
288 void *end = va + PAGE_SIZE;
292 write_sysreg(addr, ICIMVAU);
294 } while (addr < end);
305 /* Check if we need to invalidate the BTB */
306 if ((read_cpuid_ext(CPUID_EXT_MMFR1) >> 28) != 4) {
307 write_sysreg(0, BPIALLIS);
313 static inline void __kvm_flush_dcache_pte(pte_t pte)
315 void *va = kmap_atomic(pte_page(pte));
317 kvm_flush_dcache_to_poc(va, PAGE_SIZE);
322 static inline void __kvm_flush_dcache_pmd(pmd_t pmd)
324 unsigned long size = PMD_SIZE;
325 kvm_pfn_t pfn = pmd_pfn(pmd);
328 void *va = kmap_atomic_pfn(pfn);
330 kvm_flush_dcache_to_poc(va, PAGE_SIZE);
339 static inline void __kvm_flush_dcache_pud(pud_t pud)
343 #define kvm_virt_to_phys(x) virt_to_idmap((unsigned long)(x))
345 void kvm_set_way_flush(struct kvm_vcpu *vcpu);
346 void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled);
348 static inline bool __kvm_cpu_uses_extended_idmap(void)
353 static inline unsigned long __kvm_idmap_ptrs_per_pgd(void)
358 static inline void __kvm_extend_hypmap(pgd_t *boot_hyp_pgd,
360 pgd_t *merged_hyp_pgd,
361 unsigned long hyp_idmap_start) { }
363 static inline unsigned int kvm_get_vmid_bits(void)
369 * We are not in the kvm->srcu critical section most of the time, so we take
370 * the SRCU read lock here. Since we copy the data from the user page, we
371 * can immediately drop the lock again.
373 static inline int kvm_read_guest_lock(struct kvm *kvm,
374 gpa_t gpa, void *data, unsigned long len)
376 int srcu_idx = srcu_read_lock(&kvm->srcu);
377 int ret = kvm_read_guest(kvm, gpa, data, len);
379 srcu_read_unlock(&kvm->srcu, srcu_idx);
384 static inline void *kvm_get_hyp_vector(void)
386 switch(read_cpuid_part()) {
387 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
388 case ARM_CPU_PART_CORTEX_A12:
389 case ARM_CPU_PART_CORTEX_A17:
391 extern char __kvm_hyp_vector_bp_inv[];
392 return kvm_ksym_ref(__kvm_hyp_vector_bp_inv);
395 case ARM_CPU_PART_BRAHMA_B15:
396 case ARM_CPU_PART_CORTEX_A15:
398 extern char __kvm_hyp_vector_ic_inv[];
399 return kvm_ksym_ref(__kvm_hyp_vector_ic_inv);
404 extern char __kvm_hyp_vector[];
405 return kvm_ksym_ref(__kvm_hyp_vector);
410 static inline int kvm_map_vectors(void)
415 static inline int hyp_map_aux_data(void)
420 #define kvm_phys_to_vttbr(addr) (addr)
422 static inline void kvm_set_ipa_limit(void) {}
424 static inline bool kvm_cpu_has_cnp(void)
429 #endif /* !__ASSEMBLY__ */
431 #endif /* __ARM_KVM_MMU_H__ */