1 #include "tegra30.dtsi"
4 * This file contains common DT entry for all fab version of Cardhu.
5 * There is multiple fab version of Cardhu starting from A01 to A07.
6 * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
7 * A02 will have different sets of GPIOs for fixed regulator compare to
8 * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
9 * compatible with fab version A04. Based on Cardhu fab version, the
10 * related dts file need to be chosen like for Cardhu fab version A02,
11 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
12 * tegra30-cardhu-a04.dts.
13 * The identification of board is done in two ways, by looking the sticker
14 * on PCB and by reading board id eeprom.
15 * The stciker will have number like 600-81291-1000-002 C.3. In this 4th
16 * number is the fab version like here it is 002 and hence fab version A02.
17 * The (downstream internal) U-Boot of Cardhu display the board-id as
19 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
20 * In this Fab version is 02 i.e. A02.
21 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
22 * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
27 model = "NVIDIA Tegra30 Cardhu evaluation board";
28 compatible = "nvidia,cardhu", "nvidia,tegra30";
31 rtc0 = "/i2c@7000d000/tps65911@2d";
32 rtc1 = "/rtc@7000e000";
36 reg = <0x80000000 0x40000000>;
39 pcie-controller@00003000 {
41 pex-clk-supply = <&pex_hvdd_3v3_reg>;
42 vdd-supply = <&ldo1_reg>;
43 avdd-supply = <&ldo2_reg>;
46 nvidia,num-lanes = <4>;
50 nvidia,num-lanes = <1>;
55 nvidia,num-lanes = <1>;
64 nvidia,panel = <&panel>;
70 pinctrl-names = "default";
71 pinctrl-0 = <&state_default>;
73 state_default: pinmux {
75 nvidia,pins = "sdmmc1_clk_pz0";
76 nvidia,function = "sdmmc1";
77 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
78 nvidia,tristate = <TEGRA_PIN_DISABLE>;
81 nvidia,pins = "sdmmc1_cmd_pz1",
86 nvidia,function = "sdmmc1";
87 nvidia,pull = <TEGRA_PIN_PULL_UP>;
88 nvidia,tristate = <TEGRA_PIN_DISABLE>;
91 nvidia,pins = "sdmmc3_clk_pa6";
92 nvidia,function = "sdmmc3";
93 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
94 nvidia,tristate = <TEGRA_PIN_DISABLE>;
97 nvidia,pins = "sdmmc3_cmd_pa7",
102 nvidia,function = "sdmmc3";
103 nvidia,pull = <TEGRA_PIN_PULL_UP>;
104 nvidia,tristate = <TEGRA_PIN_DISABLE>;
107 nvidia,pins = "sdmmc4_clk_pcc4",
109 nvidia,function = "sdmmc4";
110 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
111 nvidia,tristate = <TEGRA_PIN_DISABLE>;
114 nvidia,pins = "sdmmc4_dat0_paa0",
122 nvidia,function = "sdmmc4";
123 nvidia,pull = <TEGRA_PIN_PULL_UP>;
124 nvidia,tristate = <TEGRA_PIN_DISABLE>;
127 nvidia,pins = "dap2_fs_pa2",
131 nvidia,function = "i2s1";
132 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
133 nvidia,tristate = <TEGRA_PIN_DISABLE>;
136 nvidia,pins = "drive_sdio3";
137 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
138 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
139 nvidia,pull-down-strength = <46>;
140 nvidia,pull-up-strength = <42>;
141 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
142 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
145 nvidia,pins = "uart3_txd_pw6",
149 nvidia,function = "uartc";
150 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
151 nvidia,tristate = <TEGRA_PIN_DISABLE>;
161 compatible = "nvidia,tegra30-hsuart";
169 panelddc: i2c@7000c000 {
171 clock-frequency = <100000>;
176 clock-frequency = <100000>;
181 clock-frequency = <100000>;
183 /* ALS and Proximity sensor */
185 compatible = "isil,isl29028";
187 interrupt-parent = <&gpio>;
188 interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
192 compatible = "nxp,pca9546";
193 #address-cells = <1>;
201 clock-frequency = <100000>;
206 clock-frequency = <100000>;
209 compatible = "wlf,wm8903";
211 interrupt-parent = <&gpio>;
212 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
218 micdet-delay = <100>;
219 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
223 compatible = "ti,tps65911";
226 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
227 #interrupt-cells = <2>;
228 interrupt-controller;
230 ti,system-power-controller;
235 vcc1-supply = <&vdd_ac_bat_reg>;
236 vcc2-supply = <&vdd_ac_bat_reg>;
237 vcc3-supply = <&vio_reg>;
238 vcc4-supply = <&vdd_5v0_reg>;
239 vcc5-supply = <&vdd_ac_bat_reg>;
240 vcc6-supply = <&vdd2_reg>;
241 vcc7-supply = <&vdd_ac_bat_reg>;
242 vccio-supply = <&vdd_ac_bat_reg>;
246 regulator-name = "vddio_ddr_1v2";
247 regulator-min-microvolt = <1200000>;
248 regulator-max-microvolt = <1200000>;
253 regulator-name = "vdd_1v5_gen";
254 regulator-min-microvolt = <1500000>;
255 regulator-max-microvolt = <1500000>;
259 vddctrl_reg: vddctrl {
260 regulator-name = "vdd_cpu,vdd_sys";
261 regulator-min-microvolt = <1000000>;
262 regulator-max-microvolt = <1000000>;
267 regulator-name = "vdd_1v8_gen";
268 regulator-min-microvolt = <1800000>;
269 regulator-max-microvolt = <1800000>;
274 regulator-name = "vdd_pexa,vdd_pexb";
275 regulator-min-microvolt = <1050000>;
276 regulator-max-microvolt = <1050000>;
280 regulator-name = "vdd_sata,avdd_plle";
281 regulator-min-microvolt = <1050000>;
282 regulator-max-microvolt = <1050000>;
285 /* LDO3 is not connected to anything */
288 regulator-name = "vdd_rtc";
289 regulator-min-microvolt = <1200000>;
290 regulator-max-microvolt = <1200000>;
295 regulator-name = "vddio_sdmmc,avdd_vdac";
296 regulator-min-microvolt = <3300000>;
297 regulator-max-microvolt = <3300000>;
302 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
303 regulator-min-microvolt = <1200000>;
304 regulator-max-microvolt = <1200000>;
308 regulator-name = "vdd_pllm,x,u,a_p_c_s";
309 regulator-min-microvolt = <1200000>;
310 regulator-max-microvolt = <1200000>;
315 regulator-name = "vdd_ddr_hs";
316 regulator-min-microvolt = <1000000>;
317 regulator-max-microvolt = <1000000>;
323 temperature-sensor@4c {
324 compatible = "onnn,nct1008";
326 vcc-supply = <&sys_3v3_reg>;
327 interrupt-parent = <&gpio>;
328 interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
332 compatible = "ti,tps62361";
335 regulator-name = "tps62361-vout";
336 regulator-min-microvolt = <500000>;
337 regulator-max-microvolt = <1500000>;
347 spi-max-frequency = <25000000>;
349 compatible = "winbond,w25q32";
351 spi-max-frequency = <20000000>;
357 nvidia,invert-interrupt;
358 nvidia,suspend-mode = <1>;
359 nvidia,cpu-pwr-good-time = <2000>;
360 nvidia,cpu-pwr-off-time = <200>;
361 nvidia,core-pwr-good-time = <3845 3845>;
362 nvidia,core-pwr-off-time = <0>;
363 nvidia,core-power-req-active-high;
364 nvidia,sys-clock-req-active-high;
375 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
376 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
377 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
392 vbus-supply = <&usb3_vbus_reg>;
396 backlight: backlight {
397 compatible = "pwm-backlight";
399 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
400 power-supply = <&vdd_bl_reg>;
401 pwms = <&pwm 0 5000000>;
403 brightness-levels = <0 4 8 16 32 64 128 255>;
404 default-brightness-level = <6>;
408 compatible = "simple-bus";
409 #address-cells = <1>;
413 compatible = "fixed-clock";
416 clock-frequency = <32768>;
421 compatible = "chunghwa,claa101wb01", "simple-panel";
422 ddc-i2c-bus = <&panelddc>;
424 power-supply = <&vdd_pnl1_reg>;
425 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
427 backlight = <&backlight>;
431 compatible = "simple-bus";
432 #address-cells = <1>;
435 vdd_ac_bat_reg: regulator@0 {
436 compatible = "regulator-fixed";
438 regulator-name = "vdd_ac_bat";
439 regulator-min-microvolt = <5000000>;
440 regulator-max-microvolt = <5000000>;
444 cam_1v8_reg: regulator@1 {
445 compatible = "regulator-fixed";
447 regulator-name = "cam_1v8";
448 regulator-min-microvolt = <1800000>;
449 regulator-max-microvolt = <1800000>;
451 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
452 vin-supply = <&vio_reg>;
455 cp_5v_reg: regulator@2 {
456 compatible = "regulator-fixed";
458 regulator-name = "cp_5v";
459 regulator-min-microvolt = <5000000>;
460 regulator-max-microvolt = <5000000>;
464 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
467 emmc_3v3_reg: regulator@3 {
468 compatible = "regulator-fixed";
470 regulator-name = "emmc_3v3";
471 regulator-min-microvolt = <3300000>;
472 regulator-max-microvolt = <3300000>;
476 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
477 vin-supply = <&sys_3v3_reg>;
480 modem_3v3_reg: regulator@4 {
481 compatible = "regulator-fixed";
483 regulator-name = "modem_3v3";
484 regulator-min-microvolt = <3300000>;
485 regulator-max-microvolt = <3300000>;
487 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
490 pex_hvdd_3v3_reg: regulator@5 {
491 compatible = "regulator-fixed";
493 regulator-name = "pex_hvdd_3v3";
494 regulator-min-microvolt = <3300000>;
495 regulator-max-microvolt = <3300000>;
497 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
498 vin-supply = <&sys_3v3_reg>;
501 vdd_cam1_ldo_reg: regulator@6 {
502 compatible = "regulator-fixed";
504 regulator-name = "vdd_cam1_ldo";
505 regulator-min-microvolt = <2800000>;
506 regulator-max-microvolt = <2800000>;
508 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
509 vin-supply = <&sys_3v3_reg>;
512 vdd_cam2_ldo_reg: regulator@7 {
513 compatible = "regulator-fixed";
515 regulator-name = "vdd_cam2_ldo";
516 regulator-min-microvolt = <2800000>;
517 regulator-max-microvolt = <2800000>;
519 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
520 vin-supply = <&sys_3v3_reg>;
523 vdd_cam3_ldo_reg: regulator@8 {
524 compatible = "regulator-fixed";
526 regulator-name = "vdd_cam3_ldo";
527 regulator-min-microvolt = <3300000>;
528 regulator-max-microvolt = <3300000>;
530 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
531 vin-supply = <&sys_3v3_reg>;
534 vdd_com_reg: regulator@9 {
535 compatible = "regulator-fixed";
537 regulator-name = "vdd_com";
538 regulator-min-microvolt = <3300000>;
539 regulator-max-microvolt = <3300000>;
543 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
544 vin-supply = <&sys_3v3_reg>;
547 vdd_fuse_3v3_reg: regulator@10 {
548 compatible = "regulator-fixed";
550 regulator-name = "vdd_fuse_3v3";
551 regulator-min-microvolt = <3300000>;
552 regulator-max-microvolt = <3300000>;
554 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
555 vin-supply = <&sys_3v3_reg>;
558 vdd_pnl1_reg: regulator@11 {
559 compatible = "regulator-fixed";
561 regulator-name = "vdd_pnl1";
562 regulator-min-microvolt = <3300000>;
563 regulator-max-microvolt = <3300000>;
567 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
568 vin-supply = <&sys_3v3_reg>;
571 vdd_vid_reg: regulator@12 {
572 compatible = "regulator-fixed";
574 regulator-name = "vddio_vid";
575 regulator-min-microvolt = <5000000>;
576 regulator-max-microvolt = <5000000>;
578 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
580 vin-supply = <&vdd_5v0_reg>;
585 compatible = "nvidia,tegra-audio-wm8903-cardhu",
586 "nvidia,tegra-audio-wm8903";
587 nvidia,model = "NVIDIA Tegra Cardhu";
589 nvidia,audio-routing =
590 "Headphone Jack", "HPOUTR",
591 "Headphone Jack", "HPOUTL",
596 "Mic Jack", "MICBIAS",
599 nvidia,i2s-controller = <&tegra_i2s1>;
600 nvidia,audio-codec = <&wm8903>;
602 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
603 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
606 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
607 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
608 <&tegra_car TEGRA30_CLK_EXTERN1>;
609 clock-names = "pll_a", "pll_a_out0", "mclk";