1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra20.dtsi"
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
14 model = "Acer Iconia Tab A500";
15 compatible = "acer,picasso", "nvidia,tegra20";
18 mmc0 = &sdmmc4; /* eMMC */
19 mmc1 = &sdmmc3; /* MicroSD */
20 mmc2 = &sdmmc1; /* WiFi */
23 rtc1 = "/rtc@7000e000";
25 serial0 = &uartd; /* Docking station */
26 serial1 = &uartc; /* Bluetooth */
27 serial2 = &uartb; /* GPS */
31 * The decompressor and also some bootloaders rely on a
32 * pre-existing /chosen node to be available to insert the
33 * command line and merge other ATAGS info.
38 reg = <0x00000000 0x40000000>;
47 compatible = "ramoops";
48 reg = <0x2ffe0000 0x10000>; /* 64kB */
49 console-size = <0x8000>; /* 32kB */
50 record-size = <0x400>; /* 1kB */
55 compatible = "shared-dma-pool";
56 alloc-ranges = <0x30000000 0x10000000>;
57 size = <0x10000000>; /* 256MiB */
69 lcd_output: endpoint {
70 remote-endpoint = <&lvds_encoder_input>;
80 vdd-supply = <&hdmi_vdd_reg>;
81 pll-supply = <&hdmi_pll_reg>;
82 hdmi-supply = <&vdd_5v0_sys>;
84 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
85 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
91 pinctrl-names = "default";
92 pinctrl-0 = <&state_default>;
94 state_default: pinmux {
97 nvidia,function = "ide";
100 nvidia,pins = "atb", "gma", "gme";
101 nvidia,function = "sdio4";
105 nvidia,function = "nand";
108 nvidia,pins = "atd", "ate", "gmb", "spia",
110 nvidia,function = "gmi";
113 nvidia,pins = "cdev1";
114 nvidia,function = "plla_out";
117 nvidia,pins = "cdev2";
118 nvidia,function = "pllp_out4";
121 nvidia,pins = "crtp", "lm1";
122 nvidia,function = "crt";
125 nvidia,pins = "csus";
126 nvidia,function = "vi_sensor_clk";
129 nvidia,pins = "dap1";
130 nvidia,function = "dap1";
133 nvidia,pins = "dap2";
134 nvidia,function = "dap2";
137 nvidia,pins = "dap3";
138 nvidia,function = "dap3";
141 nvidia,pins = "dap4";
142 nvidia,function = "dap4";
145 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
146 nvidia,function = "vi";
150 nvidia,function = "i2c3";
154 nvidia,function = "uartd";
158 nvidia,function = "sflash";
162 nvidia,function = "pwm";
165 nvidia,pins = "gpu7";
166 nvidia,function = "rtck";
169 nvidia,pins = "gpv", "slxa";
170 nvidia,function = "pcie";
173 nvidia,pins = "hdint";
174 nvidia,function = "hdmi";
177 nvidia,pins = "i2cp";
178 nvidia,function = "i2cp";
181 nvidia,pins = "irrx", "irtx";
182 nvidia,function = "uartb";
185 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
187 nvidia,function = "kbc";
190 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
192 nvidia,function = "rsvd4";
195 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
196 "ld5", "ld6", "ld7", "ld8", "ld9",
197 "ld10", "ld11", "ld12", "ld13", "ld14",
198 "ld15", "ld16", "ld17", "ldi", "lhp0",
199 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
200 "lsc1", "lsck", "lsda", "lspi", "lvp1",
202 nvidia,function = "displaya";
205 nvidia,pins = "owc", "spdi", "spdo", "uac";
206 nvidia,function = "rsvd2";
210 nvidia,function = "pwr_on";
214 nvidia,function = "i2c1";
217 nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
218 nvidia,function = "sdio3";
221 nvidia,pins = "sdio1";
222 nvidia,function = "sdio1";
225 nvidia,pins = "slxd";
226 nvidia,function = "spdif";
229 nvidia,pins = "spid", "spie", "spif";
230 nvidia,function = "spi1";
233 nvidia,pins = "spig", "spih";
234 nvidia,function = "spi2_alt";
237 nvidia,pins = "uaa", "uab", "uda";
238 nvidia,function = "ulpi";
242 nvidia,function = "irda";
245 nvidia,pins = "uca", "ucb";
246 nvidia,function = "uartc";
249 nvidia,pins = "ata", "atb", "atc", "atd",
250 "cdev1", "cdev2", "csus", "dap1",
251 "dap4", "dte", "dtf", "gma", "gmc",
252 "gme", "gpu", "gpu7", "gpv", "i2cp",
253 "irrx", "irtx", "pta", "rm",
254 "sdc", "sdd", "slxc", "slxd", "slxk",
255 "spdi", "spdo", "uac", "uad", "uda";
256 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
257 nvidia,tristate = <TEGRA_PIN_DISABLE>;
260 nvidia,pins = "ate", "dap2", "dap3",
261 "gmd", "owc", "spia", "spib", "spic",
263 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
264 nvidia,tristate = <TEGRA_PIN_ENABLE>;
267 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
268 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
269 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
272 nvidia,pins = "crtp", "gmb", "slxa", "spig",
274 nvidia,pull = <TEGRA_PIN_PULL_UP>;
275 nvidia,tristate = <TEGRA_PIN_ENABLE>;
278 nvidia,pins = "dta", "dtb", "dtc", "dtd", "kbcb";
279 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
280 nvidia,tristate = <TEGRA_PIN_DISABLE>;
283 nvidia,pins = "spif";
284 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
285 nvidia,tristate = <TEGRA_PIN_ENABLE>;
288 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
289 "lpw1", "lsck", "lsda", "lsdi",
291 nvidia,tristate = <TEGRA_PIN_ENABLE>;
294 nvidia,pins = "kbca", "kbcc", "kbcd",
295 "kbce", "kbcf", "sdio1", "uaa",
297 nvidia,pull = <TEGRA_PIN_PULL_UP>;
298 nvidia,tristate = <TEGRA_PIN_DISABLE>;
301 nvidia,pins = "lc", "ls";
302 nvidia,pull = <TEGRA_PIN_PULL_UP>;
305 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
306 "ld5", "ld6", "ld7", "ld8", "ld9",
307 "ld10", "ld11", "ld12", "ld13", "ld14",
308 "ld15", "ld16", "ld17", "ldi", "lhp0",
309 "lhp1", "lhp2", "lhs", "lm0", "lpp",
310 "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
311 "lvp1", "lvs", "pmc", "sdb";
312 nvidia,tristate = <TEGRA_PIN_DISABLE>;
315 nvidia,pins = "ld17_0";
316 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
319 nvidia,pins = "drive_ddc",
322 nvidia,pull-up-strength = <31>;
323 nvidia,pull-down-strength = <31>;
324 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
325 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
326 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
327 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
328 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
331 nvidia,pins = "drive_dbg",
335 nvidia,pull-up-strength = <31>;
336 nvidia,pull-down-strength = <31>;
337 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
338 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
339 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
340 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
341 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
345 state_i2cmux_ddc: pinmux-i2cmux-ddc {
348 nvidia,function = "i2c2";
352 nvidia,function = "rsvd4";
356 state_i2cmux_pta: pinmux-i2cmux-pta {
359 nvidia,function = "rsvd4";
363 nvidia,function = "i2c2";
367 state_i2cmux_idle: pinmux-i2cmux-idle {
370 nvidia,function = "rsvd4";
374 nvidia,function = "rsvd4";
379 tegra_spdif: spdif@70002400 {
382 nvidia,fixed-parent-rate;
385 tegra_i2s1: i2s@70002800 {
388 nvidia,fixed-parent-rate;
391 uartb: serial@70006040 {
392 compatible = "nvidia,tegra20-hsuart";
393 /delete-property/ reg-shift;
397 uartc: serial@70006200 {
398 compatible = "nvidia,tegra20-hsuart";
399 /delete-property/ reg-shift;
402 /* Azurewave AW-NH665 BCM4329B1 */
404 compatible = "brcm,bcm4329-bt";
406 interrupt-parent = <&gpio>;
407 interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
408 interrupt-names = "host-wakeup";
410 /* PLLP 216MHz / 16 / 4 */
411 max-speed = <3375000>;
413 clocks = <&rtc_32k_wifi>;
414 clock-names = "txco";
416 vbat-supply = <&vdd_3v3_sys>;
417 vddio-supply = <&vdd_1v8_sys>;
419 device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
420 shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
424 uartd: serial@70006300 {
425 /* Docking station */
429 clock-frequency = <400000>;
432 wm8903: audio-codec@1a {
433 compatible = "wlf,wm8903";
436 interrupt-parent = <&gpio>;
437 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_BOTH>;
443 micdet-delay = <100>;
446 0x0000 /* MIC_LR_OUT# GPIO, output, low */
447 0x0000 /* FM2018-enable GPIO, output, low */
448 0x0000 /* Speaker-enable GPIO, output, low */
449 0x0200 /* Interrupt, output */
450 0x01a0 /* BCLK, input, active high */
453 AVDD-supply = <&vdd_1v8_sys>;
454 CPVDD-supply = <&vdd_1v8_sys>;
455 DBVDD-supply = <&vdd_1v8_sys>;
456 DCVDD-supply = <&vdd_1v8_sys>;
460 compatible = "atmel,maxtouch";
463 interrupt-parent = <&gpio>;
464 interrupts = <TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW>;
466 reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
468 vdda-supply = <&vdd_3v3_sys>;
469 vdd-supply = <&vdd_3v3_sys>;
471 atmel,wakeup-method = <ATMEL_MXT_WAKEUP_I2C_SCL>;
475 compatible = "invensense,mpu3050";
478 interrupt-parent = <&gpio>;
479 interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
481 vdd-supply = <&vdd_3v3_sys>;
482 vlogic-supply = <&vdd_1v8_sys>;
484 mount-matrix = "0", "1", "0",
489 #address-cells = <1>;
493 compatible = "kionix,kxtf9";
496 interrupt-parent = <&gpio>;
497 interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
499 vdd-supply = <&vdd_1v8_sys>;
500 vddio-supply = <&vdd_1v8_sys>;
502 mount-matrix = "0", "1", "0",
511 clock-frequency = <10000>;
516 compatible = "i2c-mux-pinctrl";
517 #address-cells = <1>;
520 i2c-parent = <&{/i2c@7000c400}>;
522 pinctrl-names = "ddc", "pta", "idle";
523 pinctrl-0 = <&state_i2cmux_ddc>;
524 pinctrl-1 = <&state_i2cmux_pta>;
525 pinctrl-2 = <&state_i2cmux_idle>;
529 #address-cells = <1>;
535 #address-cells = <1>;
538 embedded-controller@58 {
539 compatible = "acer,a500-iconia-ec", "ene,kb930";
542 system-power-controller;
544 monitored-battery = <&bat1010>;
545 power-supplies = <&mains>;
555 clock-frequency = <100000>;
559 compatible = "asahi-kasei,ak8975";
562 interrupt-parent = <&gpio>;
563 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_EDGE_RISING>;
565 vdd-supply = <&vdd_3v3_sys>;
566 vid-supply = <&vdd_1v8_sys>;
568 mount-matrix = "1", "0", "0",
574 compatible = "ti,tps6586x";
577 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
582 sys-supply = <&vdd_5v0_sys>;
583 vin-sm0-supply = <&sys_reg>;
584 vin-sm1-supply = <&sys_reg>;
585 vin-sm2-supply = <&sys_reg>;
586 vinldo01-supply = <&sm2_reg>;
587 vinldo23-supply = <&sm2_reg>;
588 vinldo4-supply = <&sm2_reg>;
589 vinldo678-supply = <&sm2_reg>;
590 vinldo9-supply = <&sm2_reg>;
594 regulator-name = "vdd_sys";
599 regulator-name = "vdd_sm0,vdd_core";
600 regulator-min-microvolt = <950000>;
601 regulator-max-microvolt = <1300000>;
602 regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
603 regulator-coupled-max-spread = <170000 550000>;
607 nvidia,tegra-core-regulator;
611 regulator-name = "vdd_sm1,vdd_cpu";
612 regulator-min-microvolt = <750000>;
613 regulator-max-microvolt = <1125000>;
614 regulator-coupled-with = <&vdd_core &rtc_vdd>;
615 regulator-coupled-max-spread = <550000 550000>;
619 nvidia,tegra-cpu-regulator;
623 regulator-name = "vdd_sm2,vin_ldo*";
624 regulator-min-microvolt = <3700000>;
625 regulator-max-microvolt = <3700000>;
629 /* LDO0 is not connected to anything */
632 regulator-name = "vdd_ldo1,avdd_pll*";
633 regulator-min-microvolt = <1100000>;
634 regulator-max-microvolt = <1100000>;
640 regulator-name = "vdd_ldo2,vdd_rtc";
641 regulator-min-microvolt = <950000>;
642 regulator-max-microvolt = <1300000>;
643 regulator-coupled-with = <&vdd_core &vdd_cpu>;
644 regulator-coupled-max-spread = <170000 550000>;
648 nvidia,tegra-rtc-regulator;
652 regulator-name = "vdd_ldo3,avdd_usb*";
653 regulator-min-microvolt = <3300000>;
654 regulator-max-microvolt = <3300000>;
659 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
660 regulator-min-microvolt = <1800000>;
661 regulator-max-microvolt = <1800000>;
667 regulator-name = "vdd_ldo5,vcore_mmc";
668 regulator-min-microvolt = <2850000>;
669 regulator-max-microvolt = <2850000>;
673 avdd_vdac_reg: ldo6 {
674 regulator-name = "vdd_ldo6,avdd_vdac";
675 regulator-min-microvolt = <2850000>;
676 regulator-max-microvolt = <2850000>;
680 regulator-name = "vdd_ldo7,avdd_hdmi";
681 regulator-min-microvolt = <3300000>;
682 regulator-max-microvolt = <3300000>;
686 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
687 regulator-min-microvolt = <1800000>;
688 regulator-max-microvolt = <1800000>;
692 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
693 regulator-min-microvolt = <2850000>;
694 regulator-max-microvolt = <2850000>;
700 regulator-name = "vdd_rtc_out,vdd_cell";
701 regulator-min-microvolt = <3300000>;
702 regulator-max-microvolt = <3300000>;
709 nct1008: temperature-sensor@4c {
710 compatible = "onnn,nct1008";
712 vcc-supply = <&vdd_3v3_sys>;
714 interrupt-parent = <&gpio>;
715 interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
717 #thermal-sensor-cells = <1>;
722 nvidia,invert-interrupt;
723 nvidia,suspend-mode = <1>;
724 nvidia,cpu-pwr-good-time = <2000>;
725 nvidia,cpu-pwr-off-time = <100>;
726 nvidia,core-pwr-good-time = <3845 3845>;
727 nvidia,core-pwr-off-time = <458>;
728 nvidia,sys-clock-req-active-high;
729 core-supply = <&vdd_core>;
733 compatible = "nvidia,tegra20-udc";
735 dr_mode = "peripheral";
740 dr_mode = "peripheral";
741 nvidia,xcvr-setup-use-fuses;
742 nvidia,xcvr-lsfslew = <2>;
743 nvidia,xcvr-lsrslew = <2>;
752 nvidia,xcvr-setup-use-fuses;
753 nvidia,xcvr-lsfslew = <2>;
754 nvidia,xcvr-lsrslew = <2>;
755 vbus-supply = <&vdd_5v0_sys>;
758 brcm_wifi_pwrseq: wifi-pwrseq {
759 compatible = "mmc-pwrseq-simple";
761 clocks = <&rtc_32k_wifi>;
762 clock-names = "ext_clock";
764 reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
765 post-power-on-delay-ms = <300>;
766 power-off-delay-us = <300>;
769 sdmmc1: mmc@c8000000 {
772 #address-cells = <1>;
775 assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
776 assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
777 assigned-clock-rates = <50000000>;
779 max-frequency = <50000000>;
780 keep-power-in-suspend;
784 mmc-pwrseq = <&brcm_wifi_pwrseq>;
785 vmmc-supply = <&vdd_3v3_sys>;
786 vqmmc-supply = <&vdd_1v8_sys>;
788 /* Azurewave AW-NH611 BCM4329 */
791 compatible = "brcm,bcm4329-fmac";
792 interrupt-parent = <&gpio>;
793 interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
794 interrupt-names = "host-wake";
798 sdmmc3: mmc@c8000400 {
801 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
802 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
803 vmmc-supply = <&vdd_3v3_sys>;
804 vqmmc-supply = <&vdd_3v3_sys>;
807 sdmmc4: mmc@c8000600 {
810 vmmc-supply = <&vcore_emmc>;
811 vqmmc-supply = <&vdd_3v3_sys>;
815 mains: ac-adapter-detect {
816 compatible = "gpio-charger";
817 charger-type = "mains";
818 gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
821 backlight: backlight {
822 compatible = "pwm-backlight";
824 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
825 power-supply = <&vdd_3v3_sys>;
826 pwms = <&pwm 2 41667>;
828 brightness-levels = <7 255>;
829 num-interpolated-steps = <248>;
830 default-brightness-level = <20>;
833 bat1010: battery-2s1p {
834 compatible = "simple-battery";
835 charge-full-design-microamp-hours = <3260000>;
836 energy-full-design-microwatt-hours = <24000000>;
837 operating-range-celsius = <0 40>;
840 /* PMIC has a built-in 32KHz oscillator which is used by PMC */
841 clk32k_in: clock-32k-in {
842 compatible = "fixed-clock";
844 clock-frequency = <32768>;
845 clock-output-names = "tps658621-out32k";
849 * This standalone onboard fixed-clock always-ON 32KHz
850 * oscillator is used as a reference clock-source by the
851 * Azurewave WiFi/BT module.
853 rtc_32k_wifi: clock-32k-wifi {
854 compatible = "fixed-clock";
856 clock-frequency = <32768>;
857 clock-output-names = "kk3270032";
862 cpu-supply = <&vdd_cpu>;
863 operating-points-v2 = <&cpu0_opp_table>;
864 #cooling-cells = <2>;
868 cpu-supply = <&vdd_cpu>;
869 operating-points-v2 = <&cpu0_opp_table>;
870 #cooling-cells = <2>;
875 compatible = "auo,b101ew05", "panel-lvds";
877 ddc-i2c-bus = <&panel_ddc>;
878 power-supply = <&vdd_pnl>;
879 backlight = <&backlight>;
884 data-mapping = "jeida-18";
887 clock-frequency = <71200000>;
899 panel_input: endpoint {
900 remote-endpoint = <&lvds_encoder_output>;
906 compatible = "gpio-keys";
910 gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
911 linux,code = <KEY_POWER>;
912 debounce-interval = <10>;
913 wakeup-event-action = <EV_ACT_ASSERTED>;
918 label = "Rotate-lock";
919 gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_HIGH>;
920 linux,code = <SW_ROTATE_LOCK>;
921 linux,input-type = <EV_SW>;
922 debounce-interval = <10>;
927 gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
928 linux,code = <KEY_VOLUMEUP>;
929 debounce-interval = <10>;
930 wakeup-event-action = <EV_ACT_ASSERTED>;
935 label = "Volume Down";
936 gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
937 linux,code = <KEY_VOLUMEDOWN>;
938 debounce-interval = <10>;
939 wakeup-event-action = <EV_ACT_ASSERTED>;
945 compatible = "gpio-vibrator";
946 enable-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
947 vcc-supply = <&vdd_3v3_sys>;
951 compatible = "ti,sn75lvds83", "lvds-encoder";
953 powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
954 power-supply = <&vdd_3v3_sys>;
957 #address-cells = <1>;
963 lvds_encoder_input: endpoint {
964 remote-endpoint = <&lcd_output>;
971 lvds_encoder_output: endpoint {
972 remote-endpoint = <&panel_input>;
978 vdd_5v0_sys: regulator-5v0 {
979 compatible = "regulator-fixed";
980 regulator-name = "vdd_5v0";
981 regulator-min-microvolt = <5000000>;
982 regulator-max-microvolt = <5000000>;
986 vdd_3v3_sys: regulator-3v3 {
987 compatible = "regulator-fixed";
988 regulator-name = "vdd_3v3_vs";
989 regulator-min-microvolt = <3300000>;
990 regulator-max-microvolt = <3300000>;
992 vin-supply = <&vdd_5v0_sys>;
995 vdd_1v8_sys: regulator-1v8 {
996 compatible = "regulator-fixed";
997 regulator-name = "vdd_1v8_vs";
998 regulator-min-microvolt = <1800000>;
999 regulator-max-microvolt = <1800000>;
1000 regulator-always-on;
1001 vin-supply = <&vdd_5v0_sys>;
1004 vdd_pnl: regulator-panel {
1005 compatible = "regulator-fixed";
1006 regulator-name = "vdd_panel";
1007 regulator-min-microvolt = <3300000>;
1008 regulator-max-microvolt = <3300000>;
1009 regulator-enable-ramp-delay = <300000>;
1010 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
1012 vin-supply = <&vdd_5v0_sys>;
1016 compatible = "nvidia,tegra-audio-wm8903-picasso",
1017 "nvidia,tegra-audio-wm8903";
1018 nvidia,model = "Acer Iconia Tab A500 WM8903";
1020 nvidia,audio-routing =
1021 "Headphone Jack", "HPOUTR",
1022 "Headphone Jack", "HPOUTL",
1023 "Int Spk", "LINEOUTL",
1024 "Int Spk", "LINEOUTR",
1025 "Mic Jack", "MICBIAS",
1031 nvidia,i2s-controller = <&tegra_i2s1>;
1032 nvidia,audio-codec = <&wm8903>;
1034 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
1035 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1036 nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
1039 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
1040 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
1041 <&tegra_car TEGRA20_CLK_CDEV1>;
1042 clock-names = "pll_a", "pll_a_out0", "mclk";
1047 * NCT1008 has two sensors:
1049 * 0: internal that monitors ambient/skin temperature
1050 * 1: external that is connected to the CPU's diode
1052 * Ideally we should use userspace thermal governor,
1053 * but it's a much more complex solution. The "skin"
1054 * zone is a simpler solution which prevents A500 from
1055 * getting too hot from a user's tactile perspective.
1056 * The CPU zone is intended to protect silicon from damage.
1060 polling-delay-passive = <1000>; /* milliseconds */
1061 polling-delay = <5000>; /* milliseconds */
1063 thermal-sensors = <&nct1008 0>;
1067 /* start throttling at 60C */
1068 temperature = <60000>;
1074 /* shut down at 70C */
1075 temperature = <70000>;
1076 hysteresis = <2000>;
1084 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1085 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1091 polling-delay-passive = <1000>; /* milliseconds */
1092 polling-delay = <5000>; /* milliseconds */
1094 thermal-sensors = <&nct1008 1>;
1098 /* throttle at 85C until temperature drops to 84.8C */
1099 temperature = <85000>;
1105 /* shut down at 90C */
1106 temperature = <90000>;
1107 hysteresis = <2000>;
1115 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1116 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1122 memory-controller@7000f400 {
1123 nvidia,use-ram-code;
1126 nvidia,ram-code = <0>; /* elpida-8gb */
1129 #address-cells = <1>;
1134 compatible = "nvidia,tegra20-emc-table";
1135 clock-frequency = <25000>;
1136 nvidia,emc-registers = <0x00000002 0x00000006
1137 0x00000003 0x00000003 0x00000006 0x00000004
1138 0x00000002 0x00000009 0x00000003 0x00000003
1139 0x00000002 0x00000002 0x00000002 0x00000004
1140 0x00000003 0x00000008 0x0000000b 0x0000004d
1141 0x00000000 0x00000003 0x00000003 0x00000003
1142 0x00000008 0x00000001 0x0000000a 0x00000004
1143 0x00000003 0x00000008 0x00000004 0x00000006
1144 0x00000002 0x00000068 0x00000000 0x00000003
1145 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1146 0x00070000 0x00000000 0x00000000 0x00000003
1147 0x00000000 0x00000000 0x00000000 0x00000000>;
1152 compatible = "nvidia,tegra20-emc-table";
1153 clock-frequency = <50000>;
1154 nvidia,emc-registers = <0x00000003 0x00000007
1155 0x00000003 0x00000003 0x00000006 0x00000004
1156 0x00000002 0x00000009 0x00000003 0x00000003
1157 0x00000002 0x00000002 0x00000002 0x00000005
1158 0x00000003 0x00000008 0x0000000b 0x0000009f
1159 0x00000000 0x00000003 0x00000003 0x00000003
1160 0x00000008 0x00000001 0x0000000a 0x00000007
1161 0x00000003 0x00000008 0x00000004 0x00000006
1162 0x00000002 0x000000d0 0x00000000 0x00000000
1163 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1164 0x00070000 0x00000000 0x00000000 0x00000005
1165 0x00000000 0x00000000 0x00000000 0x00000000>;
1170 compatible = "nvidia,tegra20-emc-table";
1171 clock-frequency = <75000>;
1172 nvidia,emc-registers = <0x00000005 0x0000000a
1173 0x00000004 0x00000003 0x00000006 0x00000004
1174 0x00000002 0x00000009 0x00000003 0x00000003
1175 0x00000002 0x00000002 0x00000002 0x00000005
1176 0x00000003 0x00000008 0x0000000b 0x000000ff
1177 0x00000000 0x00000003 0x00000003 0x00000003
1178 0x00000008 0x00000001 0x0000000a 0x0000000b
1179 0x00000003 0x00000008 0x00000004 0x00000006
1180 0x00000002 0x00000138 0x00000000 0x00000000
1181 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1182 0x00070000 0x00000000 0x00000000 0x00000007
1183 0x00000000 0x00000000 0x00000000 0x00000000>;
1188 compatible = "nvidia,tegra20-emc-table";
1189 clock-frequency = <150000>;
1190 nvidia,emc-registers = <0x00000009 0x00000014
1191 0x00000007 0x00000003 0x00000006 0x00000004
1192 0x00000002 0x00000009 0x00000003 0x00000003
1193 0x00000002 0x00000002 0x00000002 0x00000005
1194 0x00000003 0x00000008 0x0000000b 0x0000021f
1195 0x00000000 0x00000003 0x00000003 0x00000003
1196 0x00000008 0x00000001 0x0000000a 0x00000015
1197 0x00000003 0x00000008 0x00000004 0x00000006
1198 0x00000002 0x00000270 0x00000000 0x00000001
1199 0x00000000 0x00000000 0x00000282 0xa07c04ae
1200 0x007dd510 0x00000000 0x00000000 0x0000000e
1201 0x00000000 0x00000000 0x00000000 0x00000000>;
1206 compatible = "nvidia,tegra20-emc-table";
1207 clock-frequency = <300000>;
1208 nvidia,emc-registers = <0x00000012 0x00000027
1209 0x0000000d 0x00000006 0x00000007 0x00000005
1210 0x00000003 0x00000009 0x00000006 0x00000006
1211 0x00000003 0x00000003 0x00000002 0x00000006
1212 0x00000003 0x00000009 0x0000000c 0x0000045f
1213 0x00000000 0x00000004 0x00000004 0x00000006
1214 0x00000008 0x00000001 0x0000000e 0x0000002a
1215 0x00000003 0x0000000f 0x00000007 0x00000005
1216 0x00000002 0x000004e1 0x00000005 0x00000002
1217 0x00000000 0x00000000 0x00000282 0xe059048b
1218 0x007e1510 0x00000000 0x00000000 0x0000001b
1219 0x00000000 0x00000000 0x00000000 0x00000000>;
1224 nvidia,ram-code = <1>; /* elpida-4gb */
1227 #address-cells = <1>;
1232 compatible = "nvidia,tegra20-emc-table";
1233 clock-frequency = <25000>;
1234 nvidia,emc-registers = <0x00000002 0x00000006
1235 0x00000003 0x00000003 0x00000006 0x00000004
1236 0x00000002 0x00000009 0x00000003 0x00000003
1237 0x00000002 0x00000002 0x00000002 0x00000004
1238 0x00000003 0x00000008 0x0000000b 0x0000004d
1239 0x00000000 0x00000003 0x00000003 0x00000003
1240 0x00000008 0x00000001 0x0000000a 0x00000004
1241 0x00000003 0x00000008 0x00000004 0x00000006
1242 0x00000002 0x00000068 0x00000000 0x00000003
1243 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1244 0x0007c000 0x00000000 0x00000000 0x00000003
1245 0x00000000 0x00000000 0x00000000 0x00000000>;
1250 compatible = "nvidia,tegra20-emc-table";
1251 clock-frequency = <50000>;
1252 nvidia,emc-registers = <0x00000003 0x00000007
1253 0x00000003 0x00000003 0x00000006 0x00000004
1254 0x00000002 0x00000009 0x00000003 0x00000003
1255 0x00000002 0x00000002 0x00000002 0x00000005
1256 0x00000003 0x00000008 0x0000000b 0x0000009f
1257 0x00000000 0x00000003 0x00000003 0x00000003
1258 0x00000008 0x00000001 0x0000000a 0x00000007
1259 0x00000003 0x00000008 0x00000004 0x00000006
1260 0x00000002 0x000000d0 0x00000000 0x00000000
1261 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1262 0x0007c000 0x00000000 0x00000000 0x00000005
1263 0x00000000 0x00000000 0x00000000 0x00000000>;
1268 compatible = "nvidia,tegra20-emc-table";
1269 clock-frequency = <75000>;
1270 nvidia,emc-registers = <0x00000005 0x0000000a
1271 0x00000004 0x00000003 0x00000006 0x00000004
1272 0x00000002 0x00000009 0x00000003 0x00000003
1273 0x00000002 0x00000002 0x00000002 0x00000005
1274 0x00000003 0x00000008 0x0000000b 0x000000ff
1275 0x00000000 0x00000003 0x00000003 0x00000003
1276 0x00000008 0x00000001 0x0000000a 0x0000000b
1277 0x00000003 0x00000008 0x00000004 0x00000006
1278 0x00000002 0x00000138 0x00000000 0x00000000
1279 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1280 0x0007c000 0x00000000 0x00000000 0x00000007
1281 0x00000000 0x00000000 0x00000000 0x00000000>;
1286 compatible = "nvidia,tegra20-emc-table";
1287 clock-frequency = <150000>;
1288 nvidia,emc-registers = <0x00000009 0x00000014
1289 0x00000007 0x00000003 0x00000006 0x00000004
1290 0x00000002 0x00000009 0x00000003 0x00000003
1291 0x00000002 0x00000002 0x00000002 0x00000005
1292 0x00000003 0x00000008 0x0000000b 0x0000021f
1293 0x00000000 0x00000003 0x00000003 0x00000003
1294 0x00000008 0x00000001 0x0000000a 0x00000015
1295 0x00000003 0x00000008 0x00000004 0x00000006
1296 0x00000002 0x00000270 0x00000000 0x00000001
1297 0x00000000 0x00000000 0x00000282 0xa07c04ae
1298 0x007e4010 0x00000000 0x00000000 0x0000000e
1299 0x00000000 0x00000000 0x00000000 0x00000000>;
1304 compatible = "nvidia,tegra20-emc-table";
1305 clock-frequency = <300000>;
1306 nvidia,emc-registers = <0x00000012 0x00000027
1307 0x0000000d 0x00000006 0x00000007 0x00000005
1308 0x00000003 0x00000009 0x00000006 0x00000006
1309 0x00000003 0x00000003 0x00000002 0x00000006
1310 0x00000003 0x00000009 0x0000000c 0x0000045f
1311 0x00000000 0x00000004 0x00000004 0x00000006
1312 0x00000008 0x00000001 0x0000000e 0x0000002a
1313 0x00000003 0x0000000f 0x00000007 0x00000005
1314 0x00000002 0x000004e1 0x00000005 0x00000002
1315 0x00000000 0x00000000 0x00000282 0xe059048b
1316 0x007e0010 0x00000000 0x00000000 0x0000001b
1317 0x00000000 0x00000000 0x00000000 0x00000000>;
1322 nvidia,ram-code = <2>; /* hynix-8gb */
1325 #address-cells = <1>;
1330 compatible = "nvidia,tegra20-emc-table";
1331 clock-frequency = <25000>;
1332 nvidia,emc-registers = <0x00000002 0x00000006
1333 0x00000003 0x00000003 0x00000006 0x00000004
1334 0x00000002 0x00000009 0x00000003 0x00000003
1335 0x00000002 0x00000002 0x00000002 0x00000004
1336 0x00000003 0x00000008 0x0000000b 0x0000004d
1337 0x00000000 0x00000003 0x00000003 0x00000003
1338 0x00000008 0x00000001 0x0000000a 0x00000004
1339 0x00000003 0x00000008 0x00000004 0x00000006
1340 0x00000002 0x00000068 0x00000000 0x00000003
1341 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1342 0x00070000 0x00000000 0x00000000 0x00000003
1343 0x00000000 0x00000000 0x00000000 0x00000000>;
1348 compatible = "nvidia,tegra20-emc-table";
1349 clock-frequency = <50000>;
1350 nvidia,emc-registers = <0x00000003 0x00000007
1351 0x00000003 0x00000003 0x00000006 0x00000004
1352 0x00000002 0x00000009 0x00000003 0x00000003
1353 0x00000002 0x00000002 0x00000002 0x00000005
1354 0x00000003 0x00000008 0x0000000b 0x0000009f
1355 0x00000000 0x00000003 0x00000003 0x00000003
1356 0x00000008 0x00000001 0x0000000a 0x00000007
1357 0x00000003 0x00000008 0x00000004 0x00000006
1358 0x00000002 0x000000d0 0x00000000 0x00000000
1359 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1360 0x00070000 0x00000000 0x00000000 0x00000005
1361 0x00000000 0x00000000 0x00000000 0x00000000>;
1366 compatible = "nvidia,tegra20-emc-table";
1367 clock-frequency = <75000>;
1368 nvidia,emc-registers = <0x00000005 0x0000000a
1369 0x00000004 0x00000003 0x00000006 0x00000004
1370 0x00000002 0x00000009 0x00000003 0x00000003
1371 0x00000002 0x00000002 0x00000002 0x00000005
1372 0x00000003 0x00000008 0x0000000b 0x000000ff
1373 0x00000000 0x00000003 0x00000003 0x00000003
1374 0x00000008 0x00000001 0x0000000a 0x0000000b
1375 0x00000003 0x00000008 0x00000004 0x00000006
1376 0x00000002 0x00000138 0x00000000 0x00000000
1377 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1378 0x00070000 0x00000000 0x00000000 0x00000007
1379 0x00000000 0x00000000 0x00000000 0x00000000>;
1384 compatible = "nvidia,tegra20-emc-table";
1385 clock-frequency = <150000>;
1386 nvidia,emc-registers = <0x00000009 0x00000014
1387 0x00000007 0x00000003 0x00000006 0x00000004
1388 0x00000002 0x00000009 0x00000003 0x00000003
1389 0x00000002 0x00000002 0x00000002 0x00000005
1390 0x00000003 0x00000008 0x0000000b 0x0000021f
1391 0x00000000 0x00000003 0x00000003 0x00000003
1392 0x00000008 0x00000001 0x0000000a 0x00000015
1393 0x00000003 0x00000008 0x00000004 0x00000006
1394 0x00000002 0x00000270 0x00000000 0x00000001
1395 0x00000000 0x00000000 0x00000282 0xa07c04ae
1396 0x007dd010 0x00000000 0x00000000 0x0000000e
1397 0x00000000 0x00000000 0x00000000 0x00000000>;
1402 compatible = "nvidia,tegra20-emc-table";
1403 clock-frequency = <300000>;
1404 nvidia,emc-registers = <0x00000012 0x00000027
1405 0x0000000d 0x00000006 0x00000007 0x00000005
1406 0x00000003 0x00000009 0x00000006 0x00000006
1407 0x00000003 0x00000003 0x00000002 0x00000006
1408 0x00000003 0x00000009 0x0000000c 0x0000045f
1409 0x00000000 0x00000004 0x00000004 0x00000006
1410 0x00000008 0x00000001 0x0000000e 0x0000002a
1411 0x00000003 0x0000000f 0x00000007 0x00000005
1412 0x00000002 0x000004e1 0x00000005 0x00000002
1413 0x00000000 0x00000000 0x00000282 0xe059048b
1414 0x007e2010 0x00000000 0x00000000 0x0000001b
1415 0x00000000 0x00000000 0x00000000 0x00000000>;
1420 nvidia,ram-code = <3>; /* hynix-4gb */
1423 #address-cells = <1>;
1428 compatible = "nvidia,tegra20-emc-table";
1429 clock-frequency = <25000>;
1430 nvidia,emc-registers = <0x00000002 0x00000006
1431 0x00000003 0x00000003 0x00000006 0x00000004
1432 0x00000002 0x00000009 0x00000003 0x00000003
1433 0x00000002 0x00000002 0x00000002 0x00000004
1434 0x00000003 0x00000008 0x0000000b 0x0000004d
1435 0x00000000 0x00000003 0x00000003 0x00000003
1436 0x00000008 0x00000001 0x0000000a 0x00000004
1437 0x00000003 0x00000008 0x00000004 0x00000006
1438 0x00000002 0x00000068 0x00000000 0x00000003
1439 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1440 0x0007c000 0x00000000 0x00000000 0x00000003
1441 0x00000000 0x00000000 0x00000000 0x00000000>;
1446 compatible = "nvidia,tegra20-emc-table";
1447 clock-frequency = <50000>;
1448 nvidia,emc-registers = <0x00000003 0x00000007
1449 0x00000003 0x00000003 0x00000006 0x00000004
1450 0x00000002 0x00000009 0x00000003 0x00000003
1451 0x00000002 0x00000002 0x00000002 0x00000005
1452 0x00000003 0x00000008 0x0000000b 0x0000009f
1453 0x00000000 0x00000003 0x00000003 0x00000003
1454 0x00000008 0x00000001 0x0000000a 0x00000007
1455 0x00000003 0x00000008 0x00000004 0x00000006
1456 0x00000002 0x000000d0 0x00000000 0x00000000
1457 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1458 0x0007c000 0x00078000 0x00000000 0x00000005
1459 0x00000000 0x00000000 0x00000000 0x00000000>;
1464 compatible = "nvidia,tegra20-emc-table";
1465 clock-frequency = <75000>;
1466 nvidia,emc-registers = <0x00000005 0x0000000a
1467 0x00000004 0x00000003 0x00000006 0x00000004
1468 0x00000002 0x00000009 0x00000003 0x00000003
1469 0x00000002 0x00000002 0x00000002 0x00000005
1470 0x00000003 0x00000008 0x0000000b 0x000000ff
1471 0x00000000 0x00000003 0x00000003 0x00000003
1472 0x00000008 0x00000001 0x0000000a 0x0000000b
1473 0x00000003 0x00000008 0x00000004 0x00000006
1474 0x00000002 0x00000138 0x00000000 0x00000000
1475 0x00000000 0x00000000 0x00000282 0xa0ae04ae
1476 0x0007c000 0x00000000 0x00000000 0x00000007
1477 0x00000000 0x00000000 0x00000000 0x00000000>;
1482 compatible = "nvidia,tegra20-emc-table";
1483 clock-frequency = <150000>;
1484 nvidia,emc-registers = <0x00000009 0x00000014
1485 0x00000007 0x00000003 0x00000006 0x00000004
1486 0x00000002 0x00000009 0x00000003 0x00000003
1487 0x00000002 0x00000002 0x00000002 0x00000005
1488 0x00000003 0x00000008 0x0000000b 0x0000021f
1489 0x00000000 0x00000003 0x00000003 0x00000003
1490 0x00000008 0x00000001 0x0000000a 0x00000015
1491 0x00000003 0x00000008 0x00000004 0x00000006
1492 0x00000002 0x00000270 0x00000000 0x00000001
1493 0x00000000 0x00000000 0x00000282 0xa07c04ae
1494 0x007e4010 0x00000000 0x00000000 0x0000000e
1495 0x00000000 0x00000000 0x00000000 0x00000000>;
1500 compatible = "nvidia,tegra20-emc-table";
1501 clock-frequency = <300000>;
1502 nvidia,emc-registers = <0x00000012 0x00000027
1503 0x0000000d 0x00000006 0x00000007 0x00000005
1504 0x00000003 0x00000009 0x00000006 0x00000006
1505 0x00000003 0x00000003 0x00000002 0x00000006
1506 0x00000003 0x00000009 0x0000000c 0x0000045f
1507 0x00000000 0x00000004 0x00000004 0x00000006
1508 0x00000008 0x00000001 0x0000000e 0x0000002a
1509 0x00000003 0x0000000f 0x00000007 0x00000005
1510 0x00000002 0x000004e1 0x00000005 0x00000002
1511 0x00000000 0x00000000 0x00000282 0xe059048b
1512 0x007e0010 0x00000000 0x00000000 0x0000001b
1513 0x00000000 0x00000000 0x00000000 0x00000000>;
1519 &emc_icc_dvfs_opp_table {
1520 /delete-node/ opp-666000000;
1521 /delete-node/ opp-760000000;