arch/arm/boot/dts/sama5d4.dtsi

   1 /*
   2  * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
   3  *
   4  *  Copyright (C) 2014 Atmel,
   5  *                2014 Nicolas Ferre <nicolas.ferre@atmel.com>
   6  *
   7  * This file is dual-licensed: you can use it either under the terms
   8  * of the GPL or the X11 license, at your option. Note that this dual
   9  * licensing only applies to this file, and not this project as a
  10  * whole.
  11  *
  12  *  a) This file is free software; you can redistribute it and/or
  13  *     modify it under the terms of the GNU General Public License as
  14  *     published by the Free Software Foundation; either version 2 of the
  15  *     License, or (at your option) any later version.
  16  *
  17  *     This file is distributed in the hope that it will be useful,
  18  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *     GNU General Public License for more details.
  21  *
  22  * Or, alternatively,
  23  *
  24  *  b) Permission is hereby granted, free of charge, to any person
  25  *     obtaining a copy of this software and associated documentation
  26  *     files (the "Software"), to deal in the Software without
  27  *     restriction, including without limitation the rights to use,
  28  *     copy, modify, merge, publish, distribute, sublicense, and/or
  29  *     sell copies of the Software, and to permit persons to whom the
  30  *     Software is furnished to do so, subject to the following
  31  *     conditions:
  32  *
  33  *     The above copyright notice and this permission notice shall be
  34  *     included in all copies or substantial portions of the Software.
  35  *
  36  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  37  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  38  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  39  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  40  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  41  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  42  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  43  *     OTHER DEALINGS IN THE SOFTWARE.
  44  */
  45
  46 #include "skeleton.dtsi"
  47 #include <dt-bindings/clock/at91.h>
  48 #include <dt-bindings/dma/at91.h>
  49 #include <dt-bindings/pinctrl/at91.h>
  50 #include <dt-bindings/interrupt-controller/irq.h>
  51 #include <dt-bindings/gpio/gpio.h>
  52
  53 / {
  54         model = "Atmel SAMA5D4 family SoC";
  55         compatible = "atmel,sama5d4";
  56         interrupt-parent = <&aic>;
  57
  58         aliases {
  59                 serial0 = &usart3;
  60                 serial1 = &usart4;
  61                 serial2 = &usart2;
  62                 serial3 = &usart0;
  63                 serial4 = &usart1;
  64                 serial5 = &uart0;
  65                 serial6 = &uart1;
  66                 gpio0 = &pioA;
  67                 gpio1 = &pioB;
  68                 gpio2 = &pioC;
  69                 gpio3 = &pioD;
  70                 gpio4 = &pioE;
  71                 pwm0 = &pwm0;
  72                 ssc0 = &ssc0;
  73                 ssc1 = &ssc1;
  74                 tcb0 = &tcb0;
  75                 tcb1 = &tcb1;
  76                 i2c0 = &i2c0;
  77                 i2c1 = &i2c1;
  78                 i2c2 = &i2c2;
  79         };
  80         cpus {
  81                 #address-cells = <1>;
  82                 #size-cells = <0>;
  83
  84                 cpu@0 {
  85                         device_type = "cpu";
  86                         compatible = "arm,cortex-a5";
  87                         reg = <0>;
  88                         next-level-cache = <&L2>;
  89                 };
  90         };
  91
  92         memory {
  93                 reg = <0x20000000 0x20000000>;
  94         };
  95
  96         clocks {
  97                 slow_xtal: slow_xtal {
  98                         compatible = "fixed-clock";
  99                         #clock-cells = <0>;
 100                         clock-frequency = <0>;
 101                 };
 102
 103                 main_xtal: main_xtal {
 104                         compatible = "fixed-clock";
 105                         #clock-cells = <0>;
 106                         clock-frequency = <0>;
 107                 };
 108
 109                 adc_op_clk: adc_op_clk{
 110                         compatible = "fixed-clock";
 111                         #clock-cells = <0>;
 112                         clock-frequency = <1000000>;
 113                 };
 114         };
 115
 116         ns_sram: sram@00210000 {
 117                 compatible = "mmio-sram";
 118                 reg = <0x00210000 0x10000>;
 119         };
 120
 121         ahb {
 122                 compatible = "simple-bus";
 123                 #address-cells = <1>;
 124                 #size-cells = <1>;
 125                 ranges;
 126
 127                 nfc_sram: sram@100000 {
 128                         compatible = "mmio-sram";
 129                         no-memory-wc;
 130                         reg = <0x100000 0x2400>;
 131                 };
 132
 133                 usb0: gadget@00400000 {
 134                         #address-cells = <1>;
 135                         #size-cells = <0>;
 136                         compatible = "atmel,sama5d3-udc";
 137                         reg = <0x00400000 0x100000
 138                                0xfc02c000 0x4000>;
 139                         interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
 140                         clocks = <&udphs_clk>, <&utmi>;
 141                         clock-names = "pclk", "hclk";
 142                         status = "disabled";
 143
 144                         ep@0 {
 145                                 reg = <0>;
 146                                 atmel,fifo-size = <64>;
 147                                 atmel,nb-banks = <1>;
 148                         };
 149
 150                         ep@1 {
 151                                 reg = <1>;
 152                                 atmel,fifo-size = <1024>;
 153                                 atmel,nb-banks = <3>;
 154                                 atmel,can-dma;
 155                                 atmel,can-isoc;
 156                         };
 157
 158                         ep@2 {
 159                                 reg = <2>;
 160                                 atmel,fifo-size = <1024>;
 161                                 atmel,nb-banks = <3>;
 162                                 atmel,can-dma;
 163                                 atmel,can-isoc;
 164                         };
 165
 166                         ep@3 {
 167                                 reg = <3>;
 168                                 atmel,fifo-size = <1024>;
 169                                 atmel,nb-banks = <2>;
 170                                 atmel,can-dma;
 171                                 atmel,can-isoc;
 172                         };
 173
 174                         ep@4 {
 175                                 reg = <4>;
 176                                 atmel,fifo-size = <1024>;
 177                                 atmel,nb-banks = <2>;
 178                                 atmel,can-dma;
 179                                 atmel,can-isoc;
 180                         };
 181
 182                         ep@5 {
 183                                 reg = <5>;
 184                                 atmel,fifo-size = <1024>;
 185                                 atmel,nb-banks = <2>;
 186                                 atmel,can-dma;
 187                                 atmel,can-isoc;
 188                         };
 189
 190                         ep@6 {
 191                                 reg = <6>;
 192                                 atmel,fifo-size = <1024>;
 193                                 atmel,nb-banks = <2>;
 194                                 atmel,can-dma;
 195                                 atmel,can-isoc;
 196                         };
 197
 198                         ep@7 {
 199                                 reg = <7>;
 200                                 atmel,fifo-size = <1024>;
 201                                 atmel,nb-banks = <2>;
 202                                 atmel,can-dma;
 203                                 atmel,can-isoc;
 204                         };
 205
 206                         ep@8 {
 207                                 reg = <8>;
 208                                 atmel,fifo-size = <1024>;
 209                                 atmel,nb-banks = <2>;
 210                                 atmel,can-isoc;
 211                         };
 212
 213                         ep@9 {
 214                                 reg = <9>;
 215                                 atmel,fifo-size = <1024>;
 216                                 atmel,nb-banks = <2>;
 217                                 atmel,can-isoc;
 218                         };
 219
 220                         ep@10 {
 221                                 reg = <10>;
 222                                 atmel,fifo-size = <1024>;
 223                                 atmel,nb-banks = <2>;
 224                                 atmel,can-isoc;
 225                         };
 226
 227                         ep@11 {
 228                                 reg = <11>;
 229                                 atmel,fifo-size = <1024>;
 230                                 atmel,nb-banks = <2>;
 231                                 atmel,can-isoc;
 232                         };
 233
 234                         ep@12 {
 235                                 reg = <12>;
 236                                 atmel,fifo-size = <1024>;
 237                                 atmel,nb-banks = <2>;
 238                                 atmel,can-isoc;
 239                         };
 240
 241                         ep@13 {
 242                                 reg = <13>;
 243                                 atmel,fifo-size = <1024>;
 244                                 atmel,nb-banks = <2>;
 245                                 atmel,can-isoc;
 246                         };
 247
 248                         ep@14 {
 249                                 reg = <14>;
 250                                 atmel,fifo-size = <1024>;
 251                                 atmel,nb-banks = <2>;
 252                                 atmel,can-isoc;
 253                         };
 254
 255                         ep@15 {
 256                                 reg = <15>;
 257                                 atmel,fifo-size = <1024>;
 258                                 atmel,nb-banks = <2>;
 259                                 atmel,can-isoc;
 260                         };
 261                 };
 262
 263                 usb1: ohci@00500000 {
 264                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 265                         reg = <0x00500000 0x100000>;
 266                         interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
 267                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
 268                         clock-names = "ohci_clk", "hclk", "uhpck";
 269                         status = "disabled";
 270                 };
 271
 272                 usb2: ehci@00600000 {
 273                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 274                         reg = <0x00600000 0x100000>;
 275                         interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
 276                         clocks = <&utmi>, <&uhphs_clk>;
 277                         clock-names = "usb_clk", "ehci_clk";
 278                         status = "disabled";
 279                 };
 280
 281                 L2: cache-controller@00a00000 {
 282                         compatible = "arm,pl310-cache";
 283                         reg = <0x00a00000 0x1000>;
 284                         interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
 285                         cache-unified;
 286                         cache-level = <2>;
 287                 };
 288
 289                 ebi: ebi@10000000 {
 290                         compatible = "atmel,sama5d3-ebi";
 291                         #address-cells = <2>;
 292                         #size-cells = <1>;
 293                         atmel,smc = <&hsmc>;
 294                         reg = <0x10000000 0x10000000
 295                                0x60000000 0x28000000>;
 296                         ranges = <0x0 0x0 0x10000000 0x10000000
 297                                   0x1 0x0 0x60000000 0x10000000
 298                                   0x2 0x0 0x70000000 0x10000000
 299                                   0x3 0x0 0x80000000 0x8000000>;
 300                         clocks = <&mck>;
 301                         status = "disabled";
 302
 303                         nand_controller: nand-controller {
 304                                 compatible = "atmel,sama5d3-nand-controller";
 305                                 atmel,nfc-sram = <&nfc_sram>;
 306                                 atmel,nfc-io = <&nfc_io>;
 307                                 ecc-engine = <&pmecc>;
 308                                 #address-cells = <2>;
 309                                 #size-cells = <1>;
 310                                 ranges;
 311                                 status = "disabled";
 312                         };
 313                 };
 314
 315                 nand0: nand@80000000 {
 316                         compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand";
 317                         #address-cells = <1>;
 318                         #size-cells = <1>;
 319                         ranges;
 320                         reg = < 0x80000000 0x08000000   /* EBI CS3 */
 321                                 0xfc05c070 0x00000490   /* SMC PMECC regs */
 322                                 0xfc05c500 0x00000100   /* SMC PMECC Error Location regs */
 323                                 >;
 324                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
 325                         atmel,nand-addr-offset = <21>;
 326                         atmel,nand-cmd-offset = <22>;
 327                         atmel,nand-has-dma;
 328                         pinctrl-names = "default";
 329                         pinctrl-0 = <&pinctrl_nand>;
 330                         status = "disabled";
 331
 332                         nfc@90000000 {
 333                                 compatible = "atmel,sama5d3-nfc";
 334                                 #address-cells = <1>;
 335                                 #size-cells = <1>;
 336                                 reg = <
 337                                         0x90000000 0x08000000   /* NFC Command Registers */
 338                                         0xfc05c000 0x00000070   /* NFC HSMC regs */
 339                                         0x00100000 0x00100000   /* NFC SRAM banks */
 340                                          >;
 341                                 clocks = <&hsmc_clk>;
 342                                 atmel,write-by-sram;
 343                         };
 344                 };
 345
 346                 nfc_io: nfc-io@90000000 {
 347                         compatible = "atmel,sama5d3-nfc-io", "syscon";
 348                         reg = <0x90000000 0x8000000>;
 349                 };
 350
 351                 apb {
 352                         compatible = "simple-bus";
 353                         #address-cells = <1>;
 354                         #size-cells = <1>;
 355                         ranges;
 356
 357                         hlcdc: hlcdc@f0000000 {
 358                                 compatible = "atmel,sama5d4-hlcdc";
 359                                 reg = <0xf0000000 0x4000>;
 360                                 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
 361                                 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
 362                                 clock-names = "periph_clk","sys_clk", "slow_clk";
 363                                 status = "disabled";
 364
 365                                 hlcdc-display-controller {
 366                                         compatible = "atmel,hlcdc-display-controller";
 367                                         #address-cells = <1>;
 368                                         #size-cells = <0>;
 369
 370                                         port@0 {
 371                                                 #address-cells = <1>;
 372                                                 #size-cells = <0>;
 373                                                 reg = <0>;
 374                                         };
 375                                 };
 376
 377                                 hlcdc_pwm: hlcdc-pwm {
 378                                         compatible = "atmel,hlcdc-pwm";
 379                                         pinctrl-names = "default";
 380                                         pinctrl-0 = <&pinctrl_lcd_pwm>;
 381                                         #pwm-cells = <3>;
 382                                 };
 383                         };
 384
 385                         dma1: dma-controller@f0004000 {
 386                                 compatible = "atmel,sama5d4-dma";
 387                                 reg = <0xf0004000 0x200>;
 388                                 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
 389                                 #dma-cells = <1>;
 390                                 clocks = <&dma1_clk>;
 391                                 clock-names = "dma_clk";
 392                         };
 393
 394                         isi: isi@f0008000 {
 395                                 compatible = "atmel,at91sam9g45-isi";
 396                                 reg = <0xf0008000 0x4000>;
 397                                 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
 398                                 pinctrl-names = "default";
 399                                 pinctrl-0 = <&pinctrl_isi_data_0_7>;
 400                                 clocks = <&isi_clk>;
 401                                 clock-names = "isi_clk";
 402                                 status = "disabled";
 403                                 port {
 404                                         #address-cells = <1>;
 405                                         #size-cells = <0>;
 406                                 };
 407                         };
 408
 409                         ramc0: ramc@f0010000 {
 410                                 compatible = "atmel,sama5d3-ddramc";
 411                                 reg = <0xf0010000 0x200>;
 412                                 clocks = <&ddrck>, <&mpddr_clk>;
 413                                 clock-names = "ddrck", "mpddr";
 414                         };
 415
 416                         dma0: dma-controller@f0014000 {
 417                                 compatible = "atmel,sama5d4-dma";
 418                                 reg = <0xf0014000 0x200>;
 419                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
 420                                 #dma-cells = <1>;
 421                                 clocks = <&dma0_clk>;
 422                                 clock-names = "dma_clk";
 423                         };
 424
 425                         pmc: pmc@f0018000 {
 426                                 compatible = "atmel,sama5d3-pmc", "syscon";
 427                                 reg = <0xf0018000 0x120>;
 428                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 429                                 interrupt-controller;
 430                                 #address-cells = <1>;
 431                                 #size-cells = <0>;
 432                                 #interrupt-cells = <1>;
 433
 434                                 main_rc_osc: main_rc_osc {
 435                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 436                                         #clock-cells = <0>;
 437                                         interrupt-parent = <&pmc>;
 438                                         interrupts = <AT91_PMC_MOSCRCS>;
 439                                         clock-frequency = <12000000>;
 440                                         clock-accuracy = <100000000>;
 441                                 };
 442
 443                                 main_osc: main_osc {
 444                                         compatible = "atmel,at91rm9200-clk-main-osc";
 445                                         #clock-cells = <0>;
 446                                         interrupt-parent = <&pmc>;
 447                                         interrupts = <AT91_PMC_MOSCS>;
 448                                         clocks = <&main_xtal>;
 449                                 };
 450
 451                                 main: mainck {
 452                                         compatible = "atmel,at91sam9x5-clk-main";
 453                                         #clock-cells = <0>;
 454                                         interrupt-parent = <&pmc>;
 455                                         interrupts = <AT91_PMC_MOSCSELS>;
 456                                         clocks = <&main_rc_osc &main_osc>;
 457                                 };
 458
 459                                 plla: pllack {
 460                                         compatible = "atmel,sama5d3-clk-pll";
 461                                         #clock-cells = <0>;
 462                                         interrupt-parent = <&pmc>;
 463                                         interrupts = <AT91_PMC_LOCKA>;
 464                                         clocks = <&main>;
 465                                         reg = <0>;
 466                                         atmel,clk-input-range = <12000000 12000000>;
 467                                         #atmel,pll-clk-output-range-cells = <4>;
 468                                         atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
 469                                 };
 470
 471                                 plladiv: plladivck {
 472                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 473                                         #clock-cells = <0>;
 474                                         clocks = <&plla>;
 475                                 };
 476
 477                                 utmi: utmick {
 478                                         compatible = "atmel,at91sam9x5-clk-utmi";
 479                                         #clock-cells = <0>;
 480                                         interrupt-parent = <&pmc>;
 481                                         interrupts = <AT91_PMC_LOCKU>;
 482                                         clocks = <&main>;
 483                                 };
 484
 485                                 mck: masterck {
 486                                         compatible = "atmel,at91sam9x5-clk-master";
 487                                         #clock-cells = <0>;
 488                                         interrupt-parent = <&pmc>;
 489                                         interrupts = <AT91_PMC_MCKRDY>;
 490                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 491                                         atmel,clk-output-range = <125000000 200000000>;
 492                                         atmel,clk-divisors = <1 2 4 3>;
 493                                 };
 494
 495                                 h32ck: h32mxck {
 496                                         #clock-cells = <0>;
 497                                         compatible = "atmel,sama5d4-clk-h32mx";
 498                                         clocks = <&mck>;
 499                                 };
 500
 501                                 usb: usbck {
 502                                         compatible = "atmel,at91sam9x5-clk-usb";
 503                                         #clock-cells = <0>;
 504                                         clocks = <&plladiv>, <&utmi>;
 505                                 };
 506
 507                                 prog: progck {
 508                                         compatible = "atmel,at91sam9x5-clk-programmable";
 509                                         #address-cells = <1>;
 510                                         #size-cells = <0>;
 511                                         interrupt-parent = <&pmc>;
 512                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 513
 514                                         prog0: prog0 {
 515                                                 #clock-cells = <0>;
 516                                                 reg = <0>;
 517                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 518                                         };
 519
 520                                         prog1: prog1 {
 521                                                 #clock-cells = <0>;
 522                                                 reg = <1>;
 523                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 524                                         };
 525
 526                                         prog2: prog2 {
 527                                                 #clock-cells = <0>;
 528                                                 reg = <2>;
 529                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
 530                                         };
 531                                 };
 532
 533                                 smd: smdclk {
 534                                         compatible = "atmel,at91sam9x5-clk-smd";
 535                                         #clock-cells = <0>;
 536                                         clocks = <&plladiv>, <&utmi>;
 537                                 };
 538
 539                                 systemck {
 540                                         compatible = "atmel,at91rm9200-clk-system";
 541                                         #address-cells = <1>;
 542                                         #size-cells = <0>;
 543
 544                                         ddrck: ddrck {
 545                                                 #clock-cells = <0>;
 546                                                 reg = <2>;
 547                                                 clocks = <&mck>;
 548                                         };
 549
 550                                         lcdck: lcdck {
 551                                                 #clock-cells = <0>;
 552                                                 reg = <3>;
 553                                                 clocks = <&mck>;
 554                                         };
 555
 556                                         smdck: smdck {
 557                                                 #clock-cells = <0>;
 558                                                 reg = <4>;
 559                                                 clocks = <&smd>;
 560                                         };
 561
 562                                         uhpck: uhpck {
 563                                                 #clock-cells = <0>;
 564                                                 reg = <6>;
 565                                                 clocks = <&usb>;
 566                                         };
 567
 568                                         udpck: udpck {
 569                                                 #clock-cells = <0>;
 570                                                 reg = <7>;
 571                                                 clocks = <&usb>;
 572                                         };
 573
 574                                         pck0: pck0 {
 575                                                 #clock-cells = <0>;
 576                                                 reg = <8>;
 577                                                 clocks = <&prog0>;
 578                                         };
 579
 580                                         pck1: pck1 {
 581                                                 #clock-cells = <0>;
 582                                                 reg = <9>;
 583                                                 clocks = <&prog1>;
 584                                         };
 585
 586                                         pck2: pck2 {
 587                                                 #clock-cells = <0>;
 588                                                 reg = <10>;
 589                                                 clocks = <&prog2>;
 590                                         };
 591                                 };
 592
 593                                 periph32ck {
 594                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 595                                         #address-cells = <1>;
 596                                         #size-cells = <0>;
 597                                         clocks = <&h32ck>;
 598
 599                                         pioD_clk: pioD_clk {
 600                                                 #clock-cells = <0>;
 601                                                 reg = <5>;
 602                                         };
 603
 604                                         usart0_clk: usart0_clk {
 605                                                 #clock-cells = <0>;
 606                                                 reg = <6>;
 607                                         };
 608
 609                                         usart1_clk: usart1_clk {
 610                                                 #clock-cells = <0>;
 611                                                 reg = <7>;
 612                                         };
 613
 614                                         icm_clk: icm_clk {
 615                                                 #clock-cells = <0>;
 616                                                 reg = <9>;
 617                                         };
 618
 619                                         aes_clk: aes_clk {
 620                                                 #clock-cells = <0>;
 621                                                 reg = <12>;
 622                                         };
 623
 624                                         tdes_clk: tdes_clk {
 625                                                 #clock-cells = <0>;
 626                                                 reg = <14>;
 627                                         };
 628
 629                                         sha_clk: sha_clk {
 630                                                 #clock-cells = <0>;
 631                                                 reg = <15>;
 632                                         };
 633
 634                                         matrix1_clk: matrix1_clk {
 635                                                 #clock-cells = <0>;
 636                                                 reg = <17>;
 637                                         };
 638
 639                                         hsmc_clk: hsmc_clk {
 640                                                 #clock-cells = <0>;
 641                                                 reg = <22>;
 642                                         };
 643
 644                                         pioA_clk: pioA_clk {
 645                                                 #clock-cells = <0>;
 646                                                 reg = <23>;
 647                                         };
 648
 649                                         pioB_clk: pioB_clk {
 650                                                 #clock-cells = <0>;
 651                                                 reg = <24>;
 652                                         };
 653
 654                                         pioC_clk: pioC_clk {
 655                                                 #clock-cells = <0>;
 656                                                 reg = <25>;
 657                                         };
 658
 659                                         pioE_clk: pioE_clk {
 660                                                 #clock-cells = <0>;
 661                                                 reg = <26>;
 662                                         };
 663
 664                                         uart0_clk: uart0_clk {
 665                                                 #clock-cells = <0>;
 666                                                 reg = <27>;
 667                                         };
 668
 669                                         uart1_clk: uart1_clk {
 670                                                 #clock-cells = <0>;
 671                                                 reg = <28>;
 672                                         };
 673
 674                                         usart2_clk: usart2_clk {
 675                                                 #clock-cells = <0>;
 676                                                 reg = <29>;
 677                                         };
 678
 679                                         usart3_clk: usart3_clk {
 680                                                 #clock-cells = <0>;
 681                                                 reg = <30>;
 682                                         };
 683
 684                                         usart4_clk: usart4_clk {
 685                                                 #clock-cells = <0>;
 686                                                 reg = <31>;
 687                                         };
 688
 689                                         twi0_clk: twi0_clk {
 690                                                 reg = <32>;
 691                                                 #clock-cells = <0>;
 692                                         };
 693
 694                                         twi1_clk: twi1_clk {
 695                                                 #clock-cells = <0>;
 696                                                 reg = <33>;
 697                                         };
 698
 699                                         twi2_clk: twi2_clk {
 700                                                 #clock-cells = <0>;
 701                                                 reg = <34>;
 702                                         };
 703
 704                                         mci0_clk: mci0_clk {
 705                                                 #clock-cells = <0>;
 706                                                 reg = <35>;
 707                                         };
 708
 709                                         mci1_clk: mci1_clk {
 710                                                 #clock-cells = <0>;
 711                                                 reg = <36>;
 712                                         };
 713
 714                                         spi0_clk: spi0_clk {
 715                                                 #clock-cells = <0>;
 716                                                 reg = <37>;
 717                                         };
 718
 719                                         spi1_clk: spi1_clk {
 720                                                 #clock-cells = <0>;
 721                                                 reg = <38>;
 722                                         };
 723
 724                                         spi2_clk: spi2_clk {
 725                                                 #clock-cells = <0>;
 726                                                 reg = <39>;
 727                                         };
 728
 729                                         tcb0_clk: tcb0_clk {
 730                                                 #clock-cells = <0>;
 731                                                 reg = <40>;
 732                                         };
 733
 734                                         tcb1_clk: tcb1_clk {
 735                                                 #clock-cells = <0>;
 736                                                 reg = <41>;
 737                                         };
 738
 739                                         tcb2_clk: tcb2_clk {
 740                                                 #clock-cells = <0>;
 741                                                 reg = <42>;
 742                                         };
 743
 744                                         pwm_clk: pwm_clk {
 745                                                 #clock-cells = <0>;
 746                                                 reg = <43>;
 747                                         };
 748
 749                                         adc_clk: adc_clk {
 750                                                 #clock-cells = <0>;
 751                                                 reg = <44>;
 752                                         };
 753
 754                                         dbgu_clk: dbgu_clk {
 755                                                 #clock-cells = <0>;
 756                                                 reg = <45>;
 757                                         };
 758
 759                                         uhphs_clk: uhphs_clk {
 760                                                 #clock-cells = <0>;
 761                                                 reg = <46>;
 762                                         };
 763
 764                                         udphs_clk: udphs_clk {
 765                                                 #clock-cells = <0>;
 766                                                 reg = <47>;
 767                                         };
 768
 769                                         ssc0_clk: ssc0_clk {
 770                                                 #clock-cells = <0>;
 771                                                 reg = <48>;
 772                                         };
 773
 774                                         ssc1_clk: ssc1_clk {
 775                                                 #clock-cells = <0>;
 776                                                 reg = <49>;
 777                                         };
 778
 779                                         trng_clk: trng_clk {
 780                                                 #clock-cells = <0>;
 781                                                 reg = <53>;
 782                                         };
 783
 784                                         macb0_clk: macb0_clk {
 785                                                 #clock-cells = <0>;
 786                                                 reg = <54>;
 787                                         };
 788
 789                                         macb1_clk: macb1_clk {
 790                                                 #clock-cells = <0>;
 791                                                 reg = <55>;
 792                                         };
 793
 794                                         fuse_clk: fuse_clk {
 795                                                 #clock-cells = <0>;
 796                                                 reg = <57>;
 797                                         };
 798
 799                                         securam_clk: securam_clk {
 800                                                 #clock-cells = <0>;
 801                                                 reg = <59>;
 802                                         };
 803
 804                                         smd_clk: smd_clk {
 805                                                 #clock-cells = <0>;
 806                                                 reg = <61>;
 807                                         };
 808
 809                                         twi3_clk: twi3_clk {
 810                                                 #clock-cells = <0>;
 811                                                 reg = <62>;
 812                                         };
 813
 814                                         catb_clk: catb_clk {
 815                                                 #clock-cells = <0>;
 816                                                 reg = <63>;
 817                                         };
 818                                 };
 819
 820                                 periph64ck {
 821                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 822                                         #address-cells = <1>;
 823                                         #size-cells = <0>;
 824                                         clocks = <&mck>;
 825
 826                                         dma0_clk: dma0_clk {
 827                                                 #clock-cells = <0>;
 828                                                 reg = <8>;
 829                                         };
 830
 831                                         cpkcc_clk: cpkcc_clk {
 832                                                 #clock-cells = <0>;
 833                                                 reg = <10>;
 834                                         };
 835
 836                                         aesb_clk: aesb_clk {
 837                                                 #clock-cells = <0>;
 838                                                 reg = <13>;
 839                                         };
 840
 841                                         mpddr_clk: mpddr_clk {
 842                                                 #clock-cells = <0>;
 843                                                 reg = <16>;
 844                                         };
 845
 846                                         matrix0_clk: matrix0_clk {
 847                                                 #clock-cells = <0>;
 848                                                 reg = <18>;
 849                                         };
 850
 851                                         vdec_clk: vdec_clk {
 852                                                 #clock-cells = <0>;
 853                                                 reg = <19>;
 854                                         };
 855
 856                                         dma1_clk: dma1_clk {
 857                                                 #clock-cells = <0>;
 858                                                 reg = <50>;
 859                                         };
 860
 861                                         lcdc_clk: lcdc_clk {
 862                                                 #clock-cells = <0>;
 863                                                 reg = <51>;
 864                                         };
 865
 866                                         isi_clk: isi_clk {
 867                                                 #clock-cells = <0>;
 868                                                 reg = <52>;
 869                                         };
 870                                 };
 871                         };
 872
 873                         mmc0: mmc@f8000000 {
 874                                 compatible = "atmel,hsmci";
 875                                 reg = <0xf8000000 0x600>;
 876                                 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
 877                                 dmas = <&dma1
 878                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 879                                         | AT91_XDMAC_DT_PERID(0))>;
 880                                 dma-names = "rxtx";
 881                                 pinctrl-names = "default";
 882                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
 883                                 status = "disabled";
 884                                 #address-cells = <1>;
 885                                 #size-cells = <0>;
 886                                 clocks = <&mci0_clk>;
 887                                 clock-names = "mci_clk";
 888                         };
 889
 890                         uart0: serial@f8004000 {
 891                                 compatible = "atmel,at91sam9260-usart";
 892                                 reg = <0xf8004000 0x100>;
 893                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
 894                                 dmas = <&dma0
 895                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 896                                         | AT91_XDMAC_DT_PERID(22))>,
 897                                        <&dma0
 898                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 899                                         | AT91_XDMAC_DT_PERID(23))>;
 900                                 dma-names = "tx", "rx";
 901                                 pinctrl-names = "default";
 902                                 pinctrl-0 = <&pinctrl_uart0>;
 903                                 clocks = <&uart0_clk>;
 904                                 clock-names = "usart";
 905                                 status = "disabled";
 906                         };
 907
 908                         ssc0: ssc@f8008000 {
 909                                 compatible = "atmel,at91sam9g45-ssc";
 910                                 reg = <0xf8008000 0x4000>;
 911                                 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
 912                                 pinctrl-names = "default";
 913                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 914                                 dmas = <&dma1
 915                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 916                                         | AT91_XDMAC_DT_PERID(26))>,
 917                                        <&dma1
 918                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 919                                         | AT91_XDMAC_DT_PERID(27))>;
 920                                 dma-names = "tx", "rx";
 921                                 clocks = <&ssc0_clk>;
 922                                 clock-names = "pclk";
 923                                 status = "disabled";
 924                         };
 925
 926                         pwm0: pwm@f800c000 {
 927                                 compatible = "atmel,sama5d3-pwm";
 928                                 reg = <0xf800c000 0x300>;
 929                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
 930                                 #pwm-cells = <3>;
 931                                 clocks = <&pwm_clk>;
 932                                 status = "disabled";
 933                         };
 934
 935                         spi0: spi@f8010000 {
 936                                 #address-cells = <1>;
 937                                 #size-cells = <0>;
 938                                 compatible = "atmel,at91rm9200-spi";
 939                                 reg = <0xf8010000 0x100>;
 940                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
 941                                 dmas = <&dma1
 942                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 943                                         | AT91_XDMAC_DT_PERID(10))>,
 944                                        <&dma1
 945                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 946                                         | AT91_XDMAC_DT_PERID(11))>;
 947                                 dma-names = "tx", "rx";
 948                                 pinctrl-names = "default";
 949                                 pinctrl-0 = <&pinctrl_spi0>;
 950                                 clocks = <&spi0_clk>;
 951                                 clock-names = "spi_clk";
 952                                 status = "disabled";
 953                         };
 954
 955                         i2c0: i2c@f8014000 {
 956                                 compatible = "atmel,sama5d4-i2c";
 957                                 reg = <0xf8014000 0x4000>;
 958                                 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
 959                                 dmas = <&dma1
 960                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 961                                         | AT91_XDMAC_DT_PERID(2))>,
 962                                        <&dma1
 963                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 964                                         | AT91_XDMAC_DT_PERID(3))>;
 965                                 dma-names = "tx", "rx";
 966                                 pinctrl-names = "default";
 967                                 pinctrl-0 = <&pinctrl_i2c0>;
 968                                 #address-cells = <1>;
 969                                 #size-cells = <0>;
 970                                 clocks = <&twi0_clk>;
 971                                 status = "disabled";
 972                         };
 973
 974                         i2c1: i2c@f8018000 {
 975                                 compatible = "atmel,sama5d4-i2c";
 976                                 reg = <0xf8018000 0x4000>;
 977                                 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
 978                                 dmas = <&dma0
 979                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 980                                         | AT91_XDMAC_DT_PERID(4))>,
 981                                        <&dma0
 982                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 983                                         | AT91_XDMAC_DT_PERID(5))>;
 984                                 dma-names = "tx", "rx";
 985                                 pinctrl-names = "default";
 986                                 pinctrl-0 = <&pinctrl_i2c1>;
 987                                 #address-cells = <1>;
 988                                 #size-cells = <0>;
 989                                 clocks = <&twi1_clk>;
 990                                 status = "disabled";
 991                         };
 992
 993                         tcb0: timer@f801c000 {
 994                                 compatible = "atmel,at91sam9x5-tcb";
 995                                 reg = <0xf801c000 0x100>;
 996                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
 997                                 clocks = <&tcb0_clk>, <&clk32k>;
 998                                 clock-names = "t0_clk", "slow_clk";
 999                         };
1000
1001                         macb0: ethernet@f8020000 {
1002                                 compatible = "atmel,sama5d4-gem";
1003                                 reg = <0xf8020000 0x100>;
1004                                 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
1005                                 pinctrl-names = "default";
1006                                 pinctrl-0 = <&pinctrl_macb0_rmii>;
1007                                 #address-cells = <1>;
1008                                 #size-cells = <0>;
1009                                 clocks = <&macb0_clk>, <&macb0_clk>;
1010                                 clock-names = "hclk", "pclk";
1011                                 status = "disabled";
1012                         };
1013
1014                         i2c2: i2c@f8024000 {
1015                                 compatible = "atmel,sama5d4-i2c";
1016                                 reg = <0xf8024000 0x4000>;
1017                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
1018                                 dmas = <&dma1
1019                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1020                                         | AT91_XDMAC_DT_PERID(6))>,
1021                                        <&dma1
1022                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1023                                         | AT91_XDMAC_DT_PERID(7))>;
1024                                 dma-names = "tx", "rx";
1025                                 pinctrl-names = "default";
1026                                 pinctrl-0 = <&pinctrl_i2c2>;
1027                                 #address-cells = <1>;
1028                                 #size-cells = <0>;
1029                                 clocks = <&twi2_clk>;
1030                                 status = "disabled";
1031                         };
1032
1033                         sfr: sfr@f8028000 {
1034                                 compatible = "atmel,sama5d4-sfr", "syscon";
1035                                 reg = <0xf8028000 0x60>;
1036                         };
1037
1038                         usart0: serial@f802c000 {
1039                                 compatible = "atmel,at91sam9260-usart";
1040                                 reg = <0xf802c000 0x100>;
1041                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
1042                                 dmas = <&dma0
1043                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1044                                         | AT91_XDMAC_DT_PERID(36))>,
1045                                        <&dma0
1046                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1047                                         | AT91_XDMAC_DT_PERID(37))>;
1048                                 dma-names = "tx", "rx";
1049                                 pinctrl-names = "default";
1050                                 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
1051                                 clocks = <&usart0_clk>;
1052                                 clock-names = "usart";
1053                                 status = "disabled";
1054                         };
1055
1056                         usart1: serial@f8030000 {
1057                                 compatible = "atmel,at91sam9260-usart";
1058                                 reg = <0xf8030000 0x100>;
1059                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
1060                                 dmas = <&dma0
1061                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1062                                         | AT91_XDMAC_DT_PERID(38))>,
1063                                        <&dma0
1064                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1065                                         | AT91_XDMAC_DT_PERID(39))>;
1066                                 dma-names = "tx", "rx";
1067                                 pinctrl-names = "default";
1068                                 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
1069                                 clocks = <&usart1_clk>;
1070                                 clock-names = "usart";
1071                                 status = "disabled";
1072                         };
1073
1074                         mmc1: mmc@fc000000 {
1075                                 compatible = "atmel,hsmci";
1076                                 reg = <0xfc000000 0x600>;
1077                                 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
1078                                 dmas = <&dma1
1079                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1080                                         | AT91_XDMAC_DT_PERID(1))>;
1081                                 dma-names = "rxtx";
1082                                 pinctrl-names = "default";
1083                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
1084                                 status = "disabled";
1085                                 #address-cells = <1>;
1086                                 #size-cells = <0>;
1087                                 clocks = <&mci1_clk>;
1088                                 clock-names = "mci_clk";
1089                         };
1090
1091                         uart1: serial@fc004000 {
1092                                 compatible = "atmel,at91sam9260-usart";
1093                                 reg = <0xfc004000 0x100>;
1094                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
1095                                 dmas = <&dma0
1096                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1097                                         | AT91_XDMAC_DT_PERID(24))>,
1098                                        <&dma0
1099                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1100                                         | AT91_XDMAC_DT_PERID(25))>;
1101                                 dma-names = "tx", "rx";
1102                                 pinctrl-names = "default";
1103                                 pinctrl-0 = <&pinctrl_uart1>;
1104                                 clocks = <&uart1_clk>;
1105                                 clock-names = "usart";
1106                                 status = "disabled";
1107                         };
1108
1109                         usart2: serial@fc008000 {
1110                                 compatible = "atmel,at91sam9260-usart";
1111                                 reg = <0xfc008000 0x100>;
1112                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
1113                                 dmas = <&dma1
1114                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1115                                         | AT91_XDMAC_DT_PERID(16))>,
1116                                        <&dma1
1117                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1118                                         | AT91_XDMAC_DT_PERID(17))>;
1119                                 dma-names = "tx", "rx";
1120                                 pinctrl-names = "default";
1121                                 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
1122                                 clocks = <&usart2_clk>;
1123                                 clock-names = "usart";
1124                                 status = "disabled";
1125                         };
1126
1127                         usart3: serial@fc00c000 {
1128                                 compatible = "atmel,at91sam9260-usart";
1129                                 reg = <0xfc00c000 0x100>;
1130                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
1131                                 dmas = <&dma1
1132                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1133                                         | AT91_XDMAC_DT_PERID(18))>,
1134                                        <&dma1
1135                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1136                                         | AT91_XDMAC_DT_PERID(19))>;
1137                                 dma-names = "tx", "rx";
1138                                 pinctrl-names = "default";
1139                                 pinctrl-0 = <&pinctrl_usart3>;
1140                                 clocks = <&usart3_clk>;
1141                                 clock-names = "usart";
1142                                 status = "disabled";
1143                         };
1144
1145                         usart4: serial@fc010000 {
1146                                 compatible = "atmel,at91sam9260-usart";
1147                                 reg = <0xfc010000 0x100>;
1148                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
1149                                 dmas = <&dma1
1150                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1151                                         | AT91_XDMAC_DT_PERID(20))>,
1152                                        <&dma1
1153                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1154                                         | AT91_XDMAC_DT_PERID(21))>;
1155                                 dma-names = "tx", "rx";
1156                                 pinctrl-names = "default";
1157                                 pinctrl-0 = <&pinctrl_usart4>;
1158                                 clocks = <&usart4_clk>;
1159                                 clock-names = "usart";
1160                                 status = "disabled";
1161                         };
1162
1163                         ssc1: ssc@fc014000 {
1164                                 compatible = "atmel,at91sam9g45-ssc";
1165                                 reg = <0xfc014000 0x4000>;
1166                                 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
1167                                 pinctrl-names = "default";
1168                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
1169                                 dmas = <&dma1
1170                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1171                                         | AT91_XDMAC_DT_PERID(28))>,
1172                                        <&dma1
1173                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1174                                         | AT91_XDMAC_DT_PERID(29))>;
1175                                 dma-names = "tx", "rx";
1176                                 clocks = <&ssc1_clk>;
1177                                 clock-names = "pclk";
1178                                 status = "disabled";
1179                         };
1180
1181                         spi1: spi@fc018000 {
1182                                 #address-cells = <1>;
1183                                 #size-cells = <0>;
1184                                 compatible = "atmel,at91rm9200-spi";
1185                                 reg = <0xfc018000 0x100>;
1186                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>;
1187                                 dmas = <&dma1
1188                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1189                                         | AT91_XDMAC_DT_PERID(12))>,
1190                                        <&dma1
1191                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1192                                         | AT91_XDMAC_DT_PERID(13))>;
1193                                 dma-names = "tx", "rx";
1194                                 pinctrl-names = "default";
1195                                 pinctrl-0 = <&pinctrl_spi1>;
1196                                 clocks = <&spi1_clk>;
1197                                 clock-names = "spi_clk";
1198                                 status = "disabled";
1199                         };
1200
1201                         spi2: spi@fc01c000 {
1202                                 #address-cells = <1>;
1203                                 #size-cells = <0>;
1204                                 compatible = "atmel,at91rm9200-spi";
1205                                 reg = <0xfc01c000 0x100>;
1206                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
1207                                 dmas = <&dma0
1208                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1209                                         | AT91_XDMAC_DT_PERID(14))>,
1210                                        <&dma0
1211                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1212                                         | AT91_XDMAC_DT_PERID(15))>;
1213                                 dma-names = "tx", "rx";
1214                                 pinctrl-names = "default";
1215                                 pinctrl-0 = <&pinctrl_spi2>;
1216                                 clocks = <&spi2_clk>;
1217                                 clock-names = "spi_clk";
1218                                 status = "disabled";
1219                         };
1220
1221                         tcb1: timer@fc020000 {
1222                                 compatible = "atmel,at91sam9x5-tcb";
1223                                 reg = <0xfc020000 0x100>;
1224                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
1225                                 clocks = <&tcb1_clk>, <&clk32k>;
1226                                 clock-names = "t0_clk", "slow_clk";
1227                         };
1228
1229                         macb1: ethernet@fc028000 {
1230                                 compatible = "atmel,sama5d4-gem";
1231                                 reg = <0xfc028000 0x100>;
1232                                 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
1233                                 pinctrl-names = "default";
1234                                 pinctrl-0 = <&pinctrl_macb1_rmii>;
1235                                 #address-cells = <1>;
1236                                 #size-cells = <0>;
1237                                 clocks = <&macb1_clk>, <&macb1_clk>;
1238                                 clock-names = "hclk", "pclk";
1239                                 status = "disabled";
1240                         };
1241
1242                         trng@fc030000 {
1243                                 compatible = "atmel,at91sam9g45-trng";
1244                                 reg = <0xfc030000 0x100>;
1245                                 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
1246                                 clocks = <&trng_clk>;
1247                         };
1248
1249                         adc0: adc@fc034000 {
1250                                 compatible = "atmel,at91sam9x5-adc";
1251                                 reg = <0xfc034000 0x100>;
1252                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
1253                                 clocks = <&adc_clk>,
1254                                          <&adc_op_clk>;
1255                                 clock-names = "adc_clk", "adc_op_clk";
1256                                 atmel,adc-channels-used = <0x01f>;
1257                                 atmel,adc-startup-time = <40>;
1258                                 atmel,adc-use-external-triggers;
1259                                 atmel,adc-vref = <3000>;
1260                                 atmel,adc-res = <8 10>;
1261                                 atmel,adc-sample-hold-time = <11>;
1262                                 atmel,adc-res-names = "lowres", "highres";
1263                                 atmel,adc-ts-pressure-threshold = <10000>;
1264                                 status = "disabled";
1265
1266                                 trigger0 {
1267                                         trigger-name = "external-rising";
1268                                         trigger-value = <0x1>;
1269                                         trigger-external;
1270                                 };
1271                                 trigger1 {
1272                                         trigger-name = "external-falling";
1273                                         trigger-value = <0x2>;
1274                                         trigger-external;
1275                                 };
1276                                 trigger2 {
1277                                         trigger-name = "external-any";
1278                                         trigger-value = <0x3>;
1279                                         trigger-external;
1280                                 };
1281                                 trigger3 {
1282                                         trigger-name = "continuous";
1283                                         trigger-value = <0x6>;
1284                                 };
1285                         };
1286
1287                         aes@fc044000 {
1288                                 compatible = "atmel,at91sam9g46-aes";
1289                                 reg = <0xfc044000 0x100>;
1290                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
1291                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1292                                         | AT91_XDMAC_DT_PERID(41))>,
1293                                        <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1294                                         | AT91_XDMAC_DT_PERID(40))>;
1295                                 dma-names = "tx", "rx";
1296                                 clocks = <&aes_clk>;
1297                                 clock-names = "aes_clk";
1298                                 status = "okay";
1299                         };
1300
1301                         tdes@fc04c000 {
1302                                 compatible = "atmel,at91sam9g46-tdes";
1303                                 reg = <0xfc04c000 0x100>;
1304                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
1305                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1306                                         | AT91_XDMAC_DT_PERID(42))>,
1307                                        <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1308                                         | AT91_XDMAC_DT_PERID(43))>;
1309                                 dma-names = "tx", "rx";
1310                                 clocks = <&tdes_clk>;
1311                                 clock-names = "tdes_clk";
1312                                 status = "okay";
1313                         };
1314
1315                         sha@fc050000 {
1316                                 compatible = "atmel,at91sam9g46-sha";
1317                                 reg = <0xfc050000 0x100>;
1318                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
1319                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1320                                         | AT91_XDMAC_DT_PERID(44))>;
1321                                 dma-names = "tx";
1322                                 clocks = <&sha_clk>;
1323                                 clock-names = "sha_clk";
1324                                 status = "okay";
1325                         };
1326
1327                         hsmc: smc@fc05c000 {
1328                                 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
1329                                 reg = <0xfc05c000 0x1000>;
1330                                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
1331                                 clocks = <&hsmc_clk>;
1332                                 #address-cells = <1>;
1333                                 #size-cells = <1>;
1334                                 ranges;
1335
1336                                 pmecc: ecc-engine@ffffc070 {
1337                                         compatible = "atmel,sama5d4-pmecc";
1338                                         reg = <0xfc05c070 0x490>,
1339                                               <0xfc05c500 0x100>;
1340                                 };
1341                         };
1342
1343                         rstc@fc068600 {
1344                                 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1345                                 reg = <0xfc068600 0x10>;
1346                                 clocks = <&clk32k>;
1347                         };
1348
1349                         shdwc@fc068610 {
1350                                 compatible = "atmel,at91sam9x5-shdwc";
1351                                 reg = <0xfc068610 0x10>;
1352                                 clocks = <&clk32k>;
1353                         };
1354
1355                         pit: timer@fc068630 {
1356                                 compatible = "atmel,at91sam9260-pit";
1357                                 reg = <0xfc068630 0x10>;
1358                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1359                                 clocks = <&h32ck>;
1360                         };
1361
1362                         watchdog@fc068640 {
1363                                 compatible = "atmel,sama5d4-wdt";
1364                                 reg = <0xfc068640 0x10>;
1365                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1366                                 clocks = <&clk32k>;
1367                                 status = "disabled";
1368                         };
1369
1370                         clk32k: sckc@fc068650 {
1371                                 compatible = "atmel,sama5d4-sckc";
1372                                 reg = <0xfc068650 0x4>;
1373                                 #clock-cells = <0>;
1374                                 clocks = <&slow_xtal>;
1375                         };
1376
1377                         rtc@fc0686b0 {
1378                                 compatible = "atmel,at91rm9200-rtc";
1379                                 reg = <0xfc0686b0 0x30>;
1380                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1381                                 clocks = <&clk32k>;
1382                         };
1383
1384                         dbgu: serial@fc069000 {
1385                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
1386                                 reg = <0xfc069000 0x200>;
1387                                 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
1388                                 pinctrl-names = "default";
1389                                 pinctrl-0 = <&pinctrl_dbgu>;
1390                                 clocks = <&dbgu_clk>;
1391                                 clock-names = "usart";
1392                                 status = "disabled";
1393                         };
1394
1395
1396                         pinctrl@fc06a000 {
1397                                 #address-cells = <1>;
1398                                 #size-cells = <1>;
1399                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
1400                                 ranges = <0xfc068000 0xfc068000 0x100
1401                                           0xfc06a000 0xfc06a000 0x4000>;
1402                                 /* WARNING: revisit as pin spec has changed */
1403                                 atmel,mux-mask = <
1404                                         /*   A          B          C  */
1405                                         0xffffffff 0x3ffcfe7c 0x1c010101        /* pioA */
1406                                         0x7fffffff 0xfffccc3a 0x3f00cc3a        /* pioB */
1407                                         0xffffffff 0x3ff83fff 0xff00ffff        /* pioC */
1408                                         0x0003ff00 0x8002a800 0x00000000        /* pioD */
1409                                         0xffffffff 0x7fffffff 0x76fff1bf        /* pioE */
1410                                         >;
1411
1412                                 pioA: gpio@fc06a000 {
1413                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1414                                         reg = <0xfc06a000 0x100>;
1415                                         interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
1416                                         #gpio-cells = <2>;
1417                                         gpio-controller;
1418                                         interrupt-controller;
1419                                         #interrupt-cells = <2>;
1420                                         clocks = <&pioA_clk>;
1421                                 };
1422
1423                                 pioB: gpio@fc06b000 {
1424                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1425                                         reg = <0xfc06b000 0x100>;
1426                                         interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
1427                                         #gpio-cells = <2>;
1428                                         gpio-controller;
1429                                         interrupt-controller;
1430                                         #interrupt-cells = <2>;
1431                                         clocks = <&pioB_clk>;
1432                                 };
1433
1434                                 pioC: gpio@fc06c000 {
1435                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1436                                         reg = <0xfc06c000 0x100>;
1437                                         interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
1438                                         #gpio-cells = <2>;
1439                                         gpio-controller;
1440                                         interrupt-controller;
1441                                         #interrupt-cells = <2>;
1442                                         clocks = <&pioC_clk>;
1443                                 };
1444
1445                                 pioD: gpio@fc068000 {
1446                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1447                                         reg = <0xfc068000 0x100>;
1448                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
1449                                         #gpio-cells = <2>;
1450                                         gpio-controller;
1451                                         interrupt-controller;
1452                                         #interrupt-cells = <2>;
1453                                         clocks = <&pioD_clk>;
1454                                 };
1455
1456                                 pioE: gpio@fc06d000 {
1457                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1458                                         reg = <0xfc06d000 0x100>;
1459                                         interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
1460                                         #gpio-cells = <2>;
1461                                         gpio-controller;
1462                                         interrupt-controller;
1463                                         #interrupt-cells = <2>;
1464                                         clocks = <&pioE_clk>;
1465                                 };
1466
1467                                 /* pinctrl pin settings */
1468                                 adc0 {
1469                                         pinctrl_adc0_adtrg: adc0_adtrg {
1470                                                 atmel,pins =
1471                                                         <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
1472                                         };
1473                                         pinctrl_adc0_ad0: adc0_ad0 {
1474                                                 atmel,pins =
1475                                                         <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1476                                         };
1477                                         pinctrl_adc0_ad1: adc0_ad1 {
1478                                                 atmel,pins =
1479                                                         <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1480                                         };
1481                                         pinctrl_adc0_ad2: adc0_ad2 {
1482                                                 atmel,pins =
1483                                                         <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1484                                         };
1485                                         pinctrl_adc0_ad3: adc0_ad3 {
1486                                                 atmel,pins =
1487                                                         <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1488                                         };
1489                                         pinctrl_adc0_ad4: adc0_ad4 {
1490                                                 atmel,pins =
1491                                                         <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1492                                         };
1493                                 };
1494
1495                                 dbgu {
1496                                         pinctrl_dbgu: dbgu-0 {
1497                                                 atmel,pins =
1498                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* conflicts with D14 and TDI */
1499                                                          AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;         /* conflicts with D15 and TDO */
1500                                         };
1501                                 };
1502
1503                                 ebi {
1504                                         pinctrl_ebi_addr: ebi-addr-0 {
1505                                                 atmel,pins =
1506                                                         <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
1507                                                          AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
1508                                                          AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
1509                                                          AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
1510                                                          AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
1511                                                          AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
1512                                                          AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
1513                                                          AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
1514                                                          AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
1515                                                          AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
1516                                                          AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
1517                                                          AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
1518                                                          AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
1519                                                          AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
1520                                                          AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
1521                                                          AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
1522                                                          AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
1523                                                          AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
1524                                                          AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
1525                                                          AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
1526                                                          AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
1527                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
1528                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE
1529                                                          AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
1530                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
1531                                                          AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1532                                         };
1533
1534                                         pinctrl_ebi_nand_addr: ebi-addr-1 {
1535                                                 atmel,pins =
1536                                                         <AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
1537                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1538                                         };
1539
1540                                         pinctrl_ebi_cs0: ebi-cs0-0 {
1541                                                 atmel,pins =
1542                                                         <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1543                                         };
1544
1545                                         pinctrl_ebi_cs1: ebi-cs1-0 {
1546                                                 atmel,pins =
1547                                                         <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1548                                         };
1549
1550                                         pinctrl_ebi_cs2: ebi-cs2-0 {
1551                                                 atmel,pins =
1552                                                         <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1553                                         };
1554
1555                                         pinctrl_ebi_cs3: ebi-cs3-0 {
1556                                                 atmel,pins =
1557                                                         <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1558                                         };
1559
1560                                         pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
1561                                                 atmel,pins =
1562                                                         <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE
1563                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE
1564                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE
1565                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE
1566                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE
1567                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE
1568                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE
1569                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1570                                         };
1571
1572                                         pinctrl_ebi_data_8_15: ebi-data-msb-0 {
1573                                                 atmel,pins =
1574                                                         <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE
1575                                                          AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE
1576                                                          AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE
1577                                                          AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE
1578                                                          AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE
1579                                                          AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
1580                                                          AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
1581                                                          AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
1582                                         };
1583
1584                                         pinctrl_ebi_nandrdy: ebi-nandrdy-0 {
1585                                                 atmel,pins =
1586                                                         <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1587                                         };
1588
1589                                         pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 {
1590                                                 atmel,pins =
1591                                                         <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1592                                         };
1593
1594                                         pinctrl_ebi_nwait: ebi-nwait-0 {
1595                                                 atmel,pins =
1596                                                         <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1597                                         };
1598
1599                                         pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 {
1600                                                 atmel,pins =
1601                                                         <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1602                                         };
1603
1604                                         pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
1605                                                 atmel,pins =
1606                                                         <AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1607                                         };
1608                                 };
1609
1610                                 i2c0 {
1611                                         pinctrl_i2c0: i2c0-0 {
1612                                                 atmel,pins =
1613                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1614                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1615                                         };
1616                                 };
1617
1618                                 i2c1 {
1619                                         pinctrl_i2c1: i2c1-0 {
1620                                                 atmel,pins =
1621                                                         <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* TWD1, conflicts with UART0 RX and DIBP */
1622                                                          AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1623                                         };
1624                                 };
1625
1626                                 i2c2 {
1627                                         pinctrl_i2c2: i2c2-0 {
1628                                                 atmel,pins =
1629                                                         <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* TWD2, conflicts with RD0 and PWML1 */
1630                                                          AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1631                                         };
1632                                 };
1633
1634                                 isi {
1635                                         pinctrl_isi_data_0_7: isi-0-data-0-7 {
1636                                                 atmel,pins =
1637                                                         <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D0 */
1638                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D1 */
1639                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D2 */
1640                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D3 */
1641                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D4 */
1642                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D5 */
1643                                                          AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D6 */
1644                                                          AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D7 */
1645                                                          AT91_PIOB  1 AT91_PERIPH_C AT91_PINCTRL_NONE   /* ISI_PCK, conflict with G0_RXCK */
1646                                                          AT91_PIOB  3 AT91_PERIPH_C AT91_PINCTRL_NONE   /* ISI_VSYNC */
1647                                                          AT91_PIOB  4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */
1648                                         };
1649                                         pinctrl_isi_data_8_9: isi-0-data-8-9 {
1650                                                 atmel,pins =
1651                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE    /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */
1652                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */
1653                                         };
1654                                         pinctrl_isi_data_10_11: isi-0-data-10-11 {
1655                                                 atmel,pins =
1656                                                         <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE    /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */
1657                                                          AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */
1658                                         };
1659                                 };
1660
1661                                 lcd {
1662                                         pinctrl_lcd_base: lcd-base-0 {
1663                                                 atmel,pins =
1664                                                         <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDVSYNC */
1665                                                          AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDHSYNC */
1666                                                          AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDEN */
1667                                                          AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
1668                                         };
1669                                         pinctrl_lcd_pwm: lcd-pwm-0 {
1670                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;    /* LCDPWM */
1671                                         };
1672                                         pinctrl_lcd_rgb444: lcd-rgb-0 {
1673                                                 atmel,pins =
1674                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
1675                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1676                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1677                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1678                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1679                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1680                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1681                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1682                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
1683                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1684                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1685                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
1686                                         };
1687                                         pinctrl_lcd_rgb565: lcd-rgb-1 {
1688                                                 atmel,pins =
1689                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
1690                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1691                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1692                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1693                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1694                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1695                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1696                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1697                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
1698                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1699                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1700                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1701                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1702                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1703                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1704                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
1705                                         };
1706                                         pinctrl_lcd_rgb666: lcd-rgb-2 {
1707                                                 atmel,pins =
1708                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1709                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1710                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1711                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1712                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1713                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1714                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1715                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1716                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1717                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1718                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1719                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
1720                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
1721                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
1722                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
1723                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
1724                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
1725                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1726                                         };
1727                                         pinctrl_lcd_rgb777: lcd-rgb-3 {
1728                                                 atmel,pins =
1729                                                          /* LCDDAT0 conflicts with TMS */
1730                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1731                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1732                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1733                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1734                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1735                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1736                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1737                                                          /* LCDDAT8 conflicts with TCK */
1738                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1739                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1740                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1741                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1742                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1743                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1744                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
1745                                                          /* LCDDAT16 conflicts with NTRST */
1746                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
1747                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
1748                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
1749                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
1750                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
1751                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
1752                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1753                                         };
1754                                         pinctrl_lcd_rgb888: lcd-rgb-4 {
1755                                                 atmel,pins =
1756                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
1757                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1758                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1759                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1760                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1761                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1762                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1763                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1764                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
1765                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1766                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1767                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1768                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1769                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1770                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1771                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
1772                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD16 pin */
1773                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
1774                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
1775                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
1776                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
1777                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
1778                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
1779                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1780                                         };
1781                                 };
1782
1783                                 macb0 {
1784                                         pinctrl_macb0_rmii: macb0_rmii-0 {
1785                                                 atmel,pins =
1786                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TX0 */
1787                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TX1 */
1788                                                          AT91_PIOB  8 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RX0 */
1789                                                          AT91_PIOB  9 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RX1 */
1790                                                          AT91_PIOB  6 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RXDV */
1791                                                          AT91_PIOB  7 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RXER */
1792                                                          AT91_PIOB  2 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TXEN */
1793                                                          AT91_PIOB  0 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TXCK */
1794                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_MDC */
1795                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_MDIO */
1796                                                         >;
1797                                         };
1798                                 };
1799
1800                                 macb1 {
1801                                         pinctrl_macb1_rmii: macb1_rmii-0 {
1802                                                 atmel,pins =
1803                                                         <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TX0 */
1804                                                          AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TX1 */
1805                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RX0 */
1806                                                          AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RX1 */
1807                                                          AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RXDV */
1808                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RXER */
1809                                                          AT91_PIOA  4 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TXEN */
1810                                                          AT91_PIOA  2 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TXCK */
1811                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_MDC */
1812                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_MDIO */
1813                                                         >;
1814                                         };
1815                                 };
1816
1817                                 mmc0 {
1818                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1819                                                 atmel,pins =
1820                                                         <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1821                                                          AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
1822                                                          AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
1823                                                         >;
1824                                         };
1825                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1826                                                 atmel,pins =
1827                                                         <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
1828                                                          AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
1829                                                          AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
1830                                                         >;
1831                                         };
1832                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
1833                                                 atmel,pins =
1834                                                         <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA4, conflict with NAND_D5 */
1835                                                          AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA5, conflict with NAND_D6 */
1836                                                          AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA6, conflict with NAND_D7 */
1837                                                          AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA7, conflict with NAND_OE */
1838                                                         >;
1839                                         };
1840                                 };
1841
1842                                 mmc1 {
1843                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1844                                                 atmel,pins =
1845                                                         <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE           /* MCI1_CK */
1846                                                          AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_CDA */
1847                                                          AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA0 */
1848                                                         >;
1849                                         };
1850                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1851                                                 atmel,pins =
1852                                                         <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA1 */
1853                                                          AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA2 */
1854                                                          AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA3 */
1855                                                         >;
1856                                         };
1857                                 };
1858
1859                                 nand0 {
1860                                         pinctrl_nand: nand-0 {
1861                                                 atmel,pins =
1862                                                         <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC13 periph A Read Enable */
1863                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC14 periph A Write Enable */
1864
1865                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC17 ALE */
1866                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC18 CLE */
1867
1868                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC15 NCS3/Chip Enable */
1869                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC16 NANDRDY */
1870                                                          AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC5 Data bit 0 */
1871                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC6 Data bit 1 */
1872                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC7 Data bit 2 */
1873                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC8 Data bit 3 */
1874                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC9 Data bit 4 */
1875                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC10 Data bit 5 */
1876                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC11 periph A Data bit 6 */
1877                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1878                                         };
1879                                 };
1880
1881                                 spi0 {
1882                                         pinctrl_spi0: spi0-0 {
1883                                                 atmel,pins =
1884                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_MISO */
1885                                                          AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_MOSI */
1886                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_SPCK */
1887                                                         >;
1888                                         };
1889                                 };
1890
1891                                 ssc0 {
1892                                         pinctrl_ssc0_tx: ssc0_tx {
1893                                                 atmel,pins =
1894                                                         <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TK0 */
1895                                                          AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TF0 */
1896                                                          AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */
1897                                         };
1898
1899                                         pinctrl_ssc0_rx: ssc0_rx {
1900                                                 atmel,pins =
1901                                                         <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RK0 */
1902                                                          AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RF0 */
1903                                                          AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
1904                                         };
1905                                 };
1906
1907                                 ssc1 {
1908                                         pinctrl_ssc1_tx: ssc1_tx {
1909                                                 atmel,pins =
1910                                                         <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TK1 */
1911                                                          AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TF1 */
1912                                                          AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */
1913                                         };
1914
1915                                         pinctrl_ssc1_rx: ssc1_rx {
1916                                                 atmel,pins =
1917                                                         <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RK1 */
1918                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RF1 */
1919                                                          AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
1920                                         };
1921                                 };
1922
1923                                 spi1 {
1924                                         pinctrl_spi1: spi1-0 {
1925                                                 atmel,pins =
1926                                                         <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* SPI1_MISO */
1927                                                          AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* SPI1_MOSI */
1928                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* SPI1_SPCK */
1929                                                         >;
1930                                         };
1931                                 };
1932
1933                                 spi2 {
1934                                         pinctrl_spi2: spi2-0 {
1935                                                 atmel,pins =
1936                                                         <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* SPI2_MISO conflicts with RTS0 */
1937                                                          AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* SPI2_MOSI conflicts with TXD0 */
1938                                                          AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE   /* SPI2_SPCK conflicts with RTS1 */
1939                                                         >;
1940                                         };
1941                                 };
1942
1943                                 uart0 {
1944                                         pinctrl_uart0: uart0-0 {
1945                                                 atmel,pins =
1946                                                         <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_NONE           /* RXD */
1947                                                          AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* TXD */
1948                                                         >;
1949                                         };
1950                                 };
1951
1952                                 uart1 {
1953                                         pinctrl_uart1: uart1-0 {
1954                                                 atmel,pins =
1955                                                         <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_NONE           /* RXD */
1956                                                          AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* TXD */
1957                                                         >;
1958                                         };
1959                                 };
1960
1961                                 usart0 {
1962                                         pinctrl_usart0: usart0-0 {
1963                                                 atmel,pins =
1964                                                         <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE           /* RXD */
1965                                                          AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* TXD */
1966                                                         >;
1967                                         };
1968                                         pinctrl_usart0_rts: usart0_rts-0 {
1969                                                 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1970                                         };
1971                                         pinctrl_usart0_cts: usart0_cts-0 {
1972                                                 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1973                                         };
1974                                 };
1975
1976                                 usart1 {
1977                                         pinctrl_usart1: usart1-0 {
1978                                                 atmel,pins =
1979                                                         <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE           /* RXD */
1980                                                          AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* TXD */
1981                                                         >;
1982                                         };
1983                                         pinctrl_usart1_rts: usart1_rts-0 {
1984                                                 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1985                                         };
1986                                         pinctrl_usart1_cts: usart1_cts-0 {
1987                                                 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1988                                         };
1989                                 };
1990
1991                                 usart2 {
1992                                         pinctrl_usart2: usart2-0 {
1993                                                 atmel,pins =
1994                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE            /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1995                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP         /* TXD - conflicts with G0_COL, PCK2 */
1996                                                         >;
1997                                         };
1998                                         pinctrl_usart2_rts: usart2_rts-0 {
1999                                                 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;    /* conflicts with G0_RX3, PWMH1 */
2000                                         };
2001                                         pinctrl_usart2_cts: usart2_cts-0 {
2002                                                 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;     /* conflicts with G0_TXER, ISI_VSYNC */
2003                                         };
2004                                 };
2005
2006                                 usart3 {
2007                                         pinctrl_usart3: usart3-0 {
2008                                                 atmel,pins =
2009                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE           /* RXD */
2010                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* TXD */
2011                                                         >;
2012                                         };
2013                                 };
2014
2015                                 usart4 {
2016                                         pinctrl_usart4: usart4-0 {
2017                                                 atmel,pins =
2018                                                         <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE           /* RXD */
2019                                                          AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* TXD */
2020                                                         >;
2021                                         };
2022                                         pinctrl_usart4_rts: usart4_rts-0 {
2023                                                 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;    /* conflicts with NWAIT, A19 */
2024                                         };
2025                                         pinctrl_usart4_cts: usart4_cts-0 {
2026                                                 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>;     /* conflicts with A0/NBS0, MCI0_CDB */
2027                                         };
2028                                 };
2029                         };
2030
2031                         aic: interrupt-controller@fc06e000 {
2032                                 #interrupt-cells = <3>;
2033                                 compatible = "atmel,sama5d4-aic";
2034                                 interrupt-controller;
2035                                 reg = <0xfc06e000 0x200>;
2036                                 atmel,external-irqs = <56>;
2037                         };
2038                 };
2039         };
2040 };