2 * Device Tree Source for the Alt board
4 * Copyright (C) 2014 Renesas Electronics Corporation
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
12 #include "r8a7794.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "renesas,alt", "renesas,r8a7794";
28 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
29 stdout-path = "serial0:115200n8";
33 device_type = "memory";
34 reg = <0 0x40000000 0 0x40000000>;
37 d3_3v: regulator-d3-3v {
38 compatible = "regulator-fixed";
39 regulator-name = "D3.3V";
40 regulator-min-microvolt = <3300000>;
41 regulator-max-microvolt = <3300000>;
46 vcc_sdhi0: regulator-vcc-sdhi0 {
47 compatible = "regulator-fixed";
49 regulator-name = "SDHI0 Vcc";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
53 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
57 vccq_sdhi0: regulator-vccq-sdhi0 {
58 compatible = "regulator-gpio";
60 regulator-name = "SDHI0 VccQ";
61 regulator-min-microvolt = <1800000>;
62 regulator-max-microvolt = <3300000>;
64 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
70 vcc_sdhi1: regulator-vcc-sdhi1 {
71 compatible = "regulator-fixed";
73 regulator-name = "SDHI1 Vcc";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
77 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
81 vccq_sdhi1: regulator-vccq-sdhi1 {
82 compatible = "regulator-gpio";
84 regulator-name = "SDHI1 VccQ";
85 regulator-min-microvolt = <1800000>;
86 regulator-max-microvolt = <3300000>;
88 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
100 compatible = "adi,adv7123";
103 #address-cells = <1>;
108 adv7123_in: endpoint {
109 remote-endpoint = <&du_out_rgb1>;
114 adv7123_out: endpoint {
115 remote-endpoint = <&vga_in>;
122 compatible = "vga-connector";
126 remote-endpoint = <&adv7123_out>;
132 compatible = "fixed-clock";
134 clock-frequency = <74250000>;
138 compatible = "fixed-clock";
140 clock-frequency = <148500000>;
144 #address-cells = <1>;
146 compatible = "i2c-gpio";
148 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
149 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
153 #address-cells = <1>;
155 compatible = "i2c-gpio";
157 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
158 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
159 i2c-gpio,delay-us = <5>;
163 * A fallback to GPIO is provided for I2C1.
166 compatible = "i2c-demux-pinctrl";
167 i2c-parent = <&i2c1>, <&gpioi2c1>;
168 i2c-bus-name = "i2c-hdmi";
169 #address-cells = <1>;
173 compatible = "adi,adv7180";
180 remote-endpoint = <&vin0ep>;
186 compatible = "renesas,r1ex24002", "atmel,24c02";
193 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
194 * A fallback to GPIO is provided.
197 compatible = "i2c-demux-pinctrl";
198 i2c-parent = <&i2c4>, <&gpioi2c4>;
199 i2c-bus-name = "i2c-exio4";
200 #address-cells = <1>;
206 pinctrl-0 = <&du_pins>;
207 pinctrl-names = "default";
210 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
211 <&x13_clk>, <&x2_clk>;
212 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
217 remote-endpoint = <&adv7123_in>;
224 clock-frequency = <20000000>;
228 pinctrl-0 = <&scif_clk_pins>;
229 pinctrl-names = "default";
232 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
237 groups = "scif2_data";
241 scif_clk_pins: scif_clk {
243 function = "scif_clk";
247 groups = "eth_link", "eth_mdio", "eth_rmii";
252 groups = "intc_irq8";
267 groups = "vin0_data8", "vin0_clk";
271 mmcif0_pins: mmcif0 {
272 groups = "mmc_data8", "mmc_ctrl";
277 groups = "sdhi0_data4", "sdhi0_ctrl";
279 power-source = <3300>;
282 sdhi0_pins_uhs: sd0_uhs {
283 groups = "sdhi0_data4", "sdhi0_ctrl";
285 power-source = <1800>;
289 groups = "sdhi1_data4", "sdhi1_ctrl";
291 power-source = <3300>;
294 sdhi1_pins_uhs: sd1_uhs {
295 groups = "sdhi1_data4", "sdhi1_ctrl";
297 power-source = <1800>;
307 groups = "qspi_ctrl", "qspi_data4";
313 pinctrl-0 = <ðer_pins &phy1_pins>;
314 pinctrl-names = "default";
316 phy-handle = <&phy1>;
317 renesas,ether-link-active-low;
320 phy1: ethernet-phy@1 {
322 interrupt-parent = <&irqc0>;
323 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
324 micrel,led-mode = <1>;
329 pinctrl-0 = <&mmcif0_pins>;
330 pinctrl-names = "default";
332 vmmc-supply = <&d3_3v>;
333 vqmmc-supply = <&d3_3v>;
345 pinctrl-0 = <&sdhi0_pins>;
346 pinctrl-1 = <&sdhi0_pins_uhs>;
347 pinctrl-names = "default", "state_uhs";
349 vmmc-supply = <&vcc_sdhi0>;
350 vqmmc-supply = <&vccq_sdhi0>;
351 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
352 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
359 pinctrl-0 = <&sdhi1_pins>;
360 pinctrl-1 = <&sdhi1_pins_uhs>;
361 pinctrl-names = "default", "state_uhs";
363 vmmc-supply = <&vcc_sdhi1>;
364 vqmmc-supply = <&vccq_sdhi1>;
365 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
366 wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
372 pinctrl-0 = <&i2c1_pins>;
373 pinctrl-names = "i2c-hdmi";
375 clock-frequency = <400000>;
379 pinctrl-0 = <&i2c4_pins>;
380 pinctrl-names = "i2c-exio4";
385 pinctrl-0 = <&vin0_pins>;
386 pinctrl-names = "default";
390 remote-endpoint = <&adv7180>;
397 pinctrl-0 = <&scif2_pins>;
398 pinctrl-names = "default";
404 clock-frequency = <14745600>;
408 pinctrl-0 = <&qspi_pins>;
409 pinctrl-names = "default";
414 compatible = "spansion,s25fl512s", "jedec,spi-nor";
416 spi-max-frequency = <30000000>;
417 spi-tx-bus-width = <4>;
418 spi-rx-bus-width = <4>;
424 compatible = "fixed-partitions";
425 #address-cells = <1>;
430 reg = <0x00000000 0x00040000>;
435 reg = <0x00040000 0x00040000>;
440 reg = <0x00080000 0x03f80000>;