2 * Device Tree Source for the r8a7793 SoC
4 * Copyright (C) 2014-2015 Renesas Electronics Corporation
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/clock/r8a7793-clock.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/power/r8a7793-sysc.h>
17 compatible = "renesas,r8a7793";
18 interrupt-parent = <&gic>;
38 enable-method = "renesas,apmu";
42 compatible = "arm,cortex-a15";
44 clock-frequency = <1500000000>;
45 voltage-tolerance = <1>; /* 1% */
46 clocks = <&cpg_clocks R8A7793_CLK_Z>;
47 clock-latency = <300000>; /* 300 us */
48 power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
50 /* kHz - uV - OPPs unknown yet */
51 operating-points = <1500000 1000000>,
57 next-level-cache = <&L2_CA15>;
62 compatible = "arm,cortex-a15";
64 clock-frequency = <1500000000>;
65 power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
68 L2_CA15: cache-controller-0 {
70 power-domains = <&sysc R8A7793_PD_CA15_SCU>;
77 compatible = "renesas,r8a7793-apmu", "renesas,apmu";
78 reg = <0 0xe6152000 0 0x188>;
83 cpu_thermal: cpu-thermal {
84 polling-delay-passive = <0>;
87 thermal-sensors = <&thermal>;
91 temperature = <115000>;
101 gic: interrupt-controller@f1001000 {
102 compatible = "arm,gic-400";
103 #interrupt-cells = <3>;
104 #address-cells = <0>;
105 interrupt-controller;
106 reg = <0 0xf1001000 0 0x1000>,
107 <0 0xf1002000 0 0x2000>,
108 <0 0xf1004000 0 0x2000>,
109 <0 0xf1006000 0 0x2000>;
110 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
111 clocks = <&mstp4_clks R8A7793_CLK_INTC_SYS>;
113 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
116 gpio0: gpio@e6050000 {
117 compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
118 reg = <0 0xe6050000 0 0x50>;
119 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
122 gpio-ranges = <&pfc 0 0 32>;
123 #interrupt-cells = <2>;
124 interrupt-controller;
125 clocks = <&mstp9_clks R8A7793_CLK_GPIO0>;
126 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
129 gpio1: gpio@e6051000 {
130 compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
131 reg = <0 0xe6051000 0 0x50>;
132 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
135 gpio-ranges = <&pfc 0 32 26>;
136 #interrupt-cells = <2>;
137 interrupt-controller;
138 clocks = <&mstp9_clks R8A7793_CLK_GPIO1>;
139 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
142 gpio2: gpio@e6052000 {
143 compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
144 reg = <0 0xe6052000 0 0x50>;
145 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
148 gpio-ranges = <&pfc 0 64 32>;
149 #interrupt-cells = <2>;
150 interrupt-controller;
151 clocks = <&mstp9_clks R8A7793_CLK_GPIO2>;
152 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
155 gpio3: gpio@e6053000 {
156 compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
157 reg = <0 0xe6053000 0 0x50>;
158 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
161 gpio-ranges = <&pfc 0 96 32>;
162 #interrupt-cells = <2>;
163 interrupt-controller;
164 clocks = <&mstp9_clks R8A7793_CLK_GPIO3>;
165 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
168 gpio4: gpio@e6054000 {
169 compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
170 reg = <0 0xe6054000 0 0x50>;
171 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
174 gpio-ranges = <&pfc 0 128 32>;
175 #interrupt-cells = <2>;
176 interrupt-controller;
177 clocks = <&mstp9_clks R8A7793_CLK_GPIO4>;
178 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
181 gpio5: gpio@e6055000 {
182 compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
183 reg = <0 0xe6055000 0 0x50>;
184 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
187 gpio-ranges = <&pfc 0 160 32>;
188 #interrupt-cells = <2>;
189 interrupt-controller;
190 clocks = <&mstp9_clks R8A7793_CLK_GPIO5>;
191 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
194 gpio6: gpio@e6055400 {
195 compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
196 reg = <0 0xe6055400 0 0x50>;
197 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
200 gpio-ranges = <&pfc 0 192 32>;
201 #interrupt-cells = <2>;
202 interrupt-controller;
203 clocks = <&mstp9_clks R8A7793_CLK_GPIO6>;
204 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
207 gpio7: gpio@e6055800 {
208 compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
209 reg = <0 0xe6055800 0 0x50>;
210 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
213 gpio-ranges = <&pfc 0 224 26>;
214 #interrupt-cells = <2>;
215 interrupt-controller;
216 clocks = <&mstp9_clks R8A7793_CLK_GPIO7>;
217 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
220 thermal: thermal@e61f0000 {
221 compatible = "renesas,thermal-r8a7793",
222 "renesas,rcar-gen2-thermal",
223 "renesas,rcar-thermal";
224 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
225 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
226 clocks = <&mstp5_clks R8A7793_CLK_THERMAL>;
227 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
228 #thermal-sensor-cells = <0>;
232 compatible = "arm,armv7-timer";
233 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
234 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
235 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
236 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
239 cmt0: timer@ffca0000 {
240 compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
241 reg = <0 0xffca0000 0 0x1004>;
242 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
243 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
244 clocks = <&mstp1_clks R8A7793_CLK_CMT0>;
246 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
248 renesas,channels-mask = <0x60>;
253 cmt1: timer@e6130000 {
254 compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
255 reg = <0 0xe6130000 0 0x1004>;
256 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
257 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
258 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
259 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
260 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
261 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
262 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
263 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&mstp3_clks R8A7793_CLK_CMT1>;
266 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
268 renesas,channels-mask = <0xff>;
273 irqc0: interrupt-controller@e61c0000 {
274 compatible = "renesas,irqc-r8a7793", "renesas,irqc";
275 #interrupt-cells = <2>;
276 interrupt-controller;
277 reg = <0 0xe61c0000 0 0x200>;
278 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
284 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
286 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
287 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
288 clocks = <&mstp4_clks R8A7793_CLK_IRQC>;
289 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
292 dmac0: dma-controller@e6700000 {
293 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
294 reg = <0 0xe6700000 0 0x20000>;
295 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
296 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
297 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
298 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
299 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
300 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
301 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
302 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
303 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
304 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
305 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
306 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
307 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
308 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
311 interrupt-names = "error",
312 "ch0", "ch1", "ch2", "ch3",
313 "ch4", "ch5", "ch6", "ch7",
314 "ch8", "ch9", "ch10", "ch11",
315 "ch12", "ch13", "ch14";
316 clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>;
318 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
323 dmac1: dma-controller@e6720000 {
324 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
325 reg = <0 0xe6720000 0 0x20000>;
326 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
327 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
328 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
329 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
330 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
331 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
332 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
333 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
334 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
335 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
336 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
337 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
338 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
339 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
340 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
341 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
342 interrupt-names = "error",
343 "ch0", "ch1", "ch2", "ch3",
344 "ch4", "ch5", "ch6", "ch7",
345 "ch8", "ch9", "ch10", "ch11",
346 "ch12", "ch13", "ch14";
347 clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>;
349 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
354 audma0: dma-controller@ec700000 {
355 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
356 reg = <0 0xec700000 0 0x10000>;
357 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
362 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
363 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
364 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
365 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
366 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
367 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
368 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
369 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
370 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
371 interrupt-names = "error",
372 "ch0", "ch1", "ch2", "ch3",
373 "ch4", "ch5", "ch6", "ch7",
374 "ch8", "ch9", "ch10", "ch11",
376 clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC0>;
378 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
383 audma1: dma-controller@ec720000 {
384 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
385 reg = <0 0xec720000 0 0x10000>;
386 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
395 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
396 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
397 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
398 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
399 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
400 interrupt-names = "error",
401 "ch0", "ch1", "ch2", "ch3",
402 "ch4", "ch5", "ch6", "ch7",
403 "ch8", "ch9", "ch10", "ch11",
405 clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC1>;
407 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
412 /* The memory map in the User's Manual maps the cores to bus numbers */
414 #address-cells = <1>;
416 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
417 reg = <0 0xe6508000 0 0x40>;
418 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
419 clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
420 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
421 i2c-scl-internal-delay-ns = <6>;
426 #address-cells = <1>;
428 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
429 reg = <0 0xe6518000 0 0x40>;
430 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
431 clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
432 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
433 i2c-scl-internal-delay-ns = <6>;
438 #address-cells = <1>;
440 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
441 reg = <0 0xe6530000 0 0x40>;
442 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
443 clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
444 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
445 i2c-scl-internal-delay-ns = <6>;
450 #address-cells = <1>;
452 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
453 reg = <0 0xe6540000 0 0x40>;
454 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
455 clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
456 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
457 i2c-scl-internal-delay-ns = <6>;
462 #address-cells = <1>;
464 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
465 reg = <0 0xe6520000 0 0x40>;
466 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
467 clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
468 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
469 i2c-scl-internal-delay-ns = <6>;
474 /* doesn't need pinmux */
475 #address-cells = <1>;
477 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
478 reg = <0 0xe6528000 0 0x40>;
479 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
480 clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
481 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
482 i2c-scl-internal-delay-ns = <110>;
487 /* doesn't need pinmux */
488 #address-cells = <1>;
490 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
491 "renesas,rmobile-iic";
492 reg = <0 0xe60b0000 0 0x425>;
493 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
494 clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
495 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
496 <&dmac1 0x77>, <&dmac1 0x78>;
497 dma-names = "tx", "rx", "tx", "rx";
498 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
503 #address-cells = <1>;
505 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
506 "renesas,rmobile-iic";
507 reg = <0 0xe6500000 0 0x425>;
508 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
509 clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
510 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
511 <&dmac1 0x61>, <&dmac1 0x62>;
512 dma-names = "tx", "rx", "tx", "rx";
513 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
518 #address-cells = <1>;
520 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
521 "renesas,rmobile-iic";
522 reg = <0 0xe6510000 0 0x425>;
523 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
524 clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
525 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
526 <&dmac1 0x65>, <&dmac1 0x66>;
527 dma-names = "tx", "rx", "tx", "rx";
528 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
532 pfc: pin-controller@e6060000 {
533 compatible = "renesas,pfc-r8a7793";
534 reg = <0 0xe6060000 0 0x250>;
538 compatible = "renesas,sdhi-r8a7793";
539 reg = <0 0xee100000 0 0x328>;
540 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
541 clocks = <&mstp3_clks R8A7793_CLK_SDHI0>;
542 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
543 <&dmac1 0xcd>, <&dmac1 0xce>;
544 dma-names = "tx", "rx", "tx", "rx";
545 max-frequency = <195000000>;
546 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
551 compatible = "renesas,sdhi-r8a7793";
552 reg = <0 0xee140000 0 0x100>;
553 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
554 clocks = <&mstp3_clks R8A7793_CLK_SDHI1>;
555 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
556 <&dmac1 0xc1>, <&dmac1 0xc2>;
557 dma-names = "tx", "rx", "tx", "rx";
558 max-frequency = <97500000>;
559 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
564 compatible = "renesas,sdhi-r8a7793";
565 reg = <0 0xee160000 0 0x100>;
566 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
567 clocks = <&mstp3_clks R8A7793_CLK_SDHI2>;
568 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
569 <&dmac1 0xd3>, <&dmac1 0xd4>;
570 dma-names = "tx", "rx", "tx", "rx";
571 max-frequency = <97500000>;
572 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
576 mmcif0: mmc@ee200000 {
577 compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
578 reg = <0 0xee200000 0 0x80>;
579 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
580 clocks = <&mstp3_clks R8A7793_CLK_MMCIF0>;
581 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
582 <&dmac1 0xd1>, <&dmac1 0xd2>;
583 dma-names = "tx", "rx", "tx", "rx";
584 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
587 max-frequency = <97500000>;
590 scifa0: serial@e6c40000 {
591 compatible = "renesas,scifa-r8a7793",
592 "renesas,rcar-gen2-scifa", "renesas,scifa";
593 reg = <0 0xe6c40000 0 64>;
594 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
595 clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>;
597 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
598 <&dmac1 0x21>, <&dmac1 0x22>;
599 dma-names = "tx", "rx", "tx", "rx";
600 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
604 scifa1: serial@e6c50000 {
605 compatible = "renesas,scifa-r8a7793",
606 "renesas,rcar-gen2-scifa", "renesas,scifa";
607 reg = <0 0xe6c50000 0 64>;
608 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
609 clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>;
611 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
612 <&dmac1 0x25>, <&dmac1 0x26>;
613 dma-names = "tx", "rx", "tx", "rx";
614 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
618 scifa2: serial@e6c60000 {
619 compatible = "renesas,scifa-r8a7793",
620 "renesas,rcar-gen2-scifa", "renesas,scifa";
621 reg = <0 0xe6c60000 0 64>;
622 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
623 clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>;
625 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
626 <&dmac1 0x27>, <&dmac1 0x28>;
627 dma-names = "tx", "rx", "tx", "rx";
628 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
632 scifa3: serial@e6c70000 {
633 compatible = "renesas,scifa-r8a7793",
634 "renesas,rcar-gen2-scifa", "renesas,scifa";
635 reg = <0 0xe6c70000 0 64>;
636 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>;
639 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
640 <&dmac1 0x1b>, <&dmac1 0x1c>;
641 dma-names = "tx", "rx", "tx", "rx";
642 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
646 scifa4: serial@e6c78000 {
647 compatible = "renesas,scifa-r8a7793",
648 "renesas,rcar-gen2-scifa", "renesas,scifa";
649 reg = <0 0xe6c78000 0 64>;
650 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
651 clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>;
653 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
654 <&dmac1 0x1f>, <&dmac1 0x20>;
655 dma-names = "tx", "rx", "tx", "rx";
656 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
660 scifa5: serial@e6c80000 {
661 compatible = "renesas,scifa-r8a7793",
662 "renesas,rcar-gen2-scifa", "renesas,scifa";
663 reg = <0 0xe6c80000 0 64>;
664 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
665 clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>;
667 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
668 <&dmac1 0x23>, <&dmac1 0x24>;
669 dma-names = "tx", "rx", "tx", "rx";
670 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
674 scifb0: serial@e6c20000 {
675 compatible = "renesas,scifb-r8a7793",
676 "renesas,rcar-gen2-scifb", "renesas,scifb";
677 reg = <0 0xe6c20000 0 0x100>;
678 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
679 clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>;
681 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
682 <&dmac1 0x3d>, <&dmac1 0x3e>;
683 dma-names = "tx", "rx", "tx", "rx";
684 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
688 scifb1: serial@e6c30000 {
689 compatible = "renesas,scifb-r8a7793",
690 "renesas,rcar-gen2-scifb", "renesas,scifb";
691 reg = <0 0xe6c30000 0 0x100>;
692 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
693 clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>;
695 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
696 <&dmac1 0x19>, <&dmac1 0x1a>;
697 dma-names = "tx", "rx", "tx", "rx";
698 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
702 scifb2: serial@e6ce0000 {
703 compatible = "renesas,scifb-r8a7793",
704 "renesas,rcar-gen2-scifb", "renesas,scifb";
705 reg = <0 0xe6ce0000 0 0x100>;
706 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
707 clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>;
709 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
710 <&dmac1 0x1d>, <&dmac1 0x1e>;
711 dma-names = "tx", "rx", "tx", "rx";
712 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
716 scif0: serial@e6e60000 {
717 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
719 reg = <0 0xe6e60000 0 64>;
720 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
721 clocks = <&mstp7_clks R8A7793_CLK_SCIF0>, <&zs_clk>,
723 clock-names = "fck", "brg_int", "scif_clk";
724 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
725 <&dmac1 0x29>, <&dmac1 0x2a>;
726 dma-names = "tx", "rx", "tx", "rx";
727 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
731 scif1: serial@e6e68000 {
732 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
734 reg = <0 0xe6e68000 0 64>;
735 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
736 clocks = <&mstp7_clks R8A7793_CLK_SCIF1>, <&zs_clk>,
738 clock-names = "fck", "brg_int", "scif_clk";
739 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
740 <&dmac1 0x2d>, <&dmac1 0x2e>;
741 dma-names = "tx", "rx", "tx", "rx";
742 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
746 scif2: serial@e6e58000 {
747 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
749 reg = <0 0xe6e58000 0 64>;
750 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
751 clocks = <&mstp7_clks R8A7793_CLK_SCIF2>, <&zs_clk>,
753 clock-names = "fck", "brg_int", "scif_clk";
754 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
755 <&dmac1 0x2b>, <&dmac1 0x2c>;
756 dma-names = "tx", "rx", "tx", "rx";
757 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
761 scif3: serial@e6ea8000 {
762 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
764 reg = <0 0xe6ea8000 0 64>;
765 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
766 clocks = <&mstp7_clks R8A7793_CLK_SCIF3>, <&zs_clk>,
768 clock-names = "fck", "brg_int", "scif_clk";
769 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
770 <&dmac1 0x2f>, <&dmac1 0x30>;
771 dma-names = "tx", "rx", "tx", "rx";
772 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
776 scif4: serial@e6ee0000 {
777 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
779 reg = <0 0xe6ee0000 0 64>;
780 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
781 clocks = <&mstp7_clks R8A7793_CLK_SCIF4>, <&zs_clk>,
783 clock-names = "fck", "brg_int", "scif_clk";
784 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
785 <&dmac1 0xfb>, <&dmac1 0xfc>;
786 dma-names = "tx", "rx", "tx", "rx";
787 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
791 scif5: serial@e6ee8000 {
792 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
794 reg = <0 0xe6ee8000 0 64>;
795 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
796 clocks = <&mstp7_clks R8A7793_CLK_SCIF5>, <&zs_clk>,
798 clock-names = "fck", "brg_int", "scif_clk";
799 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
800 <&dmac1 0xfd>, <&dmac1 0xfe>;
801 dma-names = "tx", "rx", "tx", "rx";
802 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
806 hscif0: serial@e62c0000 {
807 compatible = "renesas,hscif-r8a7793",
808 "renesas,rcar-gen2-hscif", "renesas,hscif";
809 reg = <0 0xe62c0000 0 96>;
810 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
811 clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>, <&zs_clk>,
813 clock-names = "fck", "brg_int", "scif_clk";
814 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
815 <&dmac1 0x39>, <&dmac1 0x3a>;
816 dma-names = "tx", "rx", "tx", "rx";
817 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
821 hscif1: serial@e62c8000 {
822 compatible = "renesas,hscif-r8a7793",
823 "renesas,rcar-gen2-hscif", "renesas,hscif";
824 reg = <0 0xe62c8000 0 96>;
825 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
826 clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>, <&zs_clk>,
828 clock-names = "fck", "brg_int", "scif_clk";
829 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
830 <&dmac1 0x4d>, <&dmac1 0x4e>;
831 dma-names = "tx", "rx", "tx", "rx";
832 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
836 hscif2: serial@e62d0000 {
837 compatible = "renesas,hscif-r8a7793",
838 "renesas,rcar-gen2-hscif", "renesas,hscif";
839 reg = <0 0xe62d0000 0 96>;
840 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
841 clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>, <&zs_clk>,
843 clock-names = "fck", "brg_int", "scif_clk";
844 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
845 <&dmac1 0x3b>, <&dmac1 0x3c>;
846 dma-names = "tx", "rx", "tx", "rx";
847 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
851 ether: ethernet@ee700000 {
852 compatible = "renesas,ether-r8a7793";
853 reg = <0 0xee700000 0 0x400>;
854 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
855 clocks = <&mstp8_clks R8A7793_CLK_ETHER>;
856 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
858 #address-cells = <1>;
863 vin0: video@e6ef0000 {
864 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
865 reg = <0 0xe6ef0000 0 0x1000>;
866 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
867 clocks = <&mstp8_clks R8A7793_CLK_VIN0>;
868 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
872 vin1: video@e6ef1000 {
873 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
874 reg = <0 0xe6ef1000 0 0x1000>;
875 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
876 clocks = <&mstp8_clks R8A7793_CLK_VIN1>;
877 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
881 vin2: video@e6ef2000 {
882 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
883 reg = <0 0xe6ef2000 0 0x1000>;
884 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
885 clocks = <&mstp8_clks R8A7793_CLK_VIN2>;
886 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
891 compatible = "renesas,qspi-r8a7793", "renesas,qspi";
892 reg = <0 0xe6b10000 0 0x2c>;
893 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
894 clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>;
895 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
896 <&dmac1 0x17>, <&dmac1 0x18>;
897 dma-names = "tx", "rx", "tx", "rx";
898 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
900 #address-cells = <1>;
905 du: display@feb00000 {
906 compatible = "renesas,du-r8a7793";
907 reg = <0 0xfeb00000 0 0x40000>,
908 <0 0xfeb90000 0 0x1c>;
909 reg-names = "du", "lvds.0";
910 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
911 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
912 clocks = <&mstp7_clks R8A7793_CLK_DU0>,
913 <&mstp7_clks R8A7793_CLK_DU1>,
914 <&mstp7_clks R8A7793_CLK_LVDS0>;
915 clock-names = "du.0", "du.1", "lvds.0";
919 #address-cells = <1>;
924 du_out_rgb: endpoint {
929 du_out_lvds0: endpoint {
936 compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
937 reg = <0 0xe6e80000 0 0x1000>;
938 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
939 clocks = <&mstp9_clks R8A7793_CLK_RCAN0>,
940 <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>;
941 clock-names = "clkp1", "clkp2", "can_clk";
942 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
947 compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
948 reg = <0 0xe6e88000 0 0x1000>;
949 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
950 clocks = <&mstp9_clks R8A7793_CLK_RCAN1>,
951 <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>;
952 clock-names = "clkp1", "clkp2", "can_clk";
953 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
958 #address-cells = <2>;
962 /* External root clock */
964 compatible = "fixed-clock";
966 /* This value must be overridden by the board. */
967 clock-frequency = <0>;
971 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
972 * default. Boards that provide audio clocks should override them.
974 audio_clk_a: audio_clk_a {
975 compatible = "fixed-clock";
977 clock-frequency = <0>;
979 audio_clk_b: audio_clk_b {
980 compatible = "fixed-clock";
982 clock-frequency = <0>;
984 audio_clk_c: audio_clk_c {
985 compatible = "fixed-clock";
987 clock-frequency = <0>;
990 /* External USB clock - can be overridden by the board */
991 usb_extal_clk: usb_extal {
992 compatible = "fixed-clock";
994 clock-frequency = <48000000>;
997 /* External CAN clock */
999 compatible = "fixed-clock";
1001 /* This value must be overridden by the board. */
1002 clock-frequency = <0>;
1005 /* External SCIF clock */
1007 compatible = "fixed-clock";
1009 /* This value must be overridden by the board. */
1010 clock-frequency = <0>;
1013 /* Special CPG clocks */
1014 cpg_clocks: cpg_clocks@e6150000 {
1015 compatible = "renesas,r8a7793-cpg-clocks",
1016 "renesas,rcar-gen2-cpg-clocks";
1017 reg = <0 0xe6150000 0 0x1000>;
1018 clocks = <&extal_clk &usb_extal_clk>;
1020 clock-output-names = "main", "pll0", "pll1", "pll3",
1021 "lb", "qspi", "sdh", "sd0", "z",
1023 #power-domain-cells = <0>;
1026 /* Variable factor clocks */
1027 sd2_clk: sd2@e6150078 {
1028 compatible = "renesas,r8a7793-div6-clock",
1029 "renesas,cpg-div6-clock";
1030 reg = <0 0xe6150078 0 4>;
1031 clocks = <&pll1_div2_clk>;
1034 sd3_clk: sd3@e615026c {
1035 compatible = "renesas,r8a7793-div6-clock",
1036 "renesas,cpg-div6-clock";
1037 reg = <0 0xe615026c 0 4>;
1038 clocks = <&pll1_div2_clk>;
1041 mmc0_clk: mmc0@e6150240 {
1042 compatible = "renesas,r8a7793-div6-clock",
1043 "renesas,cpg-div6-clock";
1044 reg = <0 0xe6150240 0 4>;
1045 clocks = <&pll1_div2_clk>;
1049 /* Fixed factor clocks */
1050 pll1_div2_clk: pll1_div2 {
1051 compatible = "fixed-factor-clock";
1052 clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
1058 compatible = "fixed-factor-clock";
1059 clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
1065 compatible = "fixed-factor-clock";
1066 clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
1072 compatible = "fixed-factor-clock";
1073 clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
1079 compatible = "fixed-factor-clock";
1080 clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
1086 compatible = "fixed-factor-clock";
1087 clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
1093 compatible = "fixed-factor-clock";
1094 clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
1100 compatible = "fixed-factor-clock";
1101 clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
1103 clock-div = <(48 * 1024)>;
1107 compatible = "fixed-factor-clock";
1108 clocks = <&pll1_div2_clk>;
1114 compatible = "fixed-factor-clock";
1115 clocks = <&extal_clk>;
1122 mstp1_clks: mstp1_clks@e6150134 {
1123 compatible = "renesas,r8a7793-mstp-clocks",
1124 "renesas,cpg-mstp-clocks";
1125 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1126 clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1127 <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
1128 <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>,
1129 <&zs_clk>, <&zs_clk>, <&zs_clk>;
1132 R8A7793_CLK_VCP0 R8A7793_CLK_VPC0
1133 R8A7793_CLK_SSP1 R8A7793_CLK_TMU1
1134 R8A7793_CLK_3DG R8A7793_CLK_2DDMAC
1135 R8A7793_CLK_FDP1_1 R8A7793_CLK_FDP1_0
1136 R8A7793_CLK_TMU3 R8A7793_CLK_TMU2
1137 R8A7793_CLK_CMT0 R8A7793_CLK_TMU0
1138 R8A7793_CLK_VSP1_DU1 R8A7793_CLK_VSP1_DU0
1141 clock-output-names =
1142 "vcp0", "vpc0", "ssp_dev", "tmu1",
1143 "pvrsrvkm", "tddmac", "fdp1", "fdp0",
1144 "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
1147 mstp2_clks: mstp2_clks@e6150138 {
1148 compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
1149 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1150 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1151 <&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>;
1154 R8A7793_CLK_SCIFA2 R8A7793_CLK_SCIFA1 R8A7793_CLK_SCIFA0
1155 R8A7793_CLK_SCIFB0 R8A7793_CLK_SCIFB1 R8A7793_CLK_SCIFB2
1156 R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0
1158 clock-output-names =
1159 "scifa2", "scifa1", "scifa0", "scifb0",
1160 "scifb1", "scifb2", "sys-dmac1", "sys-dmac0";
1162 mstp3_clks: mstp3_clks@e615013c {
1163 compatible = "renesas,r8a7793-mstp-clocks",
1164 "renesas,cpg-mstp-clocks";
1165 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1166 clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>,
1167 <&cpg_clocks R8A7793_CLK_SD0>, <&mmc0_clk>,
1168 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>,
1169 <&rclk_clk>, <&hp_clk>, <&hp_clk>;
1172 R8A7793_CLK_TPU0 R8A7793_CLK_SDHI2
1173 R8A7793_CLK_SDHI1 R8A7793_CLK_SDHI0
1174 R8A7793_CLK_MMCIF0 R8A7793_CLK_IIC0
1175 R8A7793_CLK_PCIEC R8A7793_CLK_IIC1
1176 R8A7793_CLK_SSUSB R8A7793_CLK_CMT1
1177 R8A7793_CLK_USBDMAC0 R8A7793_CLK_USBDMAC1
1179 clock-output-names =
1180 "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0",
1181 "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
1182 "usbdmac0", "usbdmac1";
1184 mstp4_clks: mstp4_clks@e6150140 {
1185 compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
1186 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1187 clocks = <&cp_clk>, <&zs_clk>;
1190 R8A7793_CLK_IRQC R8A7793_CLK_INTC_SYS
1192 clock-output-names = "irqc", "intc-sys";
1194 mstp5_clks: mstp5_clks@e6150144 {
1195 compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
1196 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1197 clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>;
1199 clock-indices = <R8A7793_CLK_AUDIO_DMAC0 R8A7793_CLK_AUDIO_DMAC1
1200 R8A7793_CLK_THERMAL>;
1201 clock-output-names = "audmac0", "audmac1", "thermal";
1203 mstp7_clks: mstp7_clks@e615014c {
1204 compatible = "renesas,r8a7793-mstp-clocks",
1205 "renesas,cpg-mstp-clocks";
1206 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1207 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&p_clk>,
1208 <&p_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1209 <&p_clk>, <&p_clk>, <&p_clk>, <&zx_clk>,
1210 <&zx_clk>, <&zx_clk>;
1213 R8A7793_CLK_EHCI R8A7793_CLK_HSUSB
1214 R8A7793_CLK_HSCIF2 R8A7793_CLK_SCIF5
1215 R8A7793_CLK_SCIF4 R8A7793_CLK_HSCIF1
1216 R8A7793_CLK_HSCIF0 R8A7793_CLK_SCIF3
1217 R8A7793_CLK_SCIF2 R8A7793_CLK_SCIF1
1218 R8A7793_CLK_SCIF0 R8A7793_CLK_DU1
1219 R8A7793_CLK_DU0 R8A7793_CLK_LVDS0
1221 clock-output-names =
1222 "ehci", "hsusb", "hscif2", "scif5", "scif4",
1223 "hscif1", "hscif0", "scif3", "scif2",
1224 "scif1", "scif0", "du1", "du0", "lvds0";
1226 mstp8_clks: mstp8_clks@e6150990 {
1227 compatible = "renesas,r8a7793-mstp-clocks",
1228 "renesas,cpg-mstp-clocks";
1229 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1230 clocks = <&zx_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
1231 <&p_clk>, <&zs_clk>, <&zs_clk>;
1234 R8A7793_CLK_IPMMU_SGX R8A7793_CLK_VIN2
1235 R8A7793_CLK_VIN1 R8A7793_CLK_VIN0
1236 R8A7793_CLK_ETHER R8A7793_CLK_SATA1
1239 clock-output-names =
1240 "ipmmu_sgx", "vin2", "vin1", "vin0", "ether",
1243 mstp9_clks: mstp9_clks@e6150994 {
1244 compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
1245 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1246 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1247 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1249 <&cpg_clocks R8A7793_CLK_QSPI>, <&hp_clk>,
1250 <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
1251 <&hp_clk>, <&hp_clk>;
1254 R8A7793_CLK_GPIO7 R8A7793_CLK_GPIO6
1255 R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4
1256 R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2
1257 R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0
1258 R8A7793_CLK_QSPI_MOD R8A7793_CLK_RCAN1
1259 R8A7793_CLK_RCAN0 R8A7793_CLK_I2C5
1260 R8A7793_CLK_IICDVFS R8A7793_CLK_I2C4
1261 R8A7793_CLK_I2C3 R8A7793_CLK_I2C2
1262 R8A7793_CLK_I2C1 R8A7793_CLK_I2C0
1264 clock-output-names =
1265 "gpio7", "gpio6", "gpio5", "gpio4",
1266 "gpio3", "gpio2", "gpio1", "gpio0",
1267 "rcan1", "rcan0", "qspi_mod", "i2c5",
1268 "i2c6", "i2c4", "i2c3", "i2c2", "i2c1",
1271 mstp10_clks: mstp10_clks@e6150998 {
1272 compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
1273 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1275 <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
1276 <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
1277 <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
1278 <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
1279 <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
1281 <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
1282 <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
1283 <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
1284 <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
1285 <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
1286 <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
1287 <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>;
1292 R8A7793_CLK_SSI9 R8A7793_CLK_SSI8 R8A7793_CLK_SSI7 R8A7793_CLK_SSI6 R8A7793_CLK_SSI5
1293 R8A7793_CLK_SSI4 R8A7793_CLK_SSI3 R8A7793_CLK_SSI2 R8A7793_CLK_SSI1 R8A7793_CLK_SSI0
1295 R8A7793_CLK_SCU_DVC1 R8A7793_CLK_SCU_DVC0
1296 R8A7793_CLK_SCU_CTU1_MIX1 R8A7793_CLK_SCU_CTU0_MIX0
1297 R8A7793_CLK_SCU_SRC9 R8A7793_CLK_SCU_SRC8 R8A7793_CLK_SCU_SRC7 R8A7793_CLK_SCU_SRC6 R8A7793_CLK_SCU_SRC5
1298 R8A7793_CLK_SCU_SRC4 R8A7793_CLK_SCU_SRC3 R8A7793_CLK_SCU_SRC2 R8A7793_CLK_SCU_SRC1 R8A7793_CLK_SCU_SRC0
1300 clock-output-names =
1302 "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
1303 "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
1305 "scu-dvc1", "scu-dvc0",
1306 "scu-ctu1-mix1", "scu-ctu0-mix0",
1307 "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
1308 "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
1310 mstp11_clks: mstp11_clks@e615099c {
1311 compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
1312 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
1313 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
1316 R8A7793_CLK_SCIFA3 R8A7793_CLK_SCIFA4 R8A7793_CLK_SCIFA5
1318 clock-output-names = "scifa3", "scifa4", "scifa5";
1322 rst: reset-controller@e6160000 {
1323 compatible = "renesas,r8a7793-rst";
1324 reg = <0 0xe6160000 0 0x0100>;
1327 prr: chipid@ff000044 {
1328 compatible = "renesas,prr";
1329 reg = <0 0xff000044 0 4>;
1332 sysc: system-controller@e6180000 {
1333 compatible = "renesas,r8a7793-sysc";
1334 reg = <0 0xe6180000 0 0x0200>;
1335 #power-domain-cells = <1>;
1338 ipmmu_sy0: mmu@e6280000 {
1339 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1340 reg = <0 0xe6280000 0 0x1000>;
1341 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1342 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1344 status = "disabled";
1347 ipmmu_sy1: mmu@e6290000 {
1348 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1349 reg = <0 0xe6290000 0 0x1000>;
1350 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1352 status = "disabled";
1355 ipmmu_ds: mmu@e6740000 {
1356 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1357 reg = <0 0xe6740000 0 0x1000>;
1358 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1359 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1361 status = "disabled";
1364 ipmmu_mp: mmu@ec680000 {
1365 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1366 reg = <0 0xec680000 0 0x1000>;
1367 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1369 status = "disabled";
1372 ipmmu_mx: mmu@fe951000 {
1373 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1374 reg = <0 0xfe951000 0 0x1000>;
1375 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1376 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1378 status = "disabled";
1381 ipmmu_rt: mmu@ffc80000 {
1382 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1383 reg = <0 0xffc80000 0 0x1000>;
1384 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1386 status = "disabled";
1389 ipmmu_gp: mmu@e62a0000 {
1390 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1391 reg = <0 0xe62a0000 0 0x1000>;
1392 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1393 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1395 status = "disabled";
1398 rcar_sound: sound@ec500000 {
1400 * #sound-dai-cells is required
1402 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1403 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1405 compatible = "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2";
1406 reg = <0 0xec500000 0 0x1000>, /* SCU */
1407 <0 0xec5a0000 0 0x100>, /* ADG */
1408 <0 0xec540000 0 0x1000>, /* SSIU */
1409 <0 0xec541000 0 0x280>, /* SSI */
1410 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1411 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1413 clocks = <&mstp10_clks R8A7793_CLK_SSI_ALL>,
1414 <&mstp10_clks R8A7793_CLK_SSI9>, <&mstp10_clks R8A7793_CLK_SSI8>,
1415 <&mstp10_clks R8A7793_CLK_SSI7>, <&mstp10_clks R8A7793_CLK_SSI6>,
1416 <&mstp10_clks R8A7793_CLK_SSI5>, <&mstp10_clks R8A7793_CLK_SSI4>,
1417 <&mstp10_clks R8A7793_CLK_SSI3>, <&mstp10_clks R8A7793_CLK_SSI2>,
1418 <&mstp10_clks R8A7793_CLK_SSI1>, <&mstp10_clks R8A7793_CLK_SSI0>,
1419 <&mstp10_clks R8A7793_CLK_SCU_SRC9>, <&mstp10_clks R8A7793_CLK_SCU_SRC8>,
1420 <&mstp10_clks R8A7793_CLK_SCU_SRC7>, <&mstp10_clks R8A7793_CLK_SCU_SRC6>,
1421 <&mstp10_clks R8A7793_CLK_SCU_SRC5>, <&mstp10_clks R8A7793_CLK_SCU_SRC4>,
1422 <&mstp10_clks R8A7793_CLK_SCU_SRC3>, <&mstp10_clks R8A7793_CLK_SCU_SRC2>,
1423 <&mstp10_clks R8A7793_CLK_SCU_SRC1>, <&mstp10_clks R8A7793_CLK_SCU_SRC0>,
1424 <&mstp10_clks R8A7793_CLK_SCU_DVC0>, <&mstp10_clks R8A7793_CLK_SCU_DVC1>,
1425 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
1426 clock-names = "ssi-all",
1427 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1428 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1429 "src.9", "src.8", "src.7", "src.6", "src.5",
1430 "src.4", "src.3", "src.2", "src.1", "src.0",
1432 "clk_a", "clk_b", "clk_c", "clk_i";
1433 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1435 status = "disabled";
1439 dmas = <&audma1 0xbc>;
1443 dmas = <&audma1 0xbe>;
1450 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1451 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1452 dma-names = "rx", "tx";
1455 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1456 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1457 dma-names = "rx", "tx";
1460 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1461 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1462 dma-names = "rx", "tx";
1465 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1466 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1467 dma-names = "rx", "tx";
1470 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1471 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1472 dma-names = "rx", "tx";
1475 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1476 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1477 dma-names = "rx", "tx";
1480 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1481 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1482 dma-names = "rx", "tx";
1485 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1486 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1487 dma-names = "rx", "tx";
1490 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1491 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1492 dma-names = "rx", "tx";
1495 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1496 dmas = <&audma0 0x97>, <&audma1 0xba>;
1497 dma-names = "rx", "tx";
1503 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1504 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1505 dma-names = "rx", "tx", "rxu", "txu";
1508 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1509 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1510 dma-names = "rx", "tx", "rxu", "txu";
1513 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1514 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1515 dma-names = "rx", "tx", "rxu", "txu";
1518 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1519 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1520 dma-names = "rx", "tx", "rxu", "txu";
1523 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1524 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1525 dma-names = "rx", "tx", "rxu", "txu";
1528 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1529 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1530 dma-names = "rx", "tx", "rxu", "txu";
1533 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1534 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1535 dma-names = "rx", "tx", "rxu", "txu";
1538 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1539 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1540 dma-names = "rx", "tx", "rxu", "txu";
1543 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1544 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1545 dma-names = "rx", "tx", "rxu", "txu";
1548 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1549 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1550 dma-names = "rx", "tx", "rxu", "txu";