2 * Device Tree Source for the Henninger board
4 * Copyright (C) 2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
13 #include "r8a7791.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
18 compatible = "renesas,henninger", "renesas,r8a7791";
25 bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x40000000>;
34 device_type = "memory";
35 reg = <2 0x00000000 0 0x40000000>;
38 vcc_sdhi0: regulator@0 {
39 compatible = "regulator-fixed";
41 regulator-name = "SDHI0 Vcc";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
47 vccq_sdhi0: regulator@1 {
48 compatible = "regulator-gpio";
50 regulator-name = "SDHI0 VccQ";
51 regulator-min-microvolt = <1800000>;
52 regulator-max-microvolt = <3300000>;
54 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
60 vcc_sdhi2: regulator@2 {
61 compatible = "regulator-fixed";
63 regulator-name = "SDHI2 Vcc";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
69 vccq_sdhi2: regulator@3 {
70 compatible = "regulator-gpio";
72 regulator-name = "SDHI2 VccQ";
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <3300000>;
76 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
84 clock-frequency = <20000000>;
89 renesas,groups = "scif0_data_d";
90 renesas,function = "scif0";
94 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
95 renesas,function = "eth";
99 renesas,groups = "intc_irq0";
100 renesas,function = "intc";
104 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
105 renesas,function = "sdhi0";
109 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
110 renesas,function = "sdhi2";
114 renesas,groups = "qspi_ctrl", "qspi_data4";
115 renesas,function = "qspi";
119 renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
121 renesas,function = "msiof0";
126 pinctrl-0 = <&scif0_pins>;
127 pinctrl-names = "default";
133 pinctrl-0 = <ðer_pins &phy1_pins>;
134 pinctrl-names = "default";
136 phy-handle = <&phy1>;
137 renesas,ether-link-active-low;
140 phy1: ethernet-phy@1 {
142 interrupt-parent = <&irqc0>;
143 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
144 micrel,led-mode = <1>;
153 pinctrl-0 = <&sdhi0_pins>;
154 pinctrl-names = "default";
156 vmmc-supply = <&vcc_sdhi0>;
157 vqmmc-supply = <&vccq_sdhi0>;
158 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
159 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
164 pinctrl-0 = <&sdhi2_pins>;
165 pinctrl-names = "default";
167 vmmc-supply = <&vcc_sdhi2>;
168 vqmmc-supply = <&vccq_sdhi2>;
169 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
174 pinctrl-0 = <&qspi_pins>;
175 pinctrl-names = "default";
180 #address-cells = <1>;
182 compatible = "spansion,s25fl512s";
184 spi-max-frequency = <30000000>;
185 spi-tx-bus-width = <4>;
186 spi-rx-bus-width = <4>;
190 label = "loader_prg";
191 reg = <0x00000000 0x00040000>;
196 reg = <0x00040000 0x00400000>;
201 reg = <0x00440000 0x03bc0000>;
207 pinctrl-0 = <&msiof0_pins>;
208 pinctrl-names = "default";
213 compatible = "renesas,r2a11302ft";
215 spi-max-frequency = <6000000>;