ARM: dts: r8a7745: Add APMU node and second CPU core
[linux-2.6-block.git] / arch / arm / boot / dts / r8a7745.dtsi
1 /*
2  * Device Tree Source for the r8a7745 SoC
3  *
4  * Copyright (C) 2016-2017 Cogent Embedded Inc.
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2. This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
14 #include <dt-bindings/power/r8a7745-sysc.h>
15
16 / {
17         compatible = "renesas,r8a7745";
18         #address-cells = <2>;
19         #size-cells = <2>;
20
21         aliases {
22                 i2c0 = &i2c0;
23                 i2c1 = &i2c1;
24                 i2c2 = &i2c2;
25                 i2c3 = &i2c3;
26                 i2c4 = &i2c4;
27                 i2c5 = &i2c5;
28                 i2c6 = &iic0;
29                 i2c7 = &iic1;
30                 spi0 = &qspi;
31                 spi1 = &msiof0;
32                 spi2 = &msiof1;
33                 spi3 = &msiof2;
34                 vin0 = &vin0;
35                 vin1 = &vin1;
36         };
37
38         cpus {
39                 #address-cells = <1>;
40                 #size-cells = <0>;
41                 enable-method = "renesas,apmu";
42
43                 cpu0: cpu@0 {
44                         device_type = "cpu";
45                         compatible = "arm,cortex-a7";
46                         reg = <0>;
47                         clock-frequency = <1000000000>;
48                         clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
49                         power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
50                         next-level-cache = <&L2_CA7>;
51                 };
52
53                 cpu1: cpu@1 {
54                         device_type = "cpu";
55                         compatible = "arm,cortex-a7";
56                         reg = <1>;
57                         clock-frequency = <1000000000>;
58                         power-domains = <&sysc R8A7745_PD_CA7_CPU1>;
59                         next-level-cache = <&L2_CA7>;
60                 };
61
62                 L2_CA7: cache-controller-0 {
63                         compatible = "cache";
64                         cache-unified;
65                         cache-level = <2>;
66                         power-domains = <&sysc R8A7745_PD_CA7_SCU>;
67                 };
68         };
69
70         soc {
71                 compatible = "simple-bus";
72                 interrupt-parent = <&gic>;
73
74                 #address-cells = <2>;
75                 #size-cells = <2>;
76                 ranges;
77
78                 apmu@e6151000 {
79                         compatible = "renesas,r8a7745-apmu", "renesas,apmu";
80                         reg = <0 0xe6151000 0 0x188>;
81                         cpus = <&cpu0 &cpu1>;
82                 };
83
84                 gic: interrupt-controller@f1001000 {
85                         compatible = "arm,gic-400";
86                         #interrupt-cells = <3>;
87                         #address-cells = <0>;
88                         interrupt-controller;
89                         reg = <0 0xf1001000 0 0x1000>,
90                               <0 0xf1002000 0 0x2000>,
91                               <0 0xf1004000 0 0x2000>,
92                               <0 0xf1006000 0 0x2000>;
93                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
94                                                  IRQ_TYPE_LEVEL_HIGH)>;
95                         clocks = <&cpg CPG_MOD 408>;
96                         clock-names = "clk";
97                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
98                         resets = <&cpg 408>;
99                 };
100
101                 gpio0: gpio@e6050000 {
102                         compatible = "renesas,gpio-r8a7745",
103                                      "renesas,rcar-gen2-gpio";
104                         reg = <0 0xe6050000 0 0x50>;
105                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
106                         #gpio-cells = <2>;
107                         gpio-controller;
108                         gpio-ranges = <&pfc 0 0 32>;
109                         #interrupt-cells = <2>;
110                         interrupt-controller;
111                         clocks = <&cpg CPG_MOD 912>;
112                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
113                         resets = <&cpg 912>;
114                 };
115
116                 gpio1: gpio@e6051000 {
117                         compatible = "renesas,gpio-r8a7745",
118                                      "renesas,rcar-gen2-gpio";
119                         reg = <0 0xe6051000 0 0x50>;
120                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
121                         #gpio-cells = <2>;
122                         gpio-controller;
123                         gpio-ranges = <&pfc 0 32 26>;
124                         #interrupt-cells = <2>;
125                         interrupt-controller;
126                         clocks = <&cpg CPG_MOD 911>;
127                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
128                         resets = <&cpg 911>;
129                 };
130
131                 gpio2: gpio@e6052000 {
132                         compatible = "renesas,gpio-r8a7745",
133                                      "renesas,rcar-gen2-gpio";
134                         reg = <0 0xe6052000 0 0x50>;
135                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
136                         #gpio-cells = <2>;
137                         gpio-controller;
138                         gpio-ranges = <&pfc 0 64 32>;
139                         #interrupt-cells = <2>;
140                         interrupt-controller;
141                         clocks = <&cpg CPG_MOD 910>;
142                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
143                         resets = <&cpg 910>;
144                 };
145
146                 gpio3: gpio@e6053000 {
147                         compatible = "renesas,gpio-r8a7745",
148                                      "renesas,rcar-gen2-gpio";
149                         reg = <0 0xe6053000 0 0x50>;
150                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
151                         #gpio-cells = <2>;
152                         gpio-controller;
153                         gpio-ranges = <&pfc 0 96 32>;
154                         #interrupt-cells = <2>;
155                         interrupt-controller;
156                         clocks = <&cpg CPG_MOD 909>;
157                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
158                         resets = <&cpg 909>;
159                 };
160
161                 gpio4: gpio@e6054000 {
162                         compatible = "renesas,gpio-r8a7745",
163                                      "renesas,rcar-gen2-gpio";
164                         reg = <0 0xe6054000 0 0x50>;
165                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
166                         #gpio-cells = <2>;
167                         gpio-controller;
168                         gpio-ranges = <&pfc 0 128 32>;
169                         #interrupt-cells = <2>;
170                         interrupt-controller;
171                         clocks = <&cpg CPG_MOD 908>;
172                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
173                         resets = <&cpg 908>;
174                 };
175
176                 gpio5: gpio@e6055000 {
177                         compatible = "renesas,gpio-r8a7745",
178                                      "renesas,rcar-gen2-gpio";
179                         reg = <0 0xe6055000 0 0x50>;
180                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
181                         #gpio-cells = <2>;
182                         gpio-controller;
183                         gpio-ranges = <&pfc 0 160 28>;
184                         #interrupt-cells = <2>;
185                         interrupt-controller;
186                         clocks = <&cpg CPG_MOD 907>;
187                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
188                         resets = <&cpg 907>;
189                 };
190
191                 gpio6: gpio@e6055400 {
192                         compatible = "renesas,gpio-r8a7745",
193                                      "renesas,rcar-gen2-gpio";
194                         reg = <0 0xe6055400 0 0x50>;
195                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
196                         #gpio-cells = <2>;
197                         gpio-controller;
198                         gpio-ranges = <&pfc 0 192 26>;
199                         #interrupt-cells = <2>;
200                         interrupt-controller;
201                         clocks = <&cpg CPG_MOD 905>;
202                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
203                         resets = <&cpg 905>;
204                 };
205
206                 irqc: interrupt-controller@e61c0000 {
207                         compatible = "renesas,irqc-r8a7745", "renesas,irqc";
208                         #interrupt-cells = <2>;
209                         interrupt-controller;
210                         reg = <0 0xe61c0000 0 0x200>;
211                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
212                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
213                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
214                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
215                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
216                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
217                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
218                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
219                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
220                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
221                         clocks = <&cpg CPG_MOD 407>;
222                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
223                         resets = <&cpg 407>;
224                 };
225
226                 timer {
227                         compatible = "arm,armv7-timer";
228                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
229                                                   IRQ_TYPE_LEVEL_LOW)>,
230                                      <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
231                                                   IRQ_TYPE_LEVEL_LOW)>,
232                                      <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
233                                                   IRQ_TYPE_LEVEL_LOW)>,
234                                      <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
235                                                   IRQ_TYPE_LEVEL_LOW)>;
236                 };
237
238                 cpg: clock-controller@e6150000 {
239                         compatible = "renesas,r8a7745-cpg-mssr";
240                         reg = <0 0xe6150000 0 0x1000>;
241                         clocks = <&extal_clk>, <&usb_extal_clk>;
242                         clock-names = "extal", "usb_extal";
243                         #clock-cells = <2>;
244                         #power-domain-cells = <0>;
245                         #reset-cells = <1>;
246                 };
247
248                 prr: chipid@ff000044 {
249                         compatible = "renesas,prr";
250                         reg = <0 0xff000044 0 4>;
251                 };
252
253                 rst: reset-controller@e6160000 {
254                         compatible = "renesas,r8a7745-rst";
255                         reg = <0 0xe6160000 0 0x100>;
256                 };
257
258                 sysc: system-controller@e6180000 {
259                         compatible = "renesas,r8a7745-sysc";
260                         reg = <0 0xe6180000 0 0x200>;
261                         #power-domain-cells = <1>;
262                 };
263
264                 pfc: pin-controller@e6060000 {
265                         compatible = "renesas,pfc-r8a7745";
266                         reg = <0 0xe6060000 0 0x11c>;
267                 };
268
269                 dmac0: dma-controller@e6700000 {
270                         compatible = "renesas,dmac-r8a7745",
271                                      "renesas,rcar-dmac";
272                         reg = <0 0xe6700000 0 0x20000>;
273                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
274                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
275                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
276                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
277                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
278                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
279                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
280                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
281                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
282                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
283                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
284                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
285                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
286                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
287                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
288                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
289                         interrupt-names = "error",
290                                         "ch0", "ch1", "ch2", "ch3",
291                                         "ch4", "ch5", "ch6", "ch7",
292                                         "ch8", "ch9", "ch10", "ch11",
293                                         "ch12", "ch13", "ch14";
294                         clocks = <&cpg CPG_MOD 219>;
295                         clock-names = "fck";
296                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
297                         resets = <&cpg 219>;
298                         #dma-cells = <1>;
299                         dma-channels = <15>;
300                 };
301
302                 dmac1: dma-controller@e6720000 {
303                         compatible = "renesas,dmac-r8a7745",
304                                      "renesas,rcar-dmac";
305                         reg = <0 0xe6720000 0 0x20000>;
306                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
307                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
308                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
309                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
310                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
311                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
312                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
313                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
314                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
315                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
316                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
317                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
318                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
319                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
320                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
321                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
322                         interrupt-names = "error",
323                                         "ch0", "ch1", "ch2", "ch3",
324                                         "ch4", "ch5", "ch6", "ch7",
325                                         "ch8", "ch9", "ch10", "ch11",
326                                         "ch12", "ch13", "ch14";
327                         clocks = <&cpg CPG_MOD 218>;
328                         clock-names = "fck";
329                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
330                         resets = <&cpg 218>;
331                         #dma-cells = <1>;
332                         dma-channels = <15>;
333                 };
334
335                 usb_dmac0: dma-controller@e65a0000 {
336                         compatible = "renesas,r8a7745-usb-dmac",
337                                      "renesas,usb-dmac";
338                         reg = <0 0xe65a0000 0 0x100>;
339                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
340                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
341                         interrupt-names = "ch0", "ch1";
342                         clocks = <&cpg CPG_MOD 330>;
343                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
344                         resets = <&cpg 330>;
345                         #dma-cells = <1>;
346                         dma-channels = <2>;
347                 };
348
349                 usb_dmac1: dma-controller@e65b0000 {
350                         compatible = "renesas,r8a7745-usb-dmac",
351                                      "renesas,usb-dmac";
352                         reg = <0 0xe65b0000 0 0x100>;
353                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
354                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
355                         interrupt-names = "ch0", "ch1";
356                         clocks = <&cpg CPG_MOD 331>;
357                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
358                         resets = <&cpg 331>;
359                         #dma-cells = <1>;
360                         dma-channels = <2>;
361                 };
362
363                 scifa0: serial@e6c40000 {
364                         compatible = "renesas,scifa-r8a7745",
365                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
366                         reg = <0 0xe6c40000 0 0x40>;
367                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
368                         clocks = <&cpg CPG_MOD 204>;
369                         clock-names = "fck";
370                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
371                                <&dmac1 0x21>, <&dmac1 0x22>;
372                         dma-names = "tx", "rx", "tx", "rx";
373                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
374                         resets = <&cpg 204>;
375                         status = "disabled";
376                 };
377
378                 scifa1: serial@e6c50000 {
379                         compatible = "renesas,scifa-r8a7745",
380                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
381                         reg = <0 0xe6c50000 0 0x40>;
382                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
383                         clocks = <&cpg CPG_MOD 203>;
384                         clock-names = "fck";
385                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
386                                <&dmac1 0x25>, <&dmac1 0x26>;
387                         dma-names = "tx", "rx", "tx", "rx";
388                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
389                         resets = <&cpg 203>;
390                         status = "disabled";
391                 };
392
393                 scifa2: serial@e6c60000 {
394                         compatible = "renesas,scifa-r8a7745",
395                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
396                         reg = <0 0xe6c60000 0 0x40>;
397                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
398                         clocks = <&cpg CPG_MOD 202>;
399                         clock-names = "fck";
400                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
401                                <&dmac1 0x27>, <&dmac1 0x28>;
402                         dma-names = "tx", "rx", "tx", "rx";
403                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
404                         resets = <&cpg 202>;
405                         status = "disabled";
406                 };
407
408                 scifa3: serial@e6c70000 {
409                         compatible = "renesas,scifa-r8a7745",
410                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
411                         reg = <0 0xe6c70000 0 0x40>;
412                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
413                         clocks = <&cpg CPG_MOD 1106>;
414                         clock-names = "fck";
415                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
416                                <&dmac1 0x1b>, <&dmac1 0x1c>;
417                         dma-names = "tx", "rx", "tx", "rx";
418                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
419                         resets = <&cpg 1106>;
420                         status = "disabled";
421                 };
422
423                 scifa4: serial@e6c78000 {
424                         compatible = "renesas,scifa-r8a7745",
425                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
426                         reg = <0 0xe6c78000 0 0x40>;
427                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
428                         clocks = <&cpg CPG_MOD 1107>;
429                         clock-names = "fck";
430                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
431                                <&dmac1 0x1f>, <&dmac1 0x20>;
432                         dma-names = "tx", "rx", "tx", "rx";
433                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
434                         resets = <&cpg 1107>;
435                         status = "disabled";
436                 };
437
438                 scifa5: serial@e6c80000 {
439                         compatible = "renesas,scifa-r8a7745",
440                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
441                         reg = <0 0xe6c80000 0 0x40>;
442                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
443                         clocks = <&cpg CPG_MOD 1108>;
444                         clock-names = "fck";
445                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
446                                <&dmac1 0x23>, <&dmac1 0x24>;
447                         dma-names = "tx", "rx", "tx", "rx";
448                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
449                         resets = <&cpg 1108>;
450                         status = "disabled";
451                 };
452
453                 scifb0: serial@e6c20000 {
454                         compatible = "renesas,scifb-r8a7745",
455                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
456                         reg = <0 0xe6c20000 0 0x100>;
457                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
458                         clocks = <&cpg CPG_MOD 206>;
459                         clock-names = "fck";
460                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
461                                <&dmac1 0x3d>, <&dmac1 0x3e>;
462                         dma-names = "tx", "rx", "tx", "rx";
463                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
464                         resets = <&cpg 206>;
465                         status = "disabled";
466                 };
467
468                 scifb1: serial@e6c30000 {
469                         compatible = "renesas,scifb-r8a7745",
470                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
471                         reg = <0 0xe6c30000 0 0x100>;
472                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
473                         clocks = <&cpg CPG_MOD 207>;
474                         clock-names = "fck";
475                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
476                                <&dmac1 0x19>, <&dmac1 0x1a>;
477                         dma-names = "tx", "rx", "tx", "rx";
478                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
479                         resets = <&cpg 207>;
480                         status = "disabled";
481                 };
482
483                 scifb2: serial@e6ce0000 {
484                         compatible = "renesas,scifb-r8a7745",
485                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
486                         reg = <0 0xe6ce0000 0 0x100>;
487                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
488                         clocks = <&cpg CPG_MOD 216>;
489                         clock-names = "fck";
490                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
491                                <&dmac1 0x1d>, <&dmac1 0x1e>;
492                         dma-names = "tx", "rx", "tx", "rx";
493                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
494                         resets = <&cpg 216>;
495                         status = "disabled";
496                 };
497
498                 scif0: serial@e6e60000 {
499                         compatible = "renesas,scif-r8a7745",
500                                      "renesas,rcar-gen2-scif", "renesas,scif";
501                         reg = <0 0xe6e60000 0 0x40>;
502                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
503                         clocks = <&cpg CPG_MOD 721>,
504                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
505                         clock-names = "fck", "brg_int", "scif_clk";
506                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
507                                <&dmac1 0x29>, <&dmac1 0x2a>;
508                         dma-names = "tx", "rx", "tx", "rx";
509                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
510                         resets = <&cpg 721>;
511                         status = "disabled";
512                 };
513
514                 scif1: serial@e6e68000 {
515                         compatible = "renesas,scif-r8a7745",
516                                      "renesas,rcar-gen2-scif", "renesas,scif";
517                         reg = <0 0xe6e68000 0 0x40>;
518                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
519                         clocks = <&cpg CPG_MOD 720>,
520                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
521                         clock-names = "fck", "brg_int", "scif_clk";
522                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
523                                <&dmac1 0x2d>, <&dmac1 0x2e>;
524                         dma-names = "tx", "rx", "tx", "rx";
525                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
526                         resets = <&cpg 720>;
527                         status = "disabled";
528                 };
529
530                 scif2: serial@e6e58000 {
531                         compatible = "renesas,scif-r8a7745",
532                                      "renesas,rcar-gen2-scif", "renesas,scif";
533                         reg = <0 0xe6e58000 0 0x40>;
534                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
535                         clocks = <&cpg CPG_MOD 719>,
536                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
537                         clock-names = "fck", "brg_int", "scif_clk";
538                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
539                                <&dmac1 0x2b>, <&dmac1 0x2c>;
540                         dma-names = "tx", "rx", "tx", "rx";
541                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
542                         resets = <&cpg 719>;
543                         status = "disabled";
544                 };
545
546                 scif3: serial@e6ea8000 {
547                         compatible = "renesas,scif-r8a7745",
548                                      "renesas,rcar-gen2-scif", "renesas,scif";
549                         reg = <0 0xe6ea8000 0 0x40>;
550                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
551                         clocks = <&cpg CPG_MOD 718>,
552                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
553                         clock-names = "fck", "brg_int", "scif_clk";
554                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
555                                <&dmac1 0x2f>, <&dmac1 0x30>;
556                         dma-names = "tx", "rx", "tx", "rx";
557                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
558                         resets = <&cpg 718>;
559                         status = "disabled";
560                 };
561
562                 scif4: serial@e6ee0000 {
563                         compatible = "renesas,scif-r8a7745",
564                                      "renesas,rcar-gen2-scif", "renesas,scif";
565                         reg = <0 0xe6ee0000 0 0x40>;
566                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
567                         clocks = <&cpg CPG_MOD 715>,
568                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
569                         clock-names = "fck", "brg_int", "scif_clk";
570                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
571                                <&dmac1 0xfb>, <&dmac1 0xfc>;
572                         dma-names = "tx", "rx", "tx", "rx";
573                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
574                         resets = <&cpg 715>;
575                         status = "disabled";
576                 };
577
578                 scif5: serial@e6ee8000 {
579                         compatible = "renesas,scif-r8a7745",
580                                      "renesas,rcar-gen2-scif", "renesas,scif";
581                         reg = <0 0xe6ee8000 0 0x40>;
582                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
583                         clocks = <&cpg CPG_MOD 714>,
584                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
585                         clock-names = "fck", "brg_int", "scif_clk";
586                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
587                                <&dmac1 0xfd>, <&dmac1 0xfe>;
588                         dma-names = "tx", "rx", "tx", "rx";
589                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
590                         resets = <&cpg 714>;
591                         status = "disabled";
592                 };
593
594                 hscif0: serial@e62c0000 {
595                         compatible = "renesas,hscif-r8a7745",
596                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
597                         reg = <0 0xe62c0000 0 0x60>;
598                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
599                         clocks = <&cpg CPG_MOD 717>,
600                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
601                         clock-names = "fck", "brg_int", "scif_clk";
602                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
603                                <&dmac1 0x39>, <&dmac1 0x3a>;
604                         dma-names = "tx", "rx", "tx", "rx";
605                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
606                         resets = <&cpg 717>;
607                         status = "disabled";
608                 };
609
610                 hscif1: serial@e62c8000 {
611                         compatible = "renesas,hscif-r8a7745",
612                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
613                         reg = <0 0xe62c8000 0 0x60>;
614                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
615                         clocks = <&cpg CPG_MOD 716>,
616                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
617                         clock-names = "fck", "brg_int", "scif_clk";
618                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
619                                <&dmac1 0x4d>, <&dmac1 0x4e>;
620                         dma-names = "tx", "rx", "tx", "rx";
621                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
622                         resets = <&cpg 716>;
623                         status = "disabled";
624                 };
625
626                 hscif2: serial@e62d0000 {
627                         compatible = "renesas,hscif-r8a7745",
628                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
629                         reg = <0 0xe62d0000 0 0x60>;
630                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
631                         clocks = <&cpg CPG_MOD 713>,
632                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
633                         clock-names = "fck", "brg_int", "scif_clk";
634                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
635                                <&dmac1 0x3b>, <&dmac1 0x3c>;
636                         dma-names = "tx", "rx", "tx", "rx";
637                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
638                         resets = <&cpg 713>;
639                         status = "disabled";
640                 };
641
642                 icram2: sram@e6300000 {
643                         compatible = "mmio-sram";
644                         reg = <0 0xe6300000 0 0x40000>;
645                 };
646
647                 icram0: sram@e63a0000 {
648                         compatible = "mmio-sram";
649                         reg = <0 0xe63a0000 0 0x12000>;
650                 };
651
652                 icram1: sram@e63c0000 {
653                         compatible = "mmio-sram";
654                         reg = <0 0xe63c0000 0 0x1000>;
655                         #address-cells = <1>;
656                         #size-cells = <1>;
657                         ranges = <0 0 0xe63c0000 0x1000>;
658
659                         smp-sram@0 {
660                                 compatible = "renesas,smp-sram";
661                                 reg = <0 0x10>;
662                         };
663                 };
664
665                 ether: ethernet@ee700000 {
666                         compatible = "renesas,ether-r8a7745",
667                                      "renesas,rcar-gen2-ether";
668                         reg = <0 0xee700000 0 0x400>;
669                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
670                         clocks = <&cpg CPG_MOD 813>;
671                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
672                         resets = <&cpg 813>;
673                         phy-mode = "rmii";
674                         #address-cells = <1>;
675                         #size-cells = <0>;
676                         status = "disabled";
677                 };
678
679                 avb: ethernet@e6800000 {
680                         compatible = "renesas,etheravb-r8a7745",
681                                      "renesas,etheravb-rcar-gen2";
682                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
683                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
684                         clocks = <&cpg CPG_MOD 812>;
685                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
686                         resets = <&cpg 812>;
687                         #address-cells = <1>;
688                         #size-cells = <0>;
689                         status = "disabled";
690                 };
691
692                 i2c0: i2c@e6508000 {
693                         #address-cells = <1>;
694                         #size-cells = <0>;
695                         compatible = "renesas,i2c-r8a7745",
696                                      "renesas,rcar-gen2-i2c";
697                         reg = <0 0xe6508000 0 0x40>;
698                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
699                         clocks = <&cpg CPG_MOD 931>;
700                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
701                         resets = <&cpg 931>;
702                         i2c-scl-internal-delay-ns = <6>;
703                         status = "disabled";
704                 };
705
706                 i2c1: i2c@e6518000 {
707                         #address-cells = <1>;
708                         #size-cells = <0>;
709                         compatible = "renesas,i2c-r8a7745",
710                                      "renesas,rcar-gen2-i2c";
711                         reg = <0 0xe6518000 0 0x40>;
712                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
713                         clocks = <&cpg CPG_MOD 930>;
714                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
715                         resets = <&cpg 930>;
716                         i2c-scl-internal-delay-ns = <6>;
717                         status = "disabled";
718                 };
719
720                 i2c2: i2c@e6530000 {
721                         #address-cells = <1>;
722                         #size-cells = <0>;
723                         compatible = "renesas,i2c-r8a7745",
724                                      "renesas,rcar-gen2-i2c";
725                         reg = <0 0xe6530000 0 0x40>;
726                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
727                         clocks = <&cpg CPG_MOD 929>;
728                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
729                         resets = <&cpg 929>;
730                         i2c-scl-internal-delay-ns = <6>;
731                         status = "disabled";
732                 };
733
734                 i2c3: i2c@e6540000 {
735                         #address-cells = <1>;
736                         #size-cells = <0>;
737                         compatible = "renesas,i2c-r8a7745",
738                                      "renesas,rcar-gen2-i2c";
739                         reg = <0 0xe6540000 0 0x40>;
740                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
741                         clocks = <&cpg CPG_MOD 928>;
742                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
743                         resets = <&cpg 928>;
744                         i2c-scl-internal-delay-ns = <6>;
745                         status = "disabled";
746                 };
747
748                 i2c4: i2c@e6520000 {
749                         #address-cells = <1>;
750                         #size-cells = <0>;
751                         compatible = "renesas,i2c-r8a7745",
752                                      "renesas,rcar-gen2-i2c";
753                         reg = <0 0xe6520000 0 0x40>;
754                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
755                         clocks = <&cpg CPG_MOD 927>;
756                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
757                         resets = <&cpg 927>;
758                         i2c-scl-internal-delay-ns = <6>;
759                         status = "disabled";
760                 };
761
762                 i2c5: i2c@e6528000 {
763                         #address-cells = <1>;
764                         #size-cells = <0>;
765                         compatible = "renesas,i2c-r8a7745",
766                                      "renesas,rcar-gen2-i2c";
767                         reg = <0 0xe6528000 0 0x40>;
768                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
769                         clocks = <&cpg CPG_MOD 925>;
770                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
771                         resets = <&cpg 925>;
772                         i2c-scl-internal-delay-ns = <6>;
773                         status = "disabled";
774                 };
775
776                 iic0: i2c@e6500000 {
777                         #address-cells = <1>;
778                         #size-cells = <0>;
779                         compatible = "renesas,iic-r8a7745",
780                                      "renesas,rcar-gen2-iic",
781                                      "renesas,rmobile-iic";
782                         reg = <0 0xe6500000 0 0x425>;
783                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
784                         clocks = <&cpg CPG_MOD 318>;
785                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
786                                <&dmac1 0x61>, <&dmac1 0x62>;
787                         dma-names = "tx", "rx", "tx", "rx";
788                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
789                         resets = <&cpg 318>;
790                         status = "disabled";
791                 };
792
793                 iic1: i2c@e6510000 {
794                         #address-cells = <1>;
795                         #size-cells = <0>;
796                         compatible = "renesas,iic-r8a7745",
797                                      "renesas,rcar-gen2-iic",
798                                      "renesas,rmobile-iic";
799                         reg = <0 0xe6510000 0 0x425>;
800                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
801                         clocks = <&cpg CPG_MOD 323>;
802                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
803                                <&dmac1 0x65>, <&dmac1 0x66>;
804                         dma-names = "tx", "rx", "tx", "rx";
805                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
806                         resets = <&cpg 323>;
807                         status = "disabled";
808                 };
809
810                 mmcif0: mmc@ee200000 {
811                         compatible = "renesas,mmcif-r8a7745",
812                                      "renesas,sh-mmcif";
813                         reg = <0 0xee200000 0 0x80>;
814                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
815                         clocks = <&cpg CPG_MOD 315>;
816                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
817                                <&dmac1 0xd1>, <&dmac1 0xd2>;
818                         dma-names = "tx", "rx", "tx", "rx";
819                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
820                         resets = <&cpg 315>;
821                         reg-io-width = <4>;
822                         max-frequency = <97500000>;
823                         status = "disabled";
824                 };
825
826                 qspi: spi@e6b10000 {
827                         compatible = "renesas,qspi-r8a7745", "renesas,qspi";
828                         reg = <0 0xe6b10000 0 0x2c>;
829                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
830                         clocks = <&cpg CPG_MOD 917>;
831                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
832                                <&dmac1 0x17>, <&dmac1 0x18>;
833                         dma-names = "tx", "rx", "tx", "rx";
834                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
835                         num-cs = <1>;
836                         #address-cells = <1>;
837                         #size-cells = <0>;
838                         resets = <&cpg 917>;
839                         status = "disabled";
840                 };
841
842                 vin0: video@e6ef0000 {
843                         compatible = "renesas,vin-r8a7745",
844                                      "renesas,rcar-gen2-vin";
845                         reg = <0 0xe6ef0000 0 0x1000>;
846                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
847                         clocks = <&cpg CPG_MOD 811>;
848                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
849                         resets = <&cpg 811>;
850                         status = "disabled";
851                 };
852
853                 vin1: video@e6ef1000 {
854                         compatible = "renesas,vin-r8a7745",
855                                      "renesas,rcar-gen2-vin";
856                         reg = <0 0xe6ef1000 0 0x1000>;
857                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
858                         clocks = <&cpg CPG_MOD 810>;
859                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
860                         resets = <&cpg 810>;
861                         status = "disabled";
862                 };
863
864                 du: display@feb00000 {
865                         compatible = "renesas,du-r8a7745";
866                         reg = <0 0xfeb00000 0 0x40000>;
867                         reg-names = "du";
868                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
869                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
870                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
871                         clock-names = "du.0", "du.1";
872                         status = "disabled";
873
874                         ports {
875                                 #address-cells = <1>;
876                                 #size-cells = <0>;
877
878                                 port@0 {
879                                         reg = <0>;
880                                         du_out_rgb0: endpoint {
881                                         };
882                                 };
883                                 port@1 {
884                                         reg = <1>;
885                                         du_out_rgb1: endpoint {
886                                         };
887                                 };
888                         };
889                 };
890
891                 msiof0: spi@e6e20000 {
892                         compatible = "renesas,msiof-r8a7745",
893                                      "renesas,rcar-gen2-msiof";
894                         reg = <0 0xe6e20000 0 0x0064>;
895                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
896                         clocks = <&cpg CPG_MOD 000>;
897                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
898                                <&dmac1 0x51>, <&dmac1 0x52>;
899                         dma-names = "tx", "rx", "tx", "rx";
900                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
901                         #address-cells = <1>;
902                         #size-cells = <0>;
903                         resets = <&cpg 000>;
904                         status = "disabled";
905                 };
906
907                 msiof1: spi@e6e10000 {
908                         compatible = "renesas,msiof-r8a7745",
909                                      "renesas,rcar-gen2-msiof";
910                         reg = <0 0xe6e10000 0 0x0064>;
911                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
912                         clocks = <&cpg CPG_MOD 208>;
913                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
914                                <&dmac1 0x55>, <&dmac1 0x56>;
915                         dma-names = "tx", "rx", "tx", "rx";
916                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
917                         #address-cells = <1>;
918                         #size-cells = <0>;
919                         resets = <&cpg 208>;
920                         status = "disabled";
921                 };
922
923                 msiof2: spi@e6e00000 {
924                         compatible = "renesas,msiof-r8a7745",
925                                      "renesas,rcar-gen2-msiof";
926                         reg = <0 0xe6e00000 0 0x0064>;
927                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
928                         clocks = <&cpg CPG_MOD 205>;
929                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
930                                <&dmac1 0x41>, <&dmac1 0x42>;
931                         dma-names = "tx", "rx", "tx", "rx";
932                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
933                         #address-cells = <1>;
934                         #size-cells = <0>;
935                         resets = <&cpg 205>;
936                         status = "disabled";
937                 };
938
939                 sdhi0: sd@ee100000 {
940                         compatible = "renesas,sdhi-r8a7745",
941                                      "renesas,rcar-gen2-sdhi";
942                         reg = <0 0xee100000 0 0x328>;
943                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
944                         clocks = <&cpg CPG_MOD 314>;
945                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
946                                <&dmac1 0xcd>, <&dmac1 0xce>;
947                         dma-names = "tx", "rx", "tx", "rx";
948                         max-frequency = <195000000>;
949                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
950                         resets = <&cpg 314>;
951                         status = "disabled";
952                 };
953
954                 sdhi1: sd@ee140000 {
955                         compatible = "renesas,sdhi-r8a7745",
956                                      "renesas,rcar-gen2-sdhi";
957                         reg = <0 0xee140000 0 0x100>;
958                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
959                         clocks = <&cpg CPG_MOD 312>;
960                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
961                                <&dmac1 0xc1>, <&dmac1 0xc2>;
962                         dma-names = "tx", "rx", "tx", "rx";
963                         max-frequency = <97500000>;
964                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
965                         resets = <&cpg 312>;
966                         status = "disabled";
967                 };
968
969                 sdhi2: sd@ee160000 {
970                         compatible = "renesas,sdhi-r8a7745",
971                                      "renesas,rcar-gen2-sdhi";
972                         reg = <0 0xee160000 0 0x100>;
973                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
974                         clocks = <&cpg CPG_MOD 311>;
975                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
976                                <&dmac1 0xd3>, <&dmac1 0xd4>;
977                         dma-names = "tx", "rx", "tx", "rx";
978                         max-frequency = <97500000>;
979                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
980                         resets = <&cpg 311>;
981                         status = "disabled";
982                 };
983
984                 pci0: pci@ee090000 {
985                         compatible = "renesas,pci-r8a7745",
986                                      "renesas,pci-rcar-gen2";
987                         device_type = "pci";
988                         reg = <0 0xee090000 0 0xc00>,
989                               <0 0xee080000 0 0x1100>;
990                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
991                         clocks = <&cpg CPG_MOD 703>;
992                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
993                         resets = <&cpg 703>;
994                         status = "disabled";
995
996                         bus-range = <0 0>;
997                         #address-cells = <3>;
998                         #size-cells = <2>;
999                         #interrupt-cells = <1>;
1000                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1001                         interrupt-map-mask = <0xff00 0 0 0x7>;
1002                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1003                                          0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1004                                          0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1005
1006                         usb@1,0 {
1007                                 reg = <0x800 0 0 0 0>;
1008                                 phys = <&usb0 0>;
1009                                 phy-names = "usb";
1010                         };
1011
1012                         usb@2,0 {
1013                                 reg = <0x1000 0 0 0 0>;
1014                                 phys = <&usb0 0>;
1015                                 phy-names = "usb";
1016                         };
1017                 };
1018
1019                 pci1: pci@ee0d0000 {
1020                         compatible = "renesas,pci-r8a7745",
1021                                      "renesas,pci-rcar-gen2";
1022                         device_type = "pci";
1023                         reg = <0 0xee0d0000 0 0xc00>,
1024                               <0 0xee0c0000 0 0x1100>;
1025                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1026                         clocks = <&cpg CPG_MOD 703>;
1027                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1028                         resets = <&cpg 703>;
1029                         status = "disabled";
1030
1031                         bus-range = <1 1>;
1032                         #address-cells = <3>;
1033                         #size-cells = <2>;
1034                         #interrupt-cells = <1>;
1035                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1036                         interrupt-map-mask = <0xff00 0 0 0x7>;
1037                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1038                                          0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1039                                          0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1040
1041                         usb@1,0 {
1042                                 reg = <0x10800 0 0 0 0>;
1043                                 phys = <&usb2 0>;
1044                                 phy-names = "usb";
1045                         };
1046
1047                         usb@2,0 {
1048                                 reg = <0x11000 0 0 0 0>;
1049                                 phys = <&usb2 0>;
1050                                 phy-names = "usb";
1051                         };
1052                 };
1053
1054                 hsusb: usb@e6590000 {
1055                         compatible = "renesas,usbhs-r8a7745",
1056                                      "renesas,rcar-gen2-usbhs";
1057                         reg = <0 0xe6590000 0 0x100>;
1058                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1059                         clocks = <&cpg CPG_MOD 704>;
1060                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1061                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1062                         dma-names = "ch0", "ch1", "ch2", "ch3";
1063                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1064                         resets = <&cpg 704>;
1065                         renesas,buswait = <4>;
1066                         phys = <&usb0 1>;
1067                         phy-names = "usb";
1068                         status = "disabled";
1069                 };
1070
1071                 usbphy: usb-phy@e6590100 {
1072                         compatible = "renesas,usb-phy-r8a7745",
1073                                      "renesas,rcar-gen2-usb-phy";
1074                         reg = <0 0xe6590100 0 0x100>;
1075                         #address-cells = <1>;
1076                         #size-cells = <0>;
1077                         clocks = <&cpg CPG_MOD 704>;
1078                         clock-names = "usbhs";
1079                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1080                         resets = <&cpg 704>;
1081                         status = "disabled";
1082
1083                         usb0: usb-channel@0 {
1084                                 reg = <0>;
1085                                 #phy-cells = <1>;
1086                         };
1087                         usb2: usb-channel@2 {
1088                                 reg = <2>;
1089                                 #phy-cells = <1>;
1090                         };
1091                 };
1092
1093                 can0: can@e6e80000 {
1094                         compatible = "renesas,can-r8a7745",
1095                                      "renesas,rcar-gen2-can";
1096                         reg = <0 0xe6e80000 0 0x1000>;
1097                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1098                         clocks = <&cpg CPG_MOD 916>,
1099                                  <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1100                                  <&can_clk>;
1101                         clock-names = "clkp1", "clkp2", "can_clk";
1102                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1103                         resets = <&cpg 916>;
1104                         status = "disabled";
1105                 };
1106
1107                 can1: can@e6e88000 {
1108                         compatible = "renesas,can-r8a7745",
1109                                      "renesas,rcar-gen2-can";
1110                         reg = <0 0xe6e88000 0 0x1000>;
1111                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1112                         clocks = <&cpg CPG_MOD 915>,
1113                                  <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1114                                  <&can_clk>;
1115                         clock-names = "clkp1", "clkp2", "can_clk";
1116                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
1117                         resets = <&cpg 915>;
1118                         status = "disabled";
1119                 };
1120         };
1121
1122         /* External root clock */
1123         extal_clk: extal {
1124                 compatible = "fixed-clock";
1125                 #clock-cells = <0>;
1126                 /* This value must be overridden by the board. */
1127                 clock-frequency = <0>;
1128         };
1129
1130         /* External USB clock - can be overridden by the board */
1131         usb_extal_clk: usb_extal {
1132                 compatible = "fixed-clock";
1133                 #clock-cells = <0>;
1134                 clock-frequency = <48000000>;
1135         };
1136
1137         /* External CAN clock */
1138         can_clk: can {
1139                 compatible = "fixed-clock";
1140                 #clock-cells = <0>;
1141                 /* This value must be overridden by the board. */
1142                 clock-frequency = <0>;
1143         };
1144
1145         /* External SCIF clock */
1146         scif_clk: scif {
1147                 compatible = "fixed-clock";
1148                 #clock-cells = <0>;
1149                 /* This value must be overridden by the board. */
1150                 clock-frequency = <0>;
1151         };
1152 };