2 * Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x)
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include "omap3-igep.dtsi"
13 #include "omap-gpmc-smsc911x.dtsi"
16 model = "IGEPv2 (TI OMAP AM/DM37x)";
17 compatible = "isee,omap3-igep0020", "ti,omap3";
20 pinctrl-names = "default";
21 pinctrl-0 = <&leds_pins>;
22 compatible = "gpio-leds";
25 label = "omap3:green:boot";
26 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
31 label = "omap3:red:user0";
32 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
33 default-state = "off";
37 label = "omap3:red:user1";
38 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
39 default-state = "off";
43 label = "omap3:green:user1";
44 gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
48 /* HS USB Port 1 Power */
49 hsusb1_power: hsusb1_power_reg {
50 compatible = "regulator-fixed";
51 regulator-name = "hsusb1_vbus";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */
55 startup-delay-us = <70000>;
58 /* HS USB Host PHY on PORT 1 */
59 hsusb1_phy: hsusb1_phy {
60 compatible = "usb-nop-xceiv";
61 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
62 vcc-supply = <&hsusb1_power>;
67 pinctrl-names = "default";
74 hsusbb1_pins: pinmux_hsusbb1_pins {
75 pinctrl-single,pins = <
76 0x5aa (PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
77 0x5a8 (PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
78 0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */
79 0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */
80 0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */
81 0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */
82 0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */
83 0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */
84 0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */
85 0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */
86 0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */
87 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
91 tfp410_pins: tfp410_dvi_pins {
92 pinctrl-single,pins = <
93 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
97 dss_pins: pinmux_dss_dvi_pins {
98 pinctrl-single,pins = <
99 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
100 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
101 0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
102 0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
103 0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
104 0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
105 0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
106 0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
107 0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
108 0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
109 0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
110 0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
111 0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
112 0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
113 0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
114 0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
115 0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
116 0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
117 0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
118 0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
119 0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
120 0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
121 0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
122 0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
123 0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
124 0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
125 0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
126 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
132 pinctrl-single,pins = <
133 0x5c4 (PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
134 0x5c6 (PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
135 0x5c8 (PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
140 clock-frequency = <100000>;
143 * Display monitor features are burnt in the EEPROM
147 compatible = "ti,eeprom";
153 ranges = <0 0 0x00000000 0x20000000>,
154 <5 0 0x2c000000 0x01000000>;
157 linux,mtd-name= "micron,mt29c4g96maz";
159 nand-bus-width = <16>;
160 ti,nand-ecc-opt = "bch8";
162 gpmc,sync-clk-ps = <0>;
164 gpmc,cs-rd-off-ns = <44>;
165 gpmc,cs-wr-off-ns = <44>;
166 gpmc,adv-on-ns = <6>;
167 gpmc,adv-rd-off-ns = <34>;
168 gpmc,adv-wr-off-ns = <44>;
169 gpmc,we-off-ns = <40>;
170 gpmc,oe-off-ns = <54>;
171 gpmc,access-ns = <64>;
172 gpmc,rd-cycle-ns = <82>;
173 gpmc,wr-cycle-ns = <82>;
174 gpmc,wr-access-ns = <40>;
175 gpmc,wr-data-mux-bus-ns = <0>;
177 #address-cells = <1>;
186 reg = <0x100000 0x180000>;
189 label = "Environment";
190 reg = <0x280000 0x100000>;
194 reg = <0x380000 0x300000>;
197 label = "Filesystem";
198 reg = <0x680000 0x1f980000>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&smsc911x_pins>;
206 interrupt-parent = <&gpio6>;
207 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
212 port1-mode = "ehci-phy";
216 phys = <&hsusb1_phy>;
221 regulator-name = "vdds_dsi";