arch/arm/boot/dts/keystone.dtsi

   1 /*
   2  * Copyright 2013 Texas Instruments, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/gpio/gpio.h>
  11
  12 #include "skeleton.dtsi"
  13
  14 / {
  15         model = "Texas Instruments Keystone 2 SoC";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18         interrupt-parent = <&gic>;
  19
  20         aliases {
  21                 serial0 = &uart0;
  22         };
  23
  24         memory {
  25                 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
  26         };
  27
  28         gic: interrupt-controller {
  29                 compatible = "arm,cortex-a15-gic";
  30                 #interrupt-cells = <3>;
  31                 #size-cells = <0>;
  32                 #address-cells = <1>;
  33                 interrupt-controller;
  34                 reg = <0x0 0x02561000 0x0 0x1000>,
  35                       <0x0 0x02562000 0x0 0x2000>,
  36                       <0x0 0x02564000 0x0 0x1000>,
  37                       <0x0 0x02566000 0x0 0x2000>;
  38                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  39                                 IRQ_TYPE_LEVEL_HIGH)>;
  40         };
  41
  42         timer {
  43                 compatible = "arm,armv7-timer";
  44                 interrupts =
  45                         <GIC_PPI 13
  46                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  47                         <GIC_PPI 14
  48                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  49                         <GIC_PPI 11
  50                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  51                         <GIC_PPI 10
  52                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  53         };
  54
  55         pmu {
  56                 compatible = "arm,cortex-a15-pmu";
  57                 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
  58                              <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
  59                              <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
  60                              <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
  61         };
  62
  63         soc {
  64                 #address-cells = <1>;
  65                 #size-cells = <1>;
  66                 compatible = "ti,keystone","simple-bus";
  67                 interrupt-parent = <&gic>;
  68                 ranges = <0x0 0x0 0x0 0xc0000000>;
  69
  70                 pllctrl: pll-controller@02310000 {
  71                         compatible = "ti,keystone-pllctrl", "syscon";
  72                         reg = <0x02310000 0x200>;
  73                 };
  74
  75                 devctrl: device-state-control@02620000 {
  76                         compatible = "ti,keystone-devctrl", "syscon";
  77                         reg = <0x02620000 0x1000>;
  78                 };
  79
  80                 rstctrl: reset-controller {
  81                         compatible = "ti,keystone-reset";
  82                         ti,syscon-pll = <&pllctrl 0xe4>;
  83                         ti,syscon-dev = <&devctrl 0x328>;
  84                         ti,wdt-list = <0>;
  85                 };
  86
  87                 /include/ "keystone-clocks.dtsi"
  88
  89                 uart0: serial@02530c00 {
  90                         compatible = "ns16550a";
  91                         current-speed = <115200>;
  92                         reg-shift = <2>;
  93                         reg-io-width = <4>;
  94                         reg = <0x02530c00 0x100>;
  95                         clocks  = <&clkuart0>;
  96                         interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
  97                 };
  98
  99                 uart1:  serial@02531000 {
 100                         compatible = "ns16550a";
 101                         current-speed = <115200>;
 102                         reg-shift = <2>;
 103                         reg-io-width = <4>;
 104                         reg = <0x02531000 0x100>;
 105                         clocks  = <&clkuart1>;
 106                         interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
 107                 };
 108
 109                 i2c0: i2c@2530000 {
 110                         compatible = "ti,davinci-i2c";
 111                         reg = <0x02530000 0x400>;
 112                         clock-frequency = <100000>;
 113                         clocks = <&clki2c>;
 114                         interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
 115                         #address-cells = <1>;
 116                         #size-cells = <0>;
 117
 118                         dtt@50 {
 119                                 compatible = "at,24c1024";
 120                                 reg = <0x50>;
 121                         };
 122                 };
 123
 124                 i2c1: i2c@2530400 {
 125                         compatible = "ti,davinci-i2c";
 126                         reg = <0x02530400 0x400>;
 127                         clock-frequency = <100000>;
 128                         clocks = <&clki2c>;
 129                         interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
 130                 };
 131
 132                 i2c2: i2c@2530800 {
 133                         compatible = "ti,davinci-i2c";
 134                         reg = <0x02530800 0x400>;
 135                         clock-frequency = <100000>;
 136                         clocks = <&clki2c>;
 137                         interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
 138                 };
 139
 140                 spi0: spi@21000400 {
 141                         compatible = "ti,dm6441-spi";
 142                         reg = <0x21000400 0x200>;
 143                         num-cs = <4>;
 144                         ti,davinci-spi-intr-line = <0>;
 145                         interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
 146                         clocks = <&clkspi>;
 147                 };
 148
 149                 spi1: spi@21000600 {
 150                         compatible = "ti,dm6441-spi";
 151                         reg = <0x21000600 0x200>;
 152                         num-cs = <4>;
 153                         ti,davinci-spi-intr-line = <0>;
 154                         interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
 155                         clocks = <&clkspi>;
 156                 };
 157
 158                 spi2: spi@21000800 {
 159                         compatible = "ti,dm6441-spi";
 160                         reg = <0x21000800 0x200>;
 161                         num-cs = <4>;
 162                         ti,davinci-spi-intr-line = <0>;
 163                         interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
 164                         clocks = <&clkspi>;
 165                 };
 166
 167                 usb_phy: usb_phy@2620738 {
 168                         compatible = "ti,keystone-usbphy";
 169                         #address-cells = <1>;
 170                         #size-cells = <1>;
 171                         reg = <0x2620738 32>;
 172                         status = "disabled";
 173                 };
 174
 175                 usb: usb@2680000 {
 176                         compatible = "ti,keystone-dwc3";
 177                         #address-cells = <1>;
 178                         #size-cells = <1>;
 179                         reg = <0x2680000 0x10000>;
 180                         clocks = <&clkusb>;
 181                         clock-names = "usb";
 182                         interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
 183                         ranges;
 184                         status = "disabled";
 185
 186                         dwc3@2690000 {
 187                                 compatible = "synopsys,dwc3";
 188                                 reg = <0x2690000 0x70000>;
 189                                 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
 190                                 usb-phy = <&usb_phy>, <&usb_phy>;
 191                         };
 192                 };
 193
 194                 wdt: wdt@022f0080 {
 195                         compatible = "ti,keystone-wdt","ti,davinci-wdt";
 196                         reg = <0x022f0080 0x80>;
 197                         clocks = <&clkwdtimer0>;
 198                 };
 199
 200                 clock_event: timer@22f0000 {
 201                         compatible = "ti,keystone-timer";
 202                         reg = <0x022f0000 0x80>;
 203                         interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
 204                         clocks = <&clktimer15>;
 205                 };
 206
 207                 gpio0: gpio@260bf00 {
 208                         compatible = "ti,keystone-gpio";
 209                         reg = <0x0260bf00 0x100>;
 210                         gpio-controller;
 211                         #gpio-cells = <2>;
 212                         /* HW Interrupts mapped to GPIO pins */
 213                         interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
 214                                         <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
 215                                         <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
 216                                         <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
 217                                         <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
 218                                         <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
 219                                         <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
 220                                         <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
 221                                         <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
 222                                         <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
 223                                         <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
 224                                         <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
 225                                         <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
 226                                         <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
 227                                         <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
 228                                         <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
 229                                         <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
 230                                         <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
 231                                         <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
 232                                         <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
 233                                         <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
 234                                         <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
 235                                         <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
 236                                         <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
 237                                         <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
 238                                         <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
 239                                         <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
 240                                         <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
 241                                         <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
 242                                         <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
 243                                         <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
 244                                         <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
 245                         clocks = <&clkgpio>;
 246                         clock-names = "gpio";
 247                         ti,ngpio = <32>;
 248                         ti,davinci-gpio-unbanked = <32>;
 249                 };
 250
 251                 aemif: aemif@21000A00 {
 252                         compatible = "ti,keystone-aemif", "ti,davinci-aemif";
 253                         #address-cells = <2>;
 254                         #size-cells = <1>;
 255                         clocks = <&clkaemif>;
 256                         clock-names = "aemif";
 257                         clock-ranges;
 258
 259                         reg = <0x21000A00 0x00000100>;
 260                         ranges = <0 0 0x30000000 0x10000000
 261                                   1 0 0x21000A00 0x00000100>;
 262                 };
 263         };
 264 };