2 * Copyright 2014-2016 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/input/input.h>
44 #include <dt-bindings/interrupt-controller/irq.h>
45 #include <dt-bindings/pwm/pwm.h>
52 lcdif_23bit_pins_a = &pinctrl_disp0_1;
53 lcdif_24bit_pins_a = &pinctrl_disp0_2;
56 reg_can_xcvr = ®_can_xcvr;
64 reg = <0 0>; /* will be filled by U-Boot */
72 compatible = "fixed-clock";
75 clock-frequency = <26000000>;
80 compatible = "gpio-keys";
83 label = "Power Button";
84 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
85 linux,code = <KEY_POWER>;
91 compatible = "gpio-leds";
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_user_led>;
97 gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
98 linux,default-trigger = "heartbeat";
102 reg_3v3_etn: regulator-3v3-etn {
103 compatible = "regulator-fixed";
104 regulator-name = "3V3_ETN";
105 regulator-min-microvolt = <3300000>;
106 regulator-max-microvolt = <3300000>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_etnphy_power>;
109 gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
113 reg_2v5: regulator-2v5 {
114 compatible = "regulator-fixed";
115 regulator-name = "2V5";
116 regulator-min-microvolt = <2500000>;
117 regulator-max-microvolt = <2500000>;
121 reg_3v3: regulator-3v3 {
122 compatible = "regulator-fixed";
123 regulator-name = "3V3";
124 regulator-min-microvolt = <3300000>;
125 regulator-max-microvolt = <3300000>;
129 reg_can_xcvr: regulator-can-xcvr {
130 compatible = "regulator-fixed";
131 regulator-name = "CAN XCVR";
132 regulator-min-microvolt = <3300000>;
133 regulator-max-microvolt = <3300000>;
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_flexcan_xcvr>;
136 gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
139 reg_lcd0_pwr: regulator-lcd0-pwr {
140 compatible = "regulator-fixed";
141 regulator-name = "LCD0 POWER";
142 regulator-min-microvolt = <3300000>;
143 regulator-max-microvolt = <3300000>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_lcd0_pwr>;
146 gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
151 reg_lcd1_pwr: regulator-lcd1-pwr {
152 compatible = "regulator-fixed";
153 regulator-name = "LCD1 POWER";
154 regulator-min-microvolt = <3300000>;
155 regulator-max-microvolt = <3300000>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_lcd1_pwr>;
158 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
163 reg_usbh1_vbus: regulator-usbh1-vbus {
164 compatible = "regulator-fixed";
165 regulator-name = "usbh1_vbus";
166 regulator-min-microvolt = <5000000>;
167 regulator-max-microvolt = <5000000>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_usbh1_vbus>;
170 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
174 reg_usbotg_vbus: regulator-usbotg-vbus {
175 compatible = "regulator-fixed";
176 regulator-name = "usbotg_vbus";
177 regulator-min-microvolt = <5000000>;
178 regulator-max-microvolt = <5000000>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_usbotg_vbus>;
181 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
186 compatible = "karo,imx6qdl-tx6qdl-sgtl5000",
187 "fsl,imx-audio-sgtl5000";
188 model = "sgtl5000-audio";
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_audmux>;
191 ssi-controller = <&ssi1>;
192 audio-codec = <&sgtl5000>;
194 "MIC_IN", "Mic Jack",
195 "Mic Jack", "Mic Bias",
196 "Headphone Jack", "HP_OUT";
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_flexcan1>;
209 xceiver-supply = <®_can_xcvr>;
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_flexcan2>;
216 xceiver-supply = <®_can_xcvr>;
221 pinctrl-names = "default";
222 pinctrl-0 = <&pinctrl_ecspi1>;
224 &gpio2 30 GPIO_ACTIVE_HIGH
225 &gpio3 19 GPIO_ACTIVE_HIGH
230 compatible = "spidev";
232 spi-max-frequency = <54000000>;
236 compatible = "spidev";
238 spi-max-frequency = <54000000>;
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_enet>;
245 clocks = <&clks IMX6QDL_CLK_ENET>,
246 <&clks IMX6QDL_CLK_ENET>,
247 <&clks IMX6QDL_CLK_ENET_REF>,
248 <&clks IMX6QDL_CLK_ENET_REF>;
249 clock-names = "ipg", "ahb", "ptp", "enet_out";
251 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
252 phy-handle = <&etnphy>;
253 phy-supply = <®_3v3_etn>;
257 #address-cells = <1>;
260 etnphy: ethernet-phy@0 {
261 compatible = "ethernet-phy-ieee802.3-c22";
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_enet_mdio>;
265 interrupts-extended = <&gpio7 1 IRQ_TYPE_EDGE_FALLING>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_gpmi_nand>;
274 fsl,no-blockmark-swap;
279 pinctrl-names = "default";
280 pinctrl-0 = <&pinctrl_i2c1>;
281 clock-frequency = <400000>;
285 compatible = "dallas,ds1339";
291 pinctrl-names = "default";
292 pinctrl-0 = <&pinctrl_i2c3>;
293 clock-frequency = <400000>;
296 sgtl5000: sgtl5000@0a {
297 compatible = "fsl,sgtl5000";
299 VDDA-supply = <®_2v5>;
300 VDDIO-supply = <®_3v3>;
304 polytouch: edt-ft5x06@38 {
305 compatible = "edt,edt-ft5x06";
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_edt_ft5x06>;
309 interrupt-parent = <&gpio6>;
310 interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
311 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
312 wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
316 touchscreen: tsc2007@48 {
317 compatible = "ti,tsc2007";
319 pinctrl-names = "default";
320 pinctrl-0 = <&pinctrl_tsc2007>;
321 interrupt-parent = <&gpio3>;
323 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
324 ti,x-plate-ohms = <660>;
330 pinctrl-names = "default";
331 pinctrl-0 = <&pinctrl_hog>;
333 pinctrl_hog: hoggrp {
335 MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */
336 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT */
337 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */
341 pinctrl_audmux: audmuxgrp {
343 MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x130b0 /* SSI1_RXD */
344 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0 /* SSI1_TXD */
345 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 /* SSI1_CLK */
346 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 /* SSI1_FS */
350 pinctrl_disp0_1: disp0grp-1 {
352 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
353 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
354 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
355 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
356 /* PAD DISP0_DAT0 is used for the Flexcan transceiver control */
357 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
358 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
359 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
360 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
361 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
362 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
363 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
364 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
365 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
366 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
367 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
368 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
369 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
370 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
371 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
372 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
373 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
374 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
375 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
376 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
377 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
378 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
379 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
383 pinctrl_disp0_2: disp0grp-2 {
385 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
386 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
387 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
388 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
389 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
390 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
391 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
392 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
393 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
394 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
395 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
396 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
397 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
398 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
399 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
400 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
401 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
402 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
403 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
404 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
405 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
406 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
407 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
408 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
409 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
410 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
411 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
412 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
416 pinctrl_ecspi1: ecspi1grp {
418 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x0b0b0
419 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x0b0b0
420 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x0b0b0
421 MX6QDL_PAD_GPIO_19__ECSPI1_RDY 0x0b0b0
422 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x0b0b0 /* SPI CS0 */
423 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x0b0b0 /* SPI CS1 */
427 pinctrl_edt_ft5x06: edt-ft5x06grp {
429 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Interrupt */
430 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b0 /* Reset */
431 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0 /* Wake */
435 pinctrl_enet: enetgrp {
437 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
438 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
439 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
440 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
441 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
442 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
443 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
447 pinctrl_enet_mdio: enet-mdiogrp {
449 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
450 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
454 pinctrl_etnphy_power: etnphy-pwrgrp {
456 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */
460 pinctrl_flexcan1: flexcan1grp {
462 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
463 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
467 pinctrl_flexcan2: flexcan2grp {
469 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
470 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
474 pinctrl_flexcan_xcvr: flexcan-xcvrgrp {
476 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b0 /* Flexcan XCVR enable */
480 pinctrl_gpmi_nand: gpminandgrp {
482 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
483 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
484 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
485 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
486 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
487 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
488 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
489 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
490 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
491 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
492 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
493 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
494 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
495 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
496 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
500 pinctrl_i2c1: i2c1grp {
502 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
503 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
507 pinctrl_i2c3: i2c3grp {
509 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
510 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
514 pinctrl_kpp: kppgrp {
516 MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1
517 MX6QDL_PAD_GPIO_4__KEY_COL7 0x1b0b1
518 MX6QDL_PAD_KEY_COL2__KEY_COL2 0x1b0b1
519 MX6QDL_PAD_KEY_COL3__KEY_COL3 0x1b0b1
520 MX6QDL_PAD_GPIO_2__KEY_ROW6 0x1b0b1
521 MX6QDL_PAD_GPIO_5__KEY_ROW7 0x1b0b1
522 MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b1
523 MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x1b0b1
527 pinctrl_lcd0_pwr: lcd0-pwrgrp {
529 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 /* LCD Reset */
533 pinctrl_lcd1_pwr: lcd-pwrgrp {
535 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b1 /* LCD Power Enable */
539 pinctrl_pwm1: pwm1grp {
541 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
545 pinctrl_pwm2: pwm2grp {
547 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
551 pinctrl_tsc2007: tsc2007grp {
553 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 /* Interrupt */
557 pinctrl_uart1: uart1grp {
559 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
560 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
564 pinctrl_uart1_rtscts: uart1_rtsctsgrp {
566 MX6QDL_PAD_SD3_DAT1__UART1_RTS_B 0x1b0b1
567 MX6QDL_PAD_SD3_DAT0__UART1_CTS_B 0x1b0b1
571 pinctrl_uart2: uart2grp {
573 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
574 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
578 pinctrl_uart2_rtscts: uart2_rtsctsgrp {
580 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
581 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
585 pinctrl_uart3: uart3grp {
587 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
588 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
592 pinctrl_uart3_rtscts: uart3_rtsctsgrp {
594 MX6QDL_PAD_SD3_DAT3__UART3_CTS_B 0x1b0b1
595 MX6QDL_PAD_SD3_RST__UART3_RTS_B 0x1b0b1
599 pinctrl_usbh1_vbus: usbh1-vbusgrp {
601 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 /* USBH1_VBUSEN */
605 pinctrl_usbotg: usbotggrp {
607 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x17059
611 pinctrl_usbotg_vbus: usbotg-vbusgrp {
613 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* USBOTG_VBUSEN */
617 pinctrl_usdhc1: usdhc1grp {
619 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x070b1
620 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x070b1
621 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x070b1
622 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x070b1
623 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x070b1
624 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x070b1
625 MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x170b0 /* SD1 CD */
629 pinctrl_usdhc2: usdhc2grp {
631 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x070b1
632 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x070b1
633 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x070b1
634 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x070b1
635 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x070b1
636 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x070b1
637 MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x170b0 /* SD2 CD */
641 pinctrl_user_led: user-ledgrp {
643 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* LED */
649 pinctrl-names = "default";
650 pinctrl-0 = <&pinctrl_kpp>;
652 /* row/col 0,1 are mapped to KPP row/col 6,7 */
654 MATRIX_KEY(6, 6, KEY_POWER) /* 0x06060074 */
655 MATRIX_KEY(6, 7, KEY_KP0) /* 0x06070052 */
656 MATRIX_KEY(6, 2, KEY_KP1) /* 0x0602004f */
657 MATRIX_KEY(6, 3, KEY_KP2) /* 0x06030050 */
658 MATRIX_KEY(7, 6, KEY_KP3) /* 0x07060051 */
659 MATRIX_KEY(7, 7, KEY_KP4) /* 0x0707004b */
660 MATRIX_KEY(7, 2, KEY_KP5) /* 0x0702004c */
661 MATRIX_KEY(7, 3, KEY_KP6) /* 0x0703004d */
662 MATRIX_KEY(2, 6, KEY_KP7) /* 0x02060047 */
663 MATRIX_KEY(2, 7, KEY_KP8) /* 0x02070048 */
664 MATRIX_KEY(2, 2, KEY_KP9) /* 0x02020049 */
670 pinctrl-names = "default";
671 pinctrl-0 = <&pinctrl_pwm1>;
677 pinctrl-names = "default";
678 pinctrl-0 = <&pinctrl_pwm2>;
688 pinctrl-names = "default";
689 pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_rtscts>;
695 pinctrl-names = "default";
696 pinctrl-0 = <&pinctrl_uart2 &pinctrl_uart2_rtscts>;
702 pinctrl-names = "default";
703 pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
709 vbus-supply = <®_usbh1_vbus>;
711 disable-over-current;
716 vbus-supply = <®_usbotg_vbus>;
717 pinctrl-names = "default";
718 pinctrl-0 = <&pinctrl_usbotg>;
719 dr_mode = "peripheral";
720 disable-over-current;
725 pinctrl-names = "default";
726 pinctrl-0 = <&pinctrl_usdhc1>;
729 cd-gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
735 pinctrl-names = "default";
736 pinctrl-0 = <&pinctrl_usdhc2>;
739 cd-gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;