2 * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include <dt-bindings/gpio/gpio.h>
15 model = "Phytec phyFLEX-i.MX6 Ouad";
16 compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
19 reg = <0x10000000 0x80000000>;
23 compatible = "simple-bus";
27 reg_usb_otg_vbus: regulator@0 {
28 compatible = "regulator-fixed";
30 regulator-name = "usb_otg_vbus";
31 regulator-min-microvolt = <5000000>;
32 regulator-max-microvolt = <5000000>;
36 reg_usb_h1_vbus: regulator@1 {
37 compatible = "regulator-fixed";
39 regulator-name = "usb_h1_vbus";
40 regulator-min-microvolt = <5000000>;
41 regulator-max-microvolt = <5000000>;
47 compatible = "gpio-leds";
50 label = "phyflex:green";
51 gpios = <&gpio1 30 0>;
55 label = "phyflex:red";
56 gpios = <&gpio2 31 0>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_ecspi3>;
65 fsl,spi-num-chipselects = <1>;
66 cs-gpios = <&gpio4 24 0>;
69 compatible = "m25p80";
70 spi-max-frequency = <20000000>;
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_i2c1>;
81 compatible = "atmel,24c32";
86 compatible = "dialog,da9063";
88 interrupt-parent = <&gpio4>;
89 interrupts = <17 0x8>; /* active-low GPIO4_17 */
93 regulator-min-microvolt = <730000>;
94 regulator-max-microvolt = <1380000>;
99 regulator-min-microvolt = <730000>;
100 regulator-max-microvolt = <1380000>;
105 regulator-min-microvolt = <1500000>;
106 regulator-max-microvolt = <1500000>;
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
116 vdd_buckmem_reg: bmem {
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
123 regulator-min-microvolt = <1200000>;
124 regulator-max-microvolt = <1200000>;
128 vdd_eth_io_reg: ldo4 {
129 regulator-min-microvolt = <2500000>;
130 regulator-max-microvolt = <2500000>;
134 vdd_mx6_snvs_reg: ldo5 {
135 regulator-min-microvolt = <3000000>;
136 regulator-max-microvolt = <3000000>;
140 vdd_3v3_pmic_io_reg: ldo6 {
141 regulator-min-microvolt = <3300000>;
142 regulator-max-microvolt = <3300000>;
147 regulator-min-microvolt = <3300000>;
148 regulator-max-microvolt = <3300000>;
152 regulator-min-microvolt = <3300000>;
153 regulator-max-microvolt = <3300000>;
156 vdd_mx6_high_reg: ldo11 {
157 regulator-min-microvolt = <3000000>;
158 regulator-max-microvolt = <3000000>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_hog>;
169 imx6q-phytec-pfla02 {
170 pinctrl_hog: hoggrp {
172 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
173 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
174 MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000 /* PMIC interrupt */
175 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */
176 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */
180 pinctrl_ecspi3: ecspi3grp {
182 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
183 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
184 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
188 pinctrl_enet: enetgrp {
190 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
191 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
192 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
193 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
194 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
195 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
196 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
197 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
198 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
199 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
200 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
201 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
202 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
203 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
204 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
205 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
209 pinctrl_gpmi_nand: gpminandgrp {
211 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
212 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
213 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
214 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
215 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
216 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
217 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
218 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
219 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
220 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
221 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
222 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
223 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
224 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
225 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
226 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
227 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
231 pinctrl_i2c1: i2c1grp {
233 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
234 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
238 pinctrl_uart3: uart3grp {
240 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
241 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
242 MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1
243 MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1
247 pinctrl_uart4: uart4grp {
249 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
250 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
254 pinctrl_usbh1: usbh1grp {
256 MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x80000000
260 pinctrl_usbotg: usbotggrp {
262 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
263 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
264 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000
268 pinctrl_usdhc2: usdhc2grp {
270 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
271 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
272 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
273 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
274 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
275 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
279 pinctrl_usdhc3: usdhc3grp {
281 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
282 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
283 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
284 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
285 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
286 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
290 pinctrl_usdhc3_cdwp: usdhc3cdwp {
292 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
293 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_enet>;
303 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
308 pinctrl-names = "default";
309 pinctrl-0 = <&pinctrl_gpmi_nand>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&pinctrl_uart3>;
321 pinctrl-names = "default";
322 pinctrl-0 = <&pinctrl_uart4>;
327 vbus-supply = <®_usb_h1_vbus>;
328 pinctrl-names = "default";
329 pinctrl-0 = <&pinctrl_usbh1>;
334 vbus-supply = <®_usb_otg_vbus>;
335 pinctrl-names = "default";
336 pinctrl-0 = <&pinctrl_usbotg>;
337 disable-over-current;
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_usdhc2>;
344 cd-gpios = <&gpio1 4 0>;
345 wp-gpios = <&gpio1 2 0>;
350 pinctrl-names = "default";
351 pinctrl-0 = <&pinctrl_usdhc3
352 &pinctrl_usdhc3_cdwp>;
353 cd-gpios = <&gpio1 27 0>;
354 wp-gpios = <&gpio1 29 0>;