arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi

   1 // SPDX-License-Identifier: GPL-2.0 OR X11
   2 /*
   3  * Copyright 2015 Boundary Devices, Inc.
   4  */
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         chosen {
  10                 stdout-path = &uart2;
  11         };
  12
  13         memory@10000000 {
  14                 reg = <0x10000000 0x20000000>;
  15         };
  16
  17         regulators {
  18                 compatible = "simple-bus";
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 reg_2p5v: regulator@0 {
  23                         compatible = "regulator-fixed";
  24                         reg = <0>;
  25                         regulator-name = "2P5V";
  26                         regulator-min-microvolt = <2500000>;
  27                         regulator-max-microvolt = <2500000>;
  28                         regulator-always-on;
  29                 };
  30
  31                 reg_3p3v: regulator@1 {
  32                         compatible = "regulator-fixed";
  33                         reg = <1>;
  34                         regulator-name = "3P3V";
  35                         regulator-min-microvolt = <3300000>;
  36                         regulator-max-microvolt = <3300000>;
  37                         regulator-always-on;
  38                 };
  39
  40                 reg_usb_otg_vbus: regulator@2 {
  41                         compatible = "regulator-fixed";
  42                         reg = <2>;
  43                         regulator-name = "usb_otg_vbus";
  44                         regulator-min-microvolt = <5000000>;
  45                         regulator-max-microvolt = <5000000>;
  46                         gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  47                         enable-active-high;
  48                 };
  49
  50                 reg_wlan_vmmc: regulator@3 {
  51                         compatible = "regulator-fixed";
  52                         reg = <3>;
  53                         pinctrl-names = "default";
  54                         pinctrl-0 = <&pinctrl_wlan_vmmc>;
  55                         regulator-name = "reg_wlan_vmmc";
  56                         regulator-min-microvolt = <1800000>;
  57                         regulator-max-microvolt = <1800000>;
  58                         gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  59                         startup-delay-us = <70000>;
  60                         enable-active-high;
  61                 };
  62         };
  63
  64         gpio-keys {
  65                 compatible = "gpio-keys";
  66                 pinctrl-names = "default";
  67                 pinctrl-0 = <&pinctrl_gpio_keys>;
  68
  69                 home {
  70                         label = "Home";
  71                         gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>;
  72                         linux,code = <102>;
  73                 };
  74
  75                 back {
  76                         label = "Back";
  77                         gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
  78                         linux,code = <158>;
  79                 };
  80         };
  81
  82         leds {
  83                 compatible = "gpio-leds";
  84                 pinctrl-names = "default";
  85                 pinctrl-0 = <&pinctrl_leds>;
  86
  87                 j14-pin1 {
  88                         gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
  89                         retain-state-suspended;
  90                         default-state = "off";
  91                 };
  92
  93                 j14-pin3 {
  94                         gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
  95                         retain-state-suspended;
  96                         default-state = "off";
  97                 };
  98
  99                 j14-pins8-9 {
 100                         gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
 101                         retain-state-suspended;
 102                         default-state = "off";
 103                 };
 104
 105                 j46-pin2 {
 106                         gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
 107                         retain-state-suspended;
 108                         default-state = "off";
 109                 };
 110
 111                 j46-pin3 {
 112                         gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
 113                         retain-state-suspended;
 114                         default-state = "off";
 115                 };
 116         };
 117
 118         backlight-lcd {
 119                 compatible = "pwm-backlight";
 120                 pwms = <&pwm1 0 5000000>;
 121                 brightness-levels = <0 4 8 16 32 64 128 255>;
 122                 default-brightness-level = <7>;
 123                 power-supply = <&reg_3p3v>;
 124                 status = "okay";
 125         };
 126
 127         backlight_lvds0: backlight-lvds0 {
 128                 compatible = "pwm-backlight";
 129                 pwms = <&pwm4 0 5000000>;
 130                 brightness-levels = <0 4 8 16 32 64 128 255>;
 131                 default-brightness-level = <7>;
 132                 power-supply = <&reg_3p3v>;
 133                 status = "okay";
 134         };
 135
 136         panel-lvds0 {
 137                 compatible = "hannstar,hsd100pxn1";
 138                 backlight = <&backlight_lvds0>;
 139
 140                 port {
 141                         panel_in_lvds0: endpoint {
 142                                 remote-endpoint = <&lvds0_out>;
 143                         };
 144                 };
 145         };
 146
 147         sound {
 148                 compatible = "fsl,imx6dl-nit6xlite-sgtl5000",
 149                              "fsl,imx-audio-sgtl5000";
 150                 model = "imx6dl-nit6xlite-sgtl5000";
 151                 ssi-controller = <&ssi1>;
 152                 audio-codec = <&codec>;
 153                 audio-routing =
 154                         "MIC_IN", "Mic Jack",
 155                         "Mic Jack", "Mic Bias",
 156                         "Headphone Jack", "HP_OUT";
 157                 mux-int-port = <1>;
 158                 mux-ext-port = <3>;
 159         };
 160 };
 161
 162 &audmux {
 163         pinctrl-names = "default";
 164         pinctrl-0 = <&pinctrl_audmux>;
 165         status = "okay";
 166 };
 167
 168 &clks {
 169         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 170                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 171         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 172                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 173 };
 174
 175 &ecspi1 {
 176         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 177         pinctrl-names = "default";
 178         pinctrl-0 = <&pinctrl_ecspi1>;
 179         status = "okay";
 180
 181         flash: m25p80@0 {
 182                 compatible = "microchip,sst25vf016b";
 183                 spi-max-frequency = <20000000>;
 184                 reg = <0>;
 185         };
 186 };
 187
 188 &fec {
 189         pinctrl-names = "default";
 190         pinctrl-0 = <&pinctrl_enet>;
 191         phy-mode = "rgmii";
 192         phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
 193         txen-skew-ps = <0>;
 194         txc-skew-ps = <3000>;
 195         rxdv-skew-ps = <0>;
 196         rxc-skew-ps = <3000>;
 197         rxd0-skew-ps = <0>;
 198         rxd1-skew-ps = <0>;
 199         rxd2-skew-ps = <0>;
 200         rxd3-skew-ps = <0>;
 201         txd0-skew-ps = <0>;
 202         txd1-skew-ps = <0>;
 203         txd2-skew-ps = <0>;
 204         txd3-skew-ps = <0>;
 205         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 206                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 207         fsl,err006687-workaround-present;
 208         status = "okay";
 209 };
 210
 211 &hdmi {
 212         ddc-i2c-bus = <&i2c2>;
 213         status = "okay";
 214 };
 215
 216 &i2c1 {
 217         clock-frequency = <100000>;
 218         pinctrl-names = "default";
 219         pinctrl-0 = <&pinctrl_i2c1>;
 220         status = "okay";
 221
 222         codec: sgtl5000@a {
 223                 compatible = "fsl,sgtl5000";
 224                 pinctrl-names = "default";
 225                 pinctrl-0 = <&pinctrl_sgtl5000>;
 226                 reg = <0x0a>;
 227                 clocks = <&clks IMX6QDL_CLK_CKO>;
 228                 VDDA-supply = <&reg_2p5v>;
 229                 VDDIO-supply = <&reg_3p3v>;
 230         };
 231 };
 232
 233 &i2c2 {
 234         clock-frequency = <100000>;
 235         pinctrl-names = "default";
 236         pinctrl-0 = <&pinctrl_i2c2>;
 237         status = "okay";
 238 };
 239
 240 &i2c3 {
 241         clock-frequency = <100000>;
 242         pinctrl-names = "default";
 243         pinctrl-0 = <&pinctrl_i2c3>;
 244         status = "okay";
 245
 246         touchscreen@4 {
 247                 compatible = "eeti,egalax_ts";
 248                 reg = <0x04>;
 249                 interrupt-parent = <&gpio1>;
 250                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 251                 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
 252         };
 253
 254         touchscreen@38 {
 255                 compatible = "edt,edt-ft5x06";
 256                 reg = <0x38>;
 257                 interrupt-parent = <&gpio1>;
 258                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 259                 wakeup-source;
 260         };
 261
 262         rtc@6f {
 263                 compatible = "isil,isl1208";
 264                 pinctrl-names = "default";
 265                 pinctrl-0 = <&pinctrl_rtc>;
 266                 reg = <0x6f>;
 267                 interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>;
 268         };
 269 };
 270
 271 &iomuxc {
 272         pinctrl-names = "default";
 273         pinctrl-0 = <&pinctrl_j10>;
 274         pinctrl-1 = <&pinctrl_j28>;
 275
 276         imx6dl-nit6xlite {
 277                 pinctrl_audmux: audmuxgrp {
 278                         fsl,pins = <
 279                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 280                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 281                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 282                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 283                         >;
 284                 };
 285
 286                 pinctrl_ecspi1: ecspi1grp {
 287                         fsl,pins = <
 288                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 289                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 290                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 291                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19          0x000b1
 292                         >;
 293                 };
 294
 295                 pinctrl_enet: enetgrp {
 296                         fsl,pins = <
 297                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 298                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 299                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
 300                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
 301                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
 302                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
 303                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
 304                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
 305                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 306                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 307                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 308                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 309                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 310                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 311                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 312                                 /* Phy reset */
 313                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x0f0b0
 314                                 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0
 315                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 316                         >;
 317                 };
 318
 319                 pinctrl_gpio_keys: gpio-keysgrp {
 320                         fsl,pins = <
 321                                 /* Home Button: J14 pin 5 */
 322                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 323                                 /* Back Button: J14 pin 7 */
 324                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 325                         >;
 326                 };
 327
 328                 pinctrl_i2c1: i2c1grp {
 329                         fsl,pins = <
 330                                 MX6QDL_PAD_EIM_D21__I2C1_SCL    0x4001b8b1
 331                                 MX6QDL_PAD_EIM_D28__I2C1_SDA    0x4001b8b1
 332                         >;
 333                 };
 334
 335                 pinctrl_i2c2: i2c2grp {
 336                         fsl,pins = <
 337                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b8b1
 338                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b8b1
 339                         >;
 340                 };
 341
 342                 pinctrl_i2c3: i2c3grp {
 343                         fsl,pins = <
 344                                 MX6QDL_PAD_GPIO_5__I2C3_SCL     0x4001b8b1
 345                                 MX6QDL_PAD_GPIO_16__I2C3_SDA    0x4001b8b1
 346                                 /* Touch IRQ: J7 pin 4 */
 347                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09   0x1b0b0
 348                                 /* tcs2004 IRQ */
 349                                 MX6QDL_PAD_EIM_LBA__GPIO2_IO27  0x1b0b0
 350                                 /* tsc2004 reset */
 351                                 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x0b0b0
 352                         >;
 353                 };
 354
 355                 pinctrl_j10: j10grp {
 356                         fsl,pins = <
 357                                 /* Broadcom WiFi module pins */
 358                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00         0x1b0b0
 359                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 360                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 361                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 362                                 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09       0x0b0b0
 363                                 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14        0x1b0b0
 364                                 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT      0x000b0
 365                         >;
 366                 };
 367
 368                 pinctrl_j28: j28grp {
 369                         fsl,pins = <
 370                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0
 371                         >;
 372                 };
 373
 374                 pinctrl_leds: ledsgrp {
 375                         fsl,pins = <
 376                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x0b0b0
 377                                 MX6QDL_PAD_GPIO_3__GPIO1_IO03           0x0b0b0
 378                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29          0x030b0
 379                                 MX6QDL_PAD_GPIO_7__GPIO1_IO07           0x0b0b0
 380                                 MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0b0b0
 381                         >;
 382                 };
 383
 384                 pinctrl_pwm1: pwm1grp {
 385                         fsl,pins = <
 386                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
 387                         >;
 388                 };
 389
 390                 pinctrl_pwm3: pwm3grp {
 391                         fsl,pins = <
 392                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
 393                         >;
 394                 };
 395
 396                 pinctrl_pwm4: pwm4grp {
 397                         fsl,pins = <
 398                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 399                         >;
 400                 };
 401
 402                 pinctrl_wlan_vmmc: wlan-vmmcgrp {
 403                         fsl,pins = <
 404                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07        0x030b0
 405                         >;
 406                 };
 407
 408                 pinctrl_rtc: rtcgrp {
 409                         fsl,pins = <
 410                                 MX6QDL_PAD_EIM_RW__GPIO2_IO26           0x1b0b0
 411                         >;
 412                 };
 413
 414                 pinctrl_sgtl5000: sgtl5000grp {
 415                         fsl,pins = <
 416                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x000b0
 417                                 MX6QDL_PAD_EIM_A25__GPIO5_IO02          0x1b0b0
 418                         >;
 419                 };
 420
 421                 pinctrl_uart1: uart1grp {
 422                         fsl,pins = <
 423                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 424                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 425                         >;
 426                 };
 427
 428                 pinctrl_uart2: uart2grp {
 429                         fsl,pins = <
 430                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 431                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 432                         >;
 433                 };
 434
 435                 pinctrl_uart3: uart3grp {
 436                         fsl,pins = <
 437                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 438                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 439                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
 440                                 MX6QDL_PAD_EIM_D31__UART3_RTS_B         0x1b0b1
 441                         >;
 442                 };
 443
 444                 pinctrl_usbotg: usbotggrp {
 445                         fsl,pins = <
 446                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 447                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC         0x1b0b0
 448                                 /* power enable, high active */
 449                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x000b0
 450                         >;
 451                 };
 452
 453                 pinctrl_usdhc2: usdhc2grp {
 454                         fsl,pins = <
 455                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 456                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 457                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 458                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 459                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 460                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 461                         >;
 462                 };
 463
 464                 pinctrl_usdhc3: usdhc3grp {
 465                         fsl,pins = <
 466                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 467                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 468                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 469                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 470                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 471                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 472                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x1b0b0
 473                         >;
 474                 };
 475         };
 476 };
 477
 478 &ldb {
 479         status = "okay";
 480
 481         lvds-channel@0 {
 482                 status = "okay";
 483
 484                 port@4 {
 485                         reg = <4>;
 486
 487                         lvds0_out: endpoint {
 488                                 remote-endpoint = <&panel_in_lvds0>;
 489                         };
 490                 };
 491         };
 492 };
 493
 494 &pcie {
 495         status = "okay";
 496 };
 497
 498 &pwm1 {
 499         pinctrl-names = "default";
 500         pinctrl-0 = <&pinctrl_pwm1>;
 501         status = "okay";
 502 };
 503
 504 &pwm3 {
 505         pinctrl-names = "default";
 506         pinctrl-0 = <&pinctrl_pwm3>;
 507         status = "okay";
 508 };
 509
 510 &pwm4 {
 511         pinctrl-names = "default";
 512         pinctrl-0 = <&pinctrl_pwm4>;
 513         status = "okay";
 514 };
 515
 516 &ssi1 {
 517         status = "okay";
 518 };
 519
 520 &uart1 {
 521         pinctrl-names = "default";
 522         pinctrl-0 = <&pinctrl_uart1>;
 523         status = "okay";
 524 };
 525
 526 &uart2 {
 527         pinctrl-names = "default";
 528         pinctrl-0 = <&pinctrl_uart2>;
 529         status = "okay";
 530 };
 531
 532 &uart3 {
 533         pinctrl-names = "default";
 534         pinctrl-0 = <&pinctrl_uart3>;
 535         uart-has-rtscts;
 536         status = "okay";
 537 };
 538
 539 &usbh1 {
 540         status = "okay";
 541 };
 542
 543 &usbotg {
 544         vbus-supply = <&reg_usb_otg_vbus>;
 545         pinctrl-names = "default";
 546         pinctrl-0 = <&pinctrl_usbotg>;
 547         disable-over-current;
 548         status = "okay";
 549 };
 550
 551 &usdhc2 {
 552         pinctrl-names = "default";
 553         pinctrl-0 = <&pinctrl_usdhc2>;
 554         bus-width = <4>;
 555         non-removable;
 556         vmmc-supply = <&reg_3p3v>;
 557         vqmmc-supply = <&reg_wlan_vmmc>;
 558         vqmmc-1-8-v;
 559         ocr-limit = <0x180>;     /* 1.65v - 2.1v */
 560         cap-power-off-card;
 561         keep-power-in-suspend;
 562         status = "okay";
 563 };
 564
 565 &usdhc3 {
 566         pinctrl-names = "default";
 567         pinctrl-0 = <&pinctrl_usdhc3>;
 568         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 569         vmmc-supply = <&reg_3p3v>;
 570         status = "okay";
 571 };