arch/arm/boot/dts/imx27-apf27dev.dts

   1 /*
   2  * Copyright 2013 Armadeus Systems - <support@armadeus.com>
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 /* APF27Dev is a docking board for the APF27 SOM */
  13 #include "imx27-apf27.dts"
  14
  15 / {
  16         model = "Armadeus Systems APF27Dev docking/development board";
  17         compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27";
  18
  19         display: display {
  20                 model = "Chimei-LW700AT9003";
  21                 native-mode = <&timing0>;
  22                 bits-per-pixel = <16>;  /* non-standard but required */
  23                 fsl,pcr = <0xfae80083>; /* non-standard but required */
  24                 display-timings {
  25                         timing0: 800x480 {
  26                                 clock-frequency = <33000033>;
  27                                 hactive = <800>;
  28                                 vactive = <480>;
  29                                 hback-porch = <96>;
  30                                 hfront-porch = <96>;
  31                                 vback-porch = <20>;
  32                                 vfront-porch = <21>;
  33                                 hsync-len = <64>;
  34                                 vsync-len = <4>;
  35                         };
  36                 };
  37         };
  38
  39         gpio-keys {
  40                 compatible = "gpio-keys";
  41
  42                 user-key {
  43                         label = "user";
  44                         gpios = <&gpio6 13 0>;
  45                         linux,code = <276>; /* BTN_EXTRA */
  46                 };
  47         };
  48
  49         leds {
  50                 compatible = "gpio-leds";
  51
  52                 user {
  53                         label = "Heartbeat";
  54                         gpios = <&gpio6 14 0>;
  55                         linux,default-trigger = "heartbeat";
  56                 };
  57         };
  58 };
  59
  60 &cspi1 {
  61         fsl,spi-num-chipselects = <1>;
  62         cs-gpios = <&gpio4 28 1>;
  63         pinctrl-names = "default";
  64         pinctrl-0 = <&pinctrl_cspi1>;
  65         status = "okay";
  66 };
  67
  68 &cspi2 {
  69         fsl,spi-num-chipselects = <3>;
  70         cs-gpios = <&gpio4 21 1>, <&gpio4 27 1>,
  71                         <&gpio2 17 1>;
  72         pinctrl-names = "default";
  73         pinctrl-0 = <&pinctrl_cspi2>;
  74         status = "okay";
  75 };
  76
  77 &fb {
  78         display = <&display>;
  79         fsl,dmacr = <0x00020010>;
  80         pinctrl-names = "default";
  81         pinctrl-0 = <&pinctrl_imxfb1>;
  82         status = "okay";
  83 };
  84
  85 &i2c1 {
  86         clock-frequency = <400000>;
  87         pinctrl-names = "default";
  88         pinctrl-0 = <&pinctrl_i2c1>;
  89         status = "okay";
  90
  91         rtc@68 {
  92                 compatible = "dallas,ds1374";
  93                 reg = <0x68>;
  94         };
  95 };
  96
  97 &i2c2 {
  98         pinctrl-names = "default";
  99         pinctrl-0 = <&pinctrl_i2c2>;
 100         status = "okay";
 101 };
 102
 103 &iomuxc {
 104         imx27-apf27dev {
 105                 pinctrl_cspi1: cspi1grp {
 106                         fsl,pins = <
 107                                 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
 108                                 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
 109                                 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
 110                         >;
 111                 };
 112
 113                 pinctrl_cspi2: cspi2grp {
 114                         fsl,pins = <
 115                                 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
 116                                 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
 117                                 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
 118                         >;
 119                 };
 120
 121                 pinctrl_imxfb1: imxfbgrp {
 122                         fsl,pins = <
 123                                 MX27_PAD_CLS__CLS 0x0
 124                                 MX27_PAD_CONTRAST__CONTRAST 0x0
 125                                 MX27_PAD_LD0__LD0 0x0
 126                                 MX27_PAD_LD1__LD1 0x0
 127                                 MX27_PAD_LD2__LD2 0x0
 128                                 MX27_PAD_LD3__LD3 0x0
 129                                 MX27_PAD_LD4__LD4 0x0
 130                                 MX27_PAD_LD5__LD5 0x0
 131                                 MX27_PAD_LD6__LD6 0x0
 132                                 MX27_PAD_LD7__LD7 0x0
 133                                 MX27_PAD_LD8__LD8 0x0
 134                                 MX27_PAD_LD9__LD9 0x0
 135                                 MX27_PAD_LD10__LD10 0x0
 136                                 MX27_PAD_LD11__LD11 0x0
 137                                 MX27_PAD_LD12__LD12 0x0
 138                                 MX27_PAD_LD13__LD13 0x0
 139                                 MX27_PAD_LD14__LD14 0x0
 140                                 MX27_PAD_LD15__LD15 0x0
 141                                 MX27_PAD_LD16__LD16 0x0
 142                                 MX27_PAD_LD17__LD17 0x0
 143                                 MX27_PAD_LSCLK__LSCLK 0x0
 144                                 MX27_PAD_OE_ACD__OE_ACD 0x0
 145                                 MX27_PAD_PS__PS 0x0
 146                                 MX27_PAD_REV__REV 0x0
 147                                 MX27_PAD_SPL_SPR__SPL_SPR 0x0
 148                                 MX27_PAD_HSYNC__HSYNC 0x0
 149                                 MX27_PAD_VSYNC__VSYNC 0x0
 150                         >;
 151                 };
 152
 153                 pinctrl_i2c1: i2c1grp {
 154                         fsl,pins = <
 155                                 MX27_PAD_I2C_DATA__I2C_DATA 0x0
 156                                 MX27_PAD_I2C_CLK__I2C_CLK 0x0
 157                         >;
 158                 };
 159
 160                 pinctrl_i2c2: i2c2grp {
 161                         fsl,pins = <
 162                                 MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
 163                                 MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
 164                         >;
 165                 };
 166
 167                 pinctrl_sdhc2: sdhc2grp {
 168                         fsl,pins = <
 169                                 MX27_PAD_SD2_CLK__SD2_CLK 0x0
 170                                 MX27_PAD_SD2_CMD__SD2_CMD 0x0
 171                                 MX27_PAD_SD2_D0__SD2_D0 0x0
 172                                 MX27_PAD_SD2_D1__SD2_D1 0x0
 173                                 MX27_PAD_SD2_D2__SD2_D2 0x0
 174                                 MX27_PAD_SD2_D3__SD2_D3 0x0
 175                         >;
 176                 };
 177         };
 178 };
 179
 180 &sdhci2 {
 181         bus-width = <4>;
 182         cd-gpios = <&gpio3 14 0>;
 183         pinctrl-names = "default";
 184         pinctrl-0 = <&pinctrl_sdhc2>;
 185         status = "okay";
 186 };