arch/arm/boot/dts/berlin2q.dtsi

   1 /*
   2  * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is licensed under the terms of the GNU General Public
  10  *     License version 2. This program is licensed "as is" without any
  11  *     warranty of any kind, whether express or implied.
  12  *
  13  * Or, alternatively,
  14  *
  15  *  b) Permission is hereby granted, free of charge, to any person
  16  *     obtaining a copy of this software and associated documentation
  17  *     files (the "Software"), to deal in the Software without
  18  *     restriction, including without limitation the rights to use,
  19  *     copy, modify, merge, publish, distribute, sublicense, and/or
  20  *     sell copies of the Software, and to permit persons to whom the
  21  *     Software is furnished to do so, subject to the following
  22  *     conditions:
  23  *
  24  *     The above copyright notice and this permission notice shall be
  25  *     included in all copies or substantial portions of the Software.
  26  *
  27  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  29  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  31  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  32  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  33  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  34  *     OTHER DEALINGS IN THE SOFTWARE.
  35  */
  36
  37 #include <dt-bindings/clock/berlin2q.h>
  38 #include <dt-bindings/interrupt-controller/arm-gic.h>
  39
  40 / {
  41         model = "Marvell Armada 1500 pro (BG2-Q) SoC";
  42         compatible = "marvell,berlin2q", "marvell,berlin";
  43         #address-cells = <1>;
  44         #size-cells = <1>;
  45
  46         aliases {
  47                 serial0 = &uart0;
  48                 serial1 = &uart1;
  49         };
  50
  51         cpus {
  52                 #address-cells = <1>;
  53                 #size-cells = <0>;
  54                 enable-method = "marvell,berlin-smp";
  55
  56                 cpu0: cpu@0 {
  57                         compatible = "arm,cortex-a9";
  58                         device_type = "cpu";
  59                         next-level-cache = <&l2>;
  60                         reg = <0>;
  61
  62                         clocks = <&chip_clk CLKID_CPU>;
  63                         clock-latency = <100000>;
  64                         /* Can be modified by the bootloader */
  65                         operating-points = <
  66                                 /* kHz    uV */
  67                                 1200000 1200000
  68                                 1000000 1200000
  69                                 800000  1200000
  70                                 600000  1200000
  71                         >;
  72                 };
  73
  74                 cpu1: cpu@1 {
  75                         compatible = "arm,cortex-a9";
  76                         device_type = "cpu";
  77                         next-level-cache = <&l2>;
  78                         reg = <1>;
  79                 };
  80
  81                 cpu2: cpu@2 {
  82                         compatible = "arm,cortex-a9";
  83                         device_type = "cpu";
  84                         next-level-cache = <&l2>;
  85                         reg = <2>;
  86                 };
  87
  88                 cpu3: cpu@3 {
  89                         compatible = "arm,cortex-a9";
  90                         device_type = "cpu";
  91                         next-level-cache = <&l2>;
  92                         reg = <3>;
  93                 };
  94         };
  95
  96         refclk: oscillator {
  97                 compatible = "fixed-clock";
  98                 #clock-cells = <0>;
  99                 clock-frequency = <25000000>;
 100         };
 101
 102         soc@f7000000 {
 103                 compatible = "simple-bus";
 104                 #address-cells = <1>;
 105                 #size-cells = <1>;
 106
 107                 ranges = <0 0xf7000000 0x1000000>;
 108                 interrupt-parent = <&gic>;
 109
 110                 pmu {
 111                         compatible = "arm,cortex-a9-pmu";
 112                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
 113                                      <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
 114                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 115                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 116                         interrupt-affinity = <&cpu0>,
 117                                              <&cpu1>,
 118                                              <&cpu2>,
 119                                              <&cpu3>;
 120                 };
 121
 122                 sdhci0: sdhci@ab0000 {
 123                         compatible = "mrvl,pxav3-mmc";
 124                         reg = <0xab0000 0x200>;
 125                         clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
 126                         clock-names = "io", "core";
 127                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 128                         status = "disabled";
 129                 };
 130
 131                 sdhci1: sdhci@ab0800 {
 132                         compatible = "mrvl,pxav3-mmc";
 133                         reg = <0xab0800 0x200>;
 134                         clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
 135                         clock-names = "io", "core";
 136                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 137                         status = "disabled";
 138                 };
 139
 140                 sdhci2: sdhci@ab1000 {
 141                         compatible = "mrvl,pxav3-mmc";
 142                         reg = <0xab1000 0x200>;
 143                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 144                         clocks = <&chip_clk CLKID_NFC_ECC>, <&chip_clk CLKID_SDIO>;
 145                         clock-names = "io", "core";
 146                         status = "disabled";
 147                 };
 148
 149                 l2: l2-cache-controller@ac0000 {
 150                         compatible = "arm,pl310-cache";
 151                         reg = <0xac0000 0x1000>;
 152                         cache-unified;
 153                         cache-level = <2>;
 154                         arm,data-latency = <2 2 2>;
 155                         arm,tag-latency = <2 2 2>;
 156                 };
 157
 158                 scu: snoop-control-unit@ad0000 {
 159                         compatible = "arm,cortex-a9-scu";
 160                         reg = <0xad0000 0x58>;
 161                 };
 162
 163                 local-timer@ad0600 {
 164                         compatible = "arm,cortex-a9-twd-timer";
 165                         reg = <0xad0600 0x20>;
 166                         clocks = <&chip_clk CLKID_TWD>;
 167                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 168                 };
 169
 170                 gic: interrupt-controller@ad1000 {
 171                         compatible = "arm,cortex-a9-gic";
 172                         reg = <0xad1000 0x1000>, <0xad0100 0x100>;
 173                         interrupt-controller;
 174                         #interrupt-cells = <3>;
 175                 };
 176
 177                 usb_phy2: phy@a2f400 {
 178                         compatible = "marvell,berlin2cd-usb-phy";
 179                         reg = <0xa2f400 0x128>;
 180                         #phy-cells = <0>;
 181                         resets = <&chip_rst 0x104 14>;
 182                         status = "disabled";
 183                 };
 184
 185                 usb2: usb@a30000 {
 186                         compatible = "chipidea,usb2";
 187                         reg = <0xa30000 0x10000>;
 188                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
 189                         clocks = <&chip_clk CLKID_USB2>;
 190                         phys = <&usb_phy2>;
 191                         phy-names = "usb-phy";
 192                         status = "disabled";
 193                 };
 194
 195                 usb_phy0: phy@b74000 {
 196                         compatible = "marvell,berlin2cd-usb-phy";
 197                         reg = <0xb74000 0x128>;
 198                         #phy-cells = <0>;
 199                         resets = <&chip_rst 0x104 12>;
 200                         status = "disabled";
 201                 };
 202
 203                 usb_phy1: phy@b78000 {
 204                         compatible = "marvell,berlin2cd-usb-phy";
 205                         reg = <0xb78000 0x128>;
 206                         #phy-cells = <0>;
 207                         resets = <&chip_rst 0x104 13>;
 208                         status = "disabled";
 209                 };
 210
 211                 eth0: ethernet@b90000 {
 212                         compatible = "marvell,pxa168-eth";
 213                         reg = <0xb90000 0x10000>;
 214                         clocks = <&chip_clk CLKID_GETH0>;
 215                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 216                         /* set by bootloader */
 217                         local-mac-address = [00 00 00 00 00 00];
 218                         #address-cells = <1>;
 219                         #size-cells = <0>;
 220                         phy-connection-type = "mii";
 221                         phy-handle = <&ethphy0>;
 222                         status = "disabled";
 223
 224                         ethphy0: ethernet-phy@0 {
 225                                 reg = <0>;
 226                         };
 227                 };
 228
 229                 cpu-ctrl@dd0000 {
 230                         compatible = "marvell,berlin-cpu-ctrl";
 231                         reg = <0xdd0000 0x10000>;
 232                 };
 233
 234                 apb@e80000 {
 235                         compatible = "simple-bus";
 236                         #address-cells = <1>;
 237                         #size-cells = <1>;
 238
 239                         ranges = <0 0xe80000 0x10000>;
 240                         interrupt-parent = <&aic>;
 241
 242                         gpio0: gpio@400 {
 243                                 compatible = "snps,dw-apb-gpio";
 244                                 reg = <0x0400 0x400>;
 245                                 #address-cells = <1>;
 246                                 #size-cells = <0>;
 247
 248                                 porta: gpio-port@0 {
 249                                         compatible = "snps,dw-apb-gpio-port";
 250                                         gpio-controller;
 251                                         #gpio-cells = <2>;
 252                                         snps,nr-gpios = <32>;
 253                                         reg = <0>;
 254                                         interrupt-controller;
 255                                         #interrupt-cells = <2>;
 256                                         interrupts = <0>;
 257                                 };
 258                         };
 259
 260                         gpio1: gpio@800 {
 261                                 compatible = "snps,dw-apb-gpio";
 262                                 reg = <0x0800 0x400>;
 263                                 #address-cells = <1>;
 264                                 #size-cells = <0>;
 265
 266                                 portb: gpio-port@1 {
 267                                         compatible = "snps,dw-apb-gpio-port";
 268                                         gpio-controller;
 269                                         #gpio-cells = <2>;
 270                                         snps,nr-gpios = <32>;
 271                                         reg = <0>;
 272                                         interrupt-controller;
 273                                         #interrupt-cells = <2>;
 274                                         interrupts = <1>;
 275                                 };
 276                         };
 277
 278                         gpio2: gpio@c00 {
 279                                 compatible = "snps,dw-apb-gpio";
 280                                 reg = <0x0c00 0x400>;
 281                                 #address-cells = <1>;
 282                                 #size-cells = <0>;
 283
 284                                 portc: gpio-port@2 {
 285                                         compatible = "snps,dw-apb-gpio-port";
 286                                         gpio-controller;
 287                                         #gpio-cells = <2>;
 288                                         snps,nr-gpios = <32>;
 289                                         reg = <0>;
 290                                         interrupt-controller;
 291                                         #interrupt-cells = <2>;
 292                                         interrupts = <2>;
 293                                 };
 294                         };
 295
 296                         gpio3: gpio@1000 {
 297                                 compatible = "snps,dw-apb-gpio";
 298                                 reg = <0x1000 0x400>;
 299                                 #address-cells = <1>;
 300                                 #size-cells = <0>;
 301
 302                                 portd: gpio-port@3 {
 303                                         compatible = "snps,dw-apb-gpio-port";
 304                                         gpio-controller;
 305                                         #gpio-cells = <2>;
 306                                         snps,nr-gpios = <32>;
 307                                         reg = <0>;
 308                                         interrupt-controller;
 309                                         #interrupt-cells = <2>;
 310                                         interrupts = <3>;
 311                                 };
 312                         };
 313
 314                         i2c0: i2c@1400 {
 315                                 compatible = "snps,designware-i2c";
 316                                 #address-cells = <1>;
 317                                 #size-cells = <0>;
 318                                 reg = <0x1400 0x100>;
 319                                 interrupts = <4>;
 320                                 clocks = <&chip_clk CLKID_CFG>;
 321                                 pinctrl-0 = <&twsi0_pmux>;
 322                                 pinctrl-names = "default";
 323                                 status = "disabled";
 324                         };
 325
 326                         i2c1: i2c@1800 {
 327                                 compatible = "snps,designware-i2c";
 328                                 #address-cells = <1>;
 329                                 #size-cells = <0>;
 330                                 reg = <0x1800 0x100>;
 331                                 interrupts = <5>;
 332                                 clocks = <&chip_clk CLKID_CFG>;
 333                                 pinctrl-0 = <&twsi1_pmux>;
 334                                 pinctrl-names = "default";
 335                                 status = "disabled";
 336                         };
 337
 338                         timer0: timer@2c00 {
 339                                 compatible = "snps,dw-apb-timer";
 340                                 reg = <0x2c00 0x14>;
 341                                 clocks = <&chip_clk CLKID_CFG>;
 342                                 clock-names = "timer";
 343                                 interrupts = <8>;
 344                         };
 345
 346                         timer1: timer@2c14 {
 347                                 compatible = "snps,dw-apb-timer";
 348                                 reg = <0x2c14 0x14>;
 349                                 clocks = <&chip_clk CLKID_CFG>;
 350                                 clock-names = "timer";
 351                         };
 352
 353                         timer2: timer@2c28 {
 354                                 compatible = "snps,dw-apb-timer";
 355                                 reg = <0x2c28 0x14>;
 356                                 clocks = <&chip_clk CLKID_CFG>;
 357                                 clock-names = "timer";
 358                                 status = "disabled";
 359                         };
 360
 361                         timer3: timer@2c3c {
 362                                 compatible = "snps,dw-apb-timer";
 363                                 reg = <0x2c3c 0x14>;
 364                                 clocks = <&chip_clk CLKID_CFG>;
 365                                 clock-names = "timer";
 366                                 status = "disabled";
 367                         };
 368
 369                         timer4: timer@2c50 {
 370                                 compatible = "snps,dw-apb-timer";
 371                                 reg = <0x2c50 0x14>;
 372                                 clocks = <&chip_clk CLKID_CFG>;
 373                                 clock-names = "timer";
 374                                 status = "disabled";
 375                         };
 376
 377                         timer5: timer@2c64 {
 378                                 compatible = "snps,dw-apb-timer";
 379                                 reg = <0x2c64 0x14>;
 380                                 clocks = <&chip_clk CLKID_CFG>;
 381                                 clock-names = "timer";
 382                                 status = "disabled";
 383                         };
 384
 385                         timer6: timer@2c78 {
 386                                 compatible = "snps,dw-apb-timer";
 387                                 reg = <0x2c78 0x14>;
 388                                 clocks = <&chip_clk CLKID_CFG>;
 389                                 clock-names = "timer";
 390                                 status = "disabled";
 391                         };
 392
 393                         timer7: timer@2c8c {
 394                                 compatible = "snps,dw-apb-timer";
 395                                 reg = <0x2c8c 0x14>;
 396                                 clocks = <&chip_clk CLKID_CFG>;
 397                                 clock-names = "timer";
 398                                 status = "disabled";
 399                         };
 400
 401                         aic: interrupt-controller@3800 {
 402                                 compatible = "snps,dw-apb-ictl";
 403                                 reg = <0x3800 0x30>;
 404                                 interrupt-controller;
 405                                 #interrupt-cells = <1>;
 406                                 interrupt-parent = <&gic>;
 407                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 408                         };
 409                 };
 410
 411                 chip: chip-control@ea0000 {
 412                         compatible = "simple-mfd", "syscon";
 413                         reg = <0xea0000 0x400>, <0xdd0170 0x10>;
 414
 415                         chip_clk: clock {
 416                                 compatible = "marvell,berlin2q-clk";
 417                                 #clock-cells = <1>;
 418                                 clocks = <&refclk>;
 419                                 clock-names = "refclk";
 420                         };
 421
 422                         soc_pinctrl: pin-controller {
 423                                 compatible = "marvell,berlin2q-soc-pinctrl";
 424
 425                                 sd1_pmux: sd1-pmux {
 426                                         groups = "G31";
 427                                         function = "sd1";
 428                                 };
 429
 430                                 twsi0_pmux: twsi0-pmux {
 431                                         groups = "G6";
 432                                         function = "twsi0";
 433                                 };
 434
 435                                 twsi1_pmux: twsi1-pmux {
 436                                         groups = "G7";
 437                                         function = "twsi1";
 438                                 };
 439                         };
 440
 441                         chip_rst: reset {
 442                                 compatible = "marvell,berlin2-reset";
 443                                 #reset-cells = <2>;
 444                         };
 445                 };
 446
 447                 ahci: sata@e90000 {
 448                         compatible = "marvell,berlin2q-ahci", "generic-ahci";
 449                         reg = <0xe90000 0x1000>;
 450                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 451                         clocks = <&chip_clk CLKID_SATA>;
 452                         #address-cells = <1>;
 453                         #size-cells = <0>;
 454
 455                         sata0: sata-port@0 {
 456                                 reg = <0>;
 457                                 phys = <&sata_phy 0>;
 458                                 status = "disabled";
 459                         };
 460
 461                         sata1: sata-port@1 {
 462                                 reg = <1>;
 463                                 phys = <&sata_phy 1>;
 464                                 status = "disabled";
 465                         };
 466                 };
 467
 468                 sata_phy: phy@e900a0 {
 469                         compatible = "marvell,berlin2q-sata-phy";
 470                         reg = <0xe900a0 0x200>;
 471                         clocks = <&chip_clk CLKID_SATA>;
 472                         #address-cells = <1>;
 473                         #size-cells = <0>;
 474                         #phy-cells = <1>;
 475                         status = "disabled";
 476
 477                         sata-phy@0 {
 478                                 reg = <0>;
 479                         };
 480
 481                         sata-phy@1 {
 482                                 reg = <1>;
 483                         };
 484                 };
 485
 486                 usb0: usb@ed0000 {
 487                         compatible = "chipidea,usb2";
 488                         reg = <0xed0000 0x10000>;
 489                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 490                         clocks = <&chip_clk CLKID_USB0>;
 491                         phys = <&usb_phy0>;
 492                         phy-names = "usb-phy";
 493                         status = "disabled";
 494                 };
 495
 496                 usb1: usb@ee0000 {
 497                         compatible = "chipidea,usb2";
 498                         reg = <0xee0000 0x10000>;
 499                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 500                         clocks = <&chip_clk CLKID_USB1>;
 501                         phys = <&usb_phy1>;
 502                         phy-names = "usb-phy";
 503                         status = "disabled";
 504                 };
 505
 506                 pwm: pwm@f20000 {
 507                         compatible = "marvell,berlin-pwm";
 508                         reg = <0xf20000 0x40>;
 509                         clocks = <&chip_clk CLKID_CFG>;
 510                         #pwm-cells = <3>;
 511                 };
 512
 513                 apb@fc0000 {
 514                         compatible = "simple-bus";
 515                         #address-cells = <1>;
 516                         #size-cells = <1>;
 517
 518                         ranges = <0 0xfc0000 0x10000>;
 519                         interrupt-parent = <&sic>;
 520
 521                         wdt0: watchdog@1000 {
 522                                 compatible = "snps,dw-wdt";
 523                                 reg = <0x1000 0x100>;
 524                                 clocks = <&refclk>;
 525                                 interrupts = <0>;
 526                         };
 527
 528                         wdt1: watchdog@2000 {
 529                                 compatible = "snps,dw-wdt";
 530                                 reg = <0x2000 0x100>;
 531                                 clocks = <&refclk>;
 532                                 interrupts = <1>;
 533                         };
 534
 535                         wdt2: watchdog@3000 {
 536                                 compatible = "snps,dw-wdt";
 537                                 reg = <0x3000 0x100>;
 538                                 clocks = <&refclk>;
 539                                 interrupts = <2>;
 540                         };
 541
 542                         sm_gpio1: gpio@5000 {
 543                                 compatible = "snps,dw-apb-gpio";
 544                                 reg = <0x5000 0x400>;
 545                                 #address-cells = <1>;
 546                                 #size-cells = <0>;
 547
 548                                 portf: gpio-port@5 {
 549                                         compatible = "snps,dw-apb-gpio-port";
 550                                         gpio-controller;
 551                                         #gpio-cells = <2>;
 552                                         snps,nr-gpios = <32>;
 553                                         reg = <0>;
 554                                 };
 555                         };
 556
 557                         i2c2: i2c@7000 {
 558                                 compatible = "snps,designware-i2c";
 559                                 #address-cells = <1>;
 560                                 #size-cells = <0>;
 561                                 reg = <0x7000 0x100>;
 562                                 interrupts = <6>;
 563                                 clocks = <&refclk>;
 564                                 pinctrl-0 = <&twsi2_pmux>;
 565                                 pinctrl-names = "default";
 566                                 status = "disabled";
 567                         };
 568
 569                         i2c3: i2c@8000 {
 570                                 compatible = "snps,designware-i2c";
 571                                 #address-cells = <1>;
 572                                 #size-cells = <0>;
 573                                 reg = <0x8000 0x100>;
 574                                 interrupts = <7>;
 575                                 clocks = <&refclk>;
 576                                 pinctrl-0 = <&twsi3_pmux>;
 577                                 pinctrl-names = "default";
 578                                 status = "disabled";
 579                         };
 580
 581                         uart0: uart@9000 {
 582                                 compatible = "snps,dw-apb-uart";
 583                                 reg = <0x9000 0x100>;
 584                                 interrupts = <8>;
 585                                 clocks = <&refclk>;
 586                                 reg-shift = <2>;
 587                                 pinctrl-0 = <&uart0_pmux>;
 588                                 pinctrl-names = "default";
 589                                 status = "disabled";
 590                         };
 591
 592                         uart1: uart@a000 {
 593                                 compatible = "snps,dw-apb-uart";
 594                                 reg = <0xa000 0x100>;
 595                                 interrupts = <9>;
 596                                 clocks = <&refclk>;
 597                                 reg-shift = <2>;
 598                                 pinctrl-0 = <&uart1_pmux>;
 599                                 pinctrl-names = "default";
 600                                 status = "disabled";
 601                         };
 602
 603                         sm_gpio0: gpio@c000 {
 604                                 compatible = "snps,dw-apb-gpio";
 605                                 reg = <0xc000 0x400>;
 606                                 #address-cells = <1>;
 607                                 #size-cells = <0>;
 608
 609                                 porte: gpio-port@4 {
 610                                         compatible = "snps,dw-apb-gpio-port";
 611                                         gpio-controller;
 612                                         #gpio-cells = <2>;
 613                                         snps,nr-gpios = <32>;
 614                                         reg = <0>;
 615                                 };
 616                         };
 617
 618                         sysctrl: pin-controller@d000 {
 619                                 compatible = "simple-mfd", "syscon";
 620                                 reg = <0xd000 0x100>;
 621
 622                                 sys_pinctrl: pin-controller {
 623                                         compatible = "marvell,berlin2q-system-pinctrl";
 624
 625                                         uart0_pmux: uart0-pmux {
 626                                                 groups = "GSM12";
 627                                                 function = "uart0";
 628                                         };
 629
 630                                         uart1_pmux: uart1-pmux {
 631                                                 groups = "GSM14";
 632                                                 function = "uart1";
 633                                         };
 634
 635                                         twsi2_pmux: twsi2-pmux {
 636                                                 groups = "GSM13";
 637                                                 function = "twsi2";
 638                                         };
 639
 640                                         twsi3_pmux: twsi3-pmux {
 641                                                 groups = "GSM14";
 642                                                 function = "twsi3";
 643                                         };
 644                                 };
 645
 646                                 adc: adc {
 647                                         compatible = "marvell,berlin2-adc";
 648                                         interrupts = <12>, <14>;
 649                                         interrupt-names = "adc", "tsen";
 650                                 };
 651                         };
 652
 653                         sic: interrupt-controller@e000 {
 654                                 compatible = "snps,dw-apb-ictl";
 655                                 reg = <0xe000 0x30>;
 656                                 interrupt-controller;
 657                                 #interrupt-cells = <1>;
 658                                 interrupt-parent = <&gic>;
 659                                 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 660                         };
 661                 };
 662         };
 663 };