1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2400";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm926ej-s";
46 device_type = "memory";
51 compatible = "simple-bus";
57 reg = < 0x1e620000 0x94
58 0x20000000 0x10000000 >;
61 compatible = "aspeed,ast2400-fmc";
62 clocks = <&syscon ASPEED_CLK_AHB>;
67 compatible = "jedec,spi-nor";
68 spi-max-frequency = <50000000>;
73 compatible = "jedec,spi-nor";
78 compatible = "jedec,spi-nor";
83 compatible = "jedec,spi-nor";
88 compatible = "jedec,spi-nor";
94 reg = < 0x1e630000 0x18
95 0x30000000 0x10000000 >;
98 compatible = "aspeed,ast2400-spi";
99 clocks = <&syscon ASPEED_CLK_AHB>;
103 compatible = "jedec,spi-nor";
104 spi-max-frequency = <50000000>;
109 vic: interrupt-controller@1e6c0080 {
110 compatible = "aspeed,ast2400-vic";
111 interrupt-controller;
112 #interrupt-cells = <1>;
113 valid-sources = <0xffffffff 0x0007ffff>;
114 reg = <0x1e6c0080 0x80>;
117 cvic: copro-interrupt-controller@1e6c2000 {
118 compatible = "aspeed,ast2400-cvic", "aspeed-cvic";
119 valid-sources = <0x7fffffff>;
120 reg = <0x1e6c2000 0x80>;
123 mac0: ethernet@1e660000 {
124 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
125 reg = <0x1e660000 0x180>;
127 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
131 mac1: ethernet@1e680000 {
132 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
133 reg = <0x1e680000 0x180>;
135 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
139 ehci0: usb@1e6a1000 {
140 compatible = "aspeed,ast2400-ehci", "generic-ehci";
141 reg = <0x1e6a1000 0x100>;
143 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_usb2h_default>;
150 compatible = "aspeed,ast2400-uhci", "generic-uhci";
151 reg = <0x1e6b0000 0x100>;
154 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
157 * No default pinmux, it will follow EHCI, use an explicit pinmux
158 * override if you don't enable EHCI
162 vhub: usb-vhub@1e6a0000 {
163 compatible = "aspeed,ast2400-usb-vhub";
164 reg = <0x1e6a0000 0x300>;
166 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_usb2d_default>;
173 compatible = "simple-bus";
174 #address-cells = <1>;
178 syscon: syscon@1e6e2000 {
179 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
180 reg = <0x1e6e2000 0x1a8>;
181 #address-cells = <1>;
183 ranges = <0 0x1e6e2000 0x1000>;
187 p2a: p2a-control@2c {
189 compatible = "aspeed,ast2400-p2a-ctrl";
193 pinctrl: pinctrl@80 {
194 reg = <0x80 0x18>, <0xa0 0x10>;
195 compatible = "aspeed,ast2400-pinctrl";
199 rng: hwrng@1e6e2078 {
200 compatible = "timeriomem_rng";
201 reg = <0x1e6e2078 0x4>;
207 compatible = "aspeed,ast2400-adc";
208 reg = <0x1e6e9000 0xb0>;
209 clocks = <&syscon ASPEED_CLK_APB>;
210 resets = <&syscon ASPEED_RESET_ADC>;
211 #io-channel-cells = <1>;
215 sram: sram@1e720000 {
216 compatible = "mmio-sram";
217 reg = <0x1e720000 0x8000>; // 32K
220 sdmmc: sd-controller@1e740000 {
221 compatible = "aspeed,ast2400-sd-controller";
222 reg = <0x1e740000 0x100>;
223 #address-cells = <1>;
225 ranges = <0 0x1e740000 0x10000>;
226 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
230 compatible = "aspeed,ast2400-sdhci";
234 clocks = <&syscon ASPEED_CLK_SDIO>;
239 compatible = "aspeed,ast2400-sdhci";
243 clocks = <&syscon ASPEED_CLK_SDIO>;
248 gpio: gpio@1e780000 {
251 compatible = "aspeed,ast2400-gpio";
252 reg = <0x1e780000 0x1000>;
254 gpio-ranges = <&pinctrl 0 0 220>;
255 clocks = <&syscon ASPEED_CLK_APB>;
256 interrupt-controller;
257 #interrupt-cells = <2>;
260 timer: timer@1e782000 {
261 /* This timer is a Faraday FTTMR010 derivative */
262 compatible = "aspeed,ast2400-timer";
263 reg = <0x1e782000 0x90>;
264 interrupts = <16 17 18 35 36 37 38 39>;
265 clocks = <&syscon ASPEED_CLK_APB>;
266 clock-names = "PCLK";
270 compatible = "aspeed,ast2400-rtc";
271 reg = <0x1e781000 0x18>;
275 uart1: serial@1e783000 {
276 compatible = "ns16550a";
277 reg = <0x1e783000 0x20>;
280 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
281 resets = <&lpc_reset 4>;
286 uart5: serial@1e784000 {
287 compatible = "ns16550a";
288 reg = <0x1e784000 0x20>;
291 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
296 wdt1: watchdog@1e785000 {
297 compatible = "aspeed,ast2400-wdt";
298 reg = <0x1e785000 0x1c>;
299 clocks = <&syscon ASPEED_CLK_APB>;
302 wdt2: watchdog@1e785020 {
303 compatible = "aspeed,ast2400-wdt";
304 reg = <0x1e785020 0x1c>;
305 clocks = <&syscon ASPEED_CLK_APB>;
308 pwm_tacho: pwm-tacho-controller@1e786000 {
309 compatible = "aspeed,ast2400-pwm-tacho";
310 #address-cells = <1>;
312 reg = <0x1e786000 0x1000>;
313 clocks = <&syscon ASPEED_CLK_24M>;
314 resets = <&syscon ASPEED_RESET_PWM>;
318 vuart: serial@1e787000 {
319 compatible = "aspeed,ast2400-vuart";
320 reg = <0x1e787000 0x40>;
323 clocks = <&syscon ASPEED_CLK_APB>;
329 compatible = "aspeed,ast2400-lpc", "simple-mfd";
330 reg = <0x1e789000 0x1000>;
332 #address-cells = <1>;
334 ranges = <0x0 0x1e789000 0x1000>;
337 compatible = "aspeed,ast2400-lpc-bmc";
341 lpc_host: lpc-host@80 {
342 compatible = "aspeed,ast2400-lpc-host", "simple-mfd", "syscon";
346 #address-cells = <1>;
348 ranges = <0x0 0x80 0x1e0>;
350 lpc_ctrl: lpc-ctrl@0 {
351 compatible = "aspeed,ast2400-lpc-ctrl";
353 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
357 lpc_snoop: lpc-snoop@10 {
358 compatible = "aspeed,ast2400-lpc-snoop";
365 compatible = "aspeed,ast2400-lhc";
366 reg = <0x20 0x24 0x48 0x8>;
369 lpc_reset: reset-controller@18 {
370 compatible = "aspeed,ast2400-lpc-reset";
376 compatible = "aspeed,ast2400-ibt-bmc";
384 uart2: serial@1e78d000 {
385 compatible = "ns16550a";
386 reg = <0x1e78d000 0x20>;
389 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
390 resets = <&lpc_reset 5>;
395 uart3: serial@1e78e000 {
396 compatible = "ns16550a";
397 reg = <0x1e78e000 0x20>;
400 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
401 resets = <&lpc_reset 6>;
406 uart4: serial@1e78f000 {
407 compatible = "ns16550a";
408 reg = <0x1e78f000 0x20>;
411 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
412 resets = <&lpc_reset 7>;
418 compatible = "simple-bus";
419 #address-cells = <1>;
421 ranges = <0 0x1e78a000 0x1000>;
428 i2c_ic: interrupt-controller@0 {
429 #interrupt-cells = <1>;
430 compatible = "aspeed,ast2400-i2c-ic";
433 interrupt-controller;
437 #address-cells = <1>;
439 #interrupt-cells = <1>;
442 compatible = "aspeed,ast2400-i2c-bus";
443 clocks = <&syscon ASPEED_CLK_APB>;
444 resets = <&syscon ASPEED_RESET_I2C>;
445 bus-frequency = <100000>;
447 interrupt-parent = <&i2c_ic>;
449 /* Does not need pinctrl properties */
453 #address-cells = <1>;
455 #interrupt-cells = <1>;
458 compatible = "aspeed,ast2400-i2c-bus";
459 clocks = <&syscon ASPEED_CLK_APB>;
460 resets = <&syscon ASPEED_RESET_I2C>;
461 bus-frequency = <100000>;
463 interrupt-parent = <&i2c_ic>;
465 /* Does not need pinctrl properties */
469 #address-cells = <1>;
471 #interrupt-cells = <1>;
474 compatible = "aspeed,ast2400-i2c-bus";
475 clocks = <&syscon ASPEED_CLK_APB>;
476 resets = <&syscon ASPEED_RESET_I2C>;
477 bus-frequency = <100000>;
479 interrupt-parent = <&i2c_ic>;
480 pinctrl-names = "default";
481 pinctrl-0 = <&pinctrl_i2c3_default>;
486 #address-cells = <1>;
488 #interrupt-cells = <1>;
491 compatible = "aspeed,ast2400-i2c-bus";
492 clocks = <&syscon ASPEED_CLK_APB>;
493 resets = <&syscon ASPEED_RESET_I2C>;
494 bus-frequency = <100000>;
496 interrupt-parent = <&i2c_ic>;
497 pinctrl-names = "default";
498 pinctrl-0 = <&pinctrl_i2c4_default>;
503 #address-cells = <1>;
505 #interrupt-cells = <1>;
508 compatible = "aspeed,ast2400-i2c-bus";
509 clocks = <&syscon ASPEED_CLK_APB>;
510 resets = <&syscon ASPEED_RESET_I2C>;
511 bus-frequency = <100000>;
513 interrupt-parent = <&i2c_ic>;
514 pinctrl-names = "default";
515 pinctrl-0 = <&pinctrl_i2c5_default>;
520 #address-cells = <1>;
522 #interrupt-cells = <1>;
525 compatible = "aspeed,ast2400-i2c-bus";
526 clocks = <&syscon ASPEED_CLK_APB>;
527 resets = <&syscon ASPEED_RESET_I2C>;
528 bus-frequency = <100000>;
530 interrupt-parent = <&i2c_ic>;
531 pinctrl-names = "default";
532 pinctrl-0 = <&pinctrl_i2c6_default>;
537 #address-cells = <1>;
539 #interrupt-cells = <1>;
542 compatible = "aspeed,ast2400-i2c-bus";
543 clocks = <&syscon ASPEED_CLK_APB>;
544 resets = <&syscon ASPEED_RESET_I2C>;
545 bus-frequency = <100000>;
547 interrupt-parent = <&i2c_ic>;
548 pinctrl-names = "default";
549 pinctrl-0 = <&pinctrl_i2c7_default>;
554 #address-cells = <1>;
556 #interrupt-cells = <1>;
559 compatible = "aspeed,ast2400-i2c-bus";
560 clocks = <&syscon ASPEED_CLK_APB>;
561 resets = <&syscon ASPEED_RESET_I2C>;
562 bus-frequency = <100000>;
564 interrupt-parent = <&i2c_ic>;
565 pinctrl-names = "default";
566 pinctrl-0 = <&pinctrl_i2c8_default>;
571 #address-cells = <1>;
573 #interrupt-cells = <1>;
576 compatible = "aspeed,ast2400-i2c-bus";
577 clocks = <&syscon ASPEED_CLK_APB>;
578 resets = <&syscon ASPEED_RESET_I2C>;
579 bus-frequency = <100000>;
581 interrupt-parent = <&i2c_ic>;
582 pinctrl-names = "default";
583 pinctrl-0 = <&pinctrl_i2c9_default>;
588 #address-cells = <1>;
590 #interrupt-cells = <1>;
593 compatible = "aspeed,ast2400-i2c-bus";
594 clocks = <&syscon ASPEED_CLK_APB>;
595 resets = <&syscon ASPEED_RESET_I2C>;
596 bus-frequency = <100000>;
598 interrupt-parent = <&i2c_ic>;
599 pinctrl-names = "default";
600 pinctrl-0 = <&pinctrl_i2c10_default>;
605 #address-cells = <1>;
607 #interrupt-cells = <1>;
610 compatible = "aspeed,ast2400-i2c-bus";
611 clocks = <&syscon ASPEED_CLK_APB>;
612 resets = <&syscon ASPEED_RESET_I2C>;
613 bus-frequency = <100000>;
615 interrupt-parent = <&i2c_ic>;
616 pinctrl-names = "default";
617 pinctrl-0 = <&pinctrl_i2c11_default>;
622 #address-cells = <1>;
624 #interrupt-cells = <1>;
627 compatible = "aspeed,ast2400-i2c-bus";
628 clocks = <&syscon ASPEED_CLK_APB>;
629 resets = <&syscon ASPEED_RESET_I2C>;
630 bus-frequency = <100000>;
632 interrupt-parent = <&i2c_ic>;
633 pinctrl-names = "default";
634 pinctrl-0 = <&pinctrl_i2c12_default>;
639 #address-cells = <1>;
641 #interrupt-cells = <1>;
644 compatible = "aspeed,ast2400-i2c-bus";
645 clocks = <&syscon ASPEED_CLK_APB>;
646 resets = <&syscon ASPEED_RESET_I2C>;
647 bus-frequency = <100000>;
649 interrupt-parent = <&i2c_ic>;
650 pinctrl-names = "default";
651 pinctrl-0 = <&pinctrl_i2c13_default>;
656 #address-cells = <1>;
658 #interrupt-cells = <1>;
661 compatible = "aspeed,ast2400-i2c-bus";
662 clocks = <&syscon ASPEED_CLK_APB>;
663 resets = <&syscon ASPEED_RESET_I2C>;
664 bus-frequency = <100000>;
666 interrupt-parent = <&i2c_ic>;
667 pinctrl-names = "default";
668 pinctrl-0 = <&pinctrl_i2c14_default>;
674 pinctrl_acpi_default: acpi_default {
679 pinctrl_adc0_default: adc0_default {
684 pinctrl_adc1_default: adc1_default {
689 pinctrl_adc10_default: adc10_default {
694 pinctrl_adc11_default: adc11_default {
699 pinctrl_adc12_default: adc12_default {
704 pinctrl_adc13_default: adc13_default {
709 pinctrl_adc14_default: adc14_default {
714 pinctrl_adc15_default: adc15_default {
719 pinctrl_adc2_default: adc2_default {
724 pinctrl_adc3_default: adc3_default {
729 pinctrl_adc4_default: adc4_default {
734 pinctrl_adc5_default: adc5_default {
739 pinctrl_adc6_default: adc6_default {
744 pinctrl_adc7_default: adc7_default {
749 pinctrl_adc8_default: adc8_default {
754 pinctrl_adc9_default: adc9_default {
759 pinctrl_bmcint_default: bmcint_default {
764 pinctrl_ddcclk_default: ddcclk_default {
769 pinctrl_ddcdat_default: ddcdat_default {
774 pinctrl_extrst_default: extrst_default {
779 pinctrl_flack_default: flack_default {
784 pinctrl_flbusy_default: flbusy_default {
789 pinctrl_flwp_default: flwp_default {
794 pinctrl_gpid_default: gpid_default {
799 pinctrl_gpid0_default: gpid0_default {
804 pinctrl_gpid2_default: gpid2_default {
809 pinctrl_gpid4_default: gpid4_default {
814 pinctrl_gpid6_default: gpid6_default {
819 pinctrl_gpie0_default: gpie0_default {
824 pinctrl_gpie2_default: gpie2_default {
829 pinctrl_gpie4_default: gpie4_default {
834 pinctrl_gpie6_default: gpie6_default {
839 pinctrl_i2c10_default: i2c10_default {
844 pinctrl_i2c11_default: i2c11_default {
849 pinctrl_i2c12_default: i2c12_default {
854 pinctrl_i2c13_default: i2c13_default {
859 pinctrl_i2c14_default: i2c14_default {
864 pinctrl_i2c3_default: i2c3_default {
869 pinctrl_i2c4_default: i2c4_default {
874 pinctrl_i2c5_default: i2c5_default {
879 pinctrl_i2c6_default: i2c6_default {
884 pinctrl_i2c7_default: i2c7_default {
889 pinctrl_i2c8_default: i2c8_default {
894 pinctrl_i2c9_default: i2c9_default {
899 pinctrl_lpcpd_default: lpcpd_default {
904 pinctrl_lpcpme_default: lpcpme_default {
909 pinctrl_lpcrst_default: lpcrst_default {
914 pinctrl_lpcsmi_default: lpcsmi_default {
919 pinctrl_mac1link_default: mac1link_default {
920 function = "MAC1LINK";
924 pinctrl_mac2link_default: mac2link_default {
925 function = "MAC2LINK";
929 pinctrl_mdio1_default: mdio1_default {
934 pinctrl_mdio2_default: mdio2_default {
939 pinctrl_ncts1_default: ncts1_default {
944 pinctrl_ncts2_default: ncts2_default {
949 pinctrl_ncts3_default: ncts3_default {
954 pinctrl_ncts4_default: ncts4_default {
959 pinctrl_ndcd1_default: ndcd1_default {
964 pinctrl_ndcd2_default: ndcd2_default {
969 pinctrl_ndcd3_default: ndcd3_default {
974 pinctrl_ndcd4_default: ndcd4_default {
979 pinctrl_ndsr1_default: ndsr1_default {
984 pinctrl_ndsr2_default: ndsr2_default {
989 pinctrl_ndsr3_default: ndsr3_default {
994 pinctrl_ndsr4_default: ndsr4_default {
999 pinctrl_ndtr1_default: ndtr1_default {
1004 pinctrl_ndtr2_default: ndtr2_default {
1009 pinctrl_ndtr3_default: ndtr3_default {
1014 pinctrl_ndtr4_default: ndtr4_default {
1019 pinctrl_ndts4_default: ndts4_default {
1024 pinctrl_nri1_default: nri1_default {
1029 pinctrl_nri2_default: nri2_default {
1034 pinctrl_nri3_default: nri3_default {
1039 pinctrl_nri4_default: nri4_default {
1044 pinctrl_nrts1_default: nrts1_default {
1049 pinctrl_nrts2_default: nrts2_default {
1054 pinctrl_nrts3_default: nrts3_default {
1059 pinctrl_oscclk_default: oscclk_default {
1060 function = "OSCCLK";
1064 pinctrl_pwm0_default: pwm0_default {
1069 pinctrl_pwm1_default: pwm1_default {
1074 pinctrl_pwm2_default: pwm2_default {
1079 pinctrl_pwm3_default: pwm3_default {
1084 pinctrl_pwm4_default: pwm4_default {
1089 pinctrl_pwm5_default: pwm5_default {
1094 pinctrl_pwm6_default: pwm6_default {
1099 pinctrl_pwm7_default: pwm7_default {
1104 pinctrl_rgmii1_default: rgmii1_default {
1105 function = "RGMII1";
1109 pinctrl_rgmii2_default: rgmii2_default {
1110 function = "RGMII2";
1114 pinctrl_rmii1_default: rmii1_default {
1119 pinctrl_rmii2_default: rmii2_default {
1124 pinctrl_rom16_default: rom16_default {
1129 pinctrl_rom8_default: rom8_default {
1134 pinctrl_romcs1_default: romcs1_default {
1135 function = "ROMCS1";
1139 pinctrl_romcs2_default: romcs2_default {
1140 function = "ROMCS2";
1144 pinctrl_romcs3_default: romcs3_default {
1145 function = "ROMCS3";
1149 pinctrl_romcs4_default: romcs4_default {
1150 function = "ROMCS4";
1154 pinctrl_rxd1_default: rxd1_default {
1159 pinctrl_rxd2_default: rxd2_default {
1164 pinctrl_rxd3_default: rxd3_default {
1169 pinctrl_rxd4_default: rxd4_default {
1174 pinctrl_salt1_default: salt1_default {
1179 pinctrl_salt2_default: salt2_default {
1184 pinctrl_salt3_default: salt3_default {
1189 pinctrl_salt4_default: salt4_default {
1194 pinctrl_sd1_default: sd1_default {
1199 pinctrl_sd2_default: sd2_default {
1204 pinctrl_sgpmck_default: sgpmck_default {
1205 function = "SGPMCK";
1209 pinctrl_sgpmi_default: sgpmi_default {
1214 pinctrl_sgpmld_default: sgpmld_default {
1215 function = "SGPMLD";
1219 pinctrl_sgpmo_default: sgpmo_default {
1224 pinctrl_sgpsck_default: sgpsck_default {
1225 function = "SGPSCK";
1229 pinctrl_sgpsi0_default: sgpsi0_default {
1230 function = "SGPSI0";
1234 pinctrl_sgpsi1_default: sgpsi1_default {
1235 function = "SGPSI1";
1239 pinctrl_sgpsld_default: sgpsld_default {
1240 function = "SGPSLD";
1244 pinctrl_sioonctrl_default: sioonctrl_default {
1245 function = "SIOONCTRL";
1246 groups = "SIOONCTRL";
1249 pinctrl_siopbi_default: siopbi_default {
1250 function = "SIOPBI";
1254 pinctrl_siopbo_default: siopbo_default {
1255 function = "SIOPBO";
1259 pinctrl_siopwreq_default: siopwreq_default {
1260 function = "SIOPWREQ";
1261 groups = "SIOPWREQ";
1264 pinctrl_siopwrgd_default: siopwrgd_default {
1265 function = "SIOPWRGD";
1266 groups = "SIOPWRGD";
1269 pinctrl_sios3_default: sios3_default {
1274 pinctrl_sios5_default: sios5_default {
1279 pinctrl_siosci_default: siosci_default {
1280 function = "SIOSCI";
1284 pinctrl_spi1_default: spi1_default {
1289 pinctrl_spi1debug_default: spi1debug_default {
1290 function = "SPI1DEBUG";
1291 groups = "SPI1DEBUG";
1294 pinctrl_spi1passthru_default: spi1passthru_default {
1295 function = "SPI1PASSTHRU";
1296 groups = "SPI1PASSTHRU";
1299 pinctrl_spics1_default: spics1_default {
1300 function = "SPICS1";
1304 pinctrl_timer3_default: timer3_default {
1305 function = "TIMER3";
1309 pinctrl_timer4_default: timer4_default {
1310 function = "TIMER4";
1314 pinctrl_timer5_default: timer5_default {
1315 function = "TIMER5";
1319 pinctrl_timer6_default: timer6_default {
1320 function = "TIMER6";
1324 pinctrl_timer7_default: timer7_default {
1325 function = "TIMER7";
1329 pinctrl_timer8_default: timer8_default {
1330 function = "TIMER8";
1334 pinctrl_txd1_default: txd1_default {
1339 pinctrl_txd2_default: txd2_default {
1344 pinctrl_txd3_default: txd3_default {
1349 pinctrl_txd4_default: txd4_default {
1354 pinctrl_uart6_default: uart6_default {
1359 pinctrl_usbcki_default: usbcki_default {
1360 function = "USBCKI";
1364 pinctrl_usb2h_default: usb2h_default {
1365 function = "USB2H1";
1369 pinctrl_usb2d_default: usb2d_default {
1370 function = "USB2D1";
1374 pinctrl_vgabios_rom_default: vgabios_rom_default {
1375 function = "VGABIOS_ROM";
1376 groups = "VGABIOS_ROM";
1379 pinctrl_vgahs_default: vgahs_default {
1384 pinctrl_vgavs_default: vgavs_default {
1389 pinctrl_vpi18_default: vpi18_default {
1394 pinctrl_vpi24_default: vpi24_default {
1399 pinctrl_vpi30_default: vpi30_default {
1404 pinctrl_vpo12_default: vpo12_default {
1409 pinctrl_vpo24_default: vpo24_default {
1414 pinctrl_wdtrst1_default: wdtrst1_default {
1415 function = "WDTRST1";
1419 pinctrl_wdtrst2_default: wdtrst2_default {
1420 function = "WDTRST2";