1 &l4_wkup { /* 0x44c00000 */
2 compatible = "ti,am4-l4-wkup", "simple-bus";
3 reg = <0x44c00000 0x800>,
7 reg-names = "ap", "la", "ia0", "ia1";
10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
14 segment@0 { /* 0x44c00000 */
15 compatible = "simple-bus";
18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
19 <0x00000800 0x00000800 0x000800>, /* ap 1 */
20 <0x00001000 0x00001000 0x000400>, /* ap 2 */
21 <0x00001400 0x00001400 0x000400>; /* ap 3 */
24 segment@100000 { /* 0x44d00000 */
25 compatible = "simple-bus";
28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */
29 <0x00004000 0x00104000 0x001000>, /* ap 5 */
30 <0x00080000 0x00180000 0x002000>, /* ap 6 */
31 <0x00082000 0x00182000 0x001000>, /* ap 7 */
32 <0x000f0000 0x001f0000 0x010000>; /* ap 8 */
34 target-module@0 { /* 0x44d00000, ap 4 28.0 */
35 compatible = "ti,sysc";
39 ranges = <0x0 0x0 0x4000>;
42 target-module@80000 { /* 0x44d80000, ap 6 10.0 */
43 compatible = "ti,sysc";
47 ranges = <0x0 0x80000 0x2000>;
50 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */
51 compatible = "ti,sysc-omap4", "ti,sysc";
56 ranges = <0x0 0xf0000 0x10000>;
59 compatible = "ti,am4-prcm", "simple-bus";
61 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
64 ranges = <0 0 0x11000>;
71 prcm_clockdomains: clockdomains {
77 segment@200000 { /* 0x44e00000 */
78 compatible = "simple-bus";
81 ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */
82 <0x00003000 0x00203000 0x001000>, /* ap 10 */
83 <0x00004000 0x00204000 0x001000>, /* ap 11 */
84 <0x00005000 0x00205000 0x001000>, /* ap 12 */
85 <0x00006000 0x00206000 0x001000>, /* ap 13 */
86 <0x00007000 0x00207000 0x001000>, /* ap 14 */
87 <0x00008000 0x00208000 0x001000>, /* ap 15 */
88 <0x00009000 0x00209000 0x001000>, /* ap 16 */
89 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */
90 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */
91 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */
92 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */
93 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */
94 <0x00010000 0x00210000 0x010000>, /* ap 22 */
95 <0x00030000 0x00230000 0x001000>, /* ap 23 */
96 <0x00031000 0x00231000 0x001000>, /* ap 24 */
97 <0x00032000 0x00232000 0x001000>, /* ap 25 */
98 <0x00033000 0x00233000 0x001000>, /* ap 26 */
99 <0x00034000 0x00234000 0x001000>, /* ap 27 */
100 <0x00035000 0x00235000 0x001000>, /* ap 28 */
101 <0x00036000 0x00236000 0x001000>, /* ap 29 */
102 <0x00037000 0x00237000 0x001000>, /* ap 30 */
103 <0x00038000 0x00238000 0x001000>, /* ap 31 */
104 <0x00039000 0x00239000 0x001000>, /* ap 32 */
105 <0x0003a000 0x0023a000 0x001000>, /* ap 33 */
106 <0x0003e000 0x0023e000 0x001000>, /* ap 34 */
107 <0x0003f000 0x0023f000 0x001000>, /* ap 35 */
108 <0x00040000 0x00240000 0x040000>, /* ap 36 */
109 <0x00080000 0x00280000 0x001000>, /* ap 37 */
110 <0x00088000 0x00288000 0x008000>, /* ap 38 */
111 <0x00092000 0x00292000 0x001000>, /* ap 39 */
112 <0x00086000 0x00286000 0x001000>, /* ap 40 */
113 <0x00087000 0x00287000 0x001000>, /* ap 41 */
114 <0x00090000 0x00290000 0x001000>, /* ap 42 */
115 <0x00091000 0x00291000 0x001000>; /* ap 43 */
117 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */
118 compatible = "ti,sysc";
120 #address-cells = <1>;
122 ranges = <0x0 0x3000 0x1000>;
125 target-module@5000 { /* 0x44e05000, ap 12 30.0 */
126 compatible = "ti,sysc";
128 #address-cells = <1>;
130 ranges = <0x0 0x5000 0x1000>;
133 target-module@7000 { /* 0x44e07000, ap 14 20.0 */
134 compatible = "ti,sysc-omap2", "ti,sysc";
139 reg-names = "rev", "sysc", "syss";
140 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
141 SYSC_OMAP2_SOFTRESET |
142 SYSC_OMAP2_AUTOIDLE)>;
143 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
146 <SYSC_IDLE_SMART_WKUP>;
148 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
149 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>,
150 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>;
151 clock-names = "fck", "dbclk";
152 #address-cells = <1>;
154 ranges = <0x0 0x7000 0x1000>;
157 compatible = "ti,am4372-gpio","ti,omap4-gpio";
159 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
162 interrupt-controller;
163 #interrupt-cells = <2>;
168 target-module@9000 { /* 0x44e09000, ap 16 04.0 */
169 compatible = "ti,sysc-omap2", "ti,sysc";
174 reg-names = "rev", "sysc", "syss";
175 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
176 SYSC_OMAP2_SOFTRESET |
177 SYSC_OMAP2_AUTOIDLE)>;
178 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
181 <SYSC_IDLE_SMART_WKUP>;
182 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
183 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>;
185 #address-cells = <1>;
187 ranges = <0x0 0x9000 0x1000>;
190 compatible = "ti,am4372-uart","ti,omap2-uart";
192 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
196 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */
197 compatible = "ti,sysc-omap2", "ti,sysc";
202 reg-names = "rev", "sysc", "syss";
203 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
204 SYSC_OMAP2_ENAWAKEUP |
205 SYSC_OMAP2_SOFTRESET |
206 SYSC_OMAP2_AUTOIDLE)>;
207 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
210 <SYSC_IDLE_SMART_WKUP>;
212 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
213 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>;
215 #address-cells = <1>;
217 ranges = <0x0 0xb000 0x1000>;
220 compatible = "ti,am4372-i2c","ti,omap4-i2c";
222 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
223 #address-cells = <1>;
229 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */
230 compatible = "ti,sysc-omap4", "ti,sysc";
231 ti,hwmods = "adc_tsc";
234 reg-names = "rev", "sysc";
235 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
238 <SYSC_IDLE_SMART_WKUP>;
239 /* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */
240 clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>;
242 #address-cells = <1>;
244 ranges = <0x0 0xd000 0x1000>;
247 compatible = "ti,am3359-tscadc";
249 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
250 clocks = <&adc_tsc_fck>;
253 dmas = <&edma 53 0>, <&edma 57 0>;
254 dma-names = "fifo0", "fifo1";
257 compatible = "ti,am3359-tsc";
261 #io-channel-cells = <1>;
262 compatible = "ti,am3359-adc";
268 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */
269 compatible = "ti,sysc-omap4", "ti,sysc";
272 #address-cells = <1>;
274 ranges = <0x0 0x10000 0x10000>;
277 compatible = "ti,am4-scm", "simple-bus";
279 #address-cells = <1>;
281 ranges = <0 0 0x4000>;
283 am43xx_pinmux: pinmux@800 {
284 compatible = "ti,am437-padconf",
287 #address-cells = <1>;
289 #pinctrl-cells = <1>;
290 #interrupt-cells = <1>;
291 interrupt-controller;
292 pinctrl-single,register-width = <32>;
293 pinctrl-single,function-mask = <0xffffffff>;
296 scm_conf: scm_conf@0 {
297 compatible = "syscon", "simple-bus";
299 #address-cells = <1>;
302 phy_gmii_sel: phy-gmii-sel {
303 compatible = "ti,am43xx-phy-gmii-sel";
309 #address-cells = <1>;
314 wkup_m3_ipc: wkup_m3_ipc@1324 {
315 compatible = "ti,am4372-wkup-m3-ipc";
317 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
318 ti,rproc = <&wkup_m3>;
319 mboxes = <&mailbox &mbox_wkupm3>;
322 edma_xbar: dma-router@f90 {
323 compatible = "ti,am335x-edma-crossbar";
327 dma-masters = <&edma>;
330 scm_clockdomains: clockdomains {
335 target-module@31000 { /* 0x44e31000, ap 24 40.0 */
336 compatible = "ti,sysc-omap2-timer", "ti,sysc";
337 ti,hwmods = "timer1";
341 reg-names = "rev", "sysc", "syss";
342 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
343 SYSC_OMAP2_SOFTRESET |
344 SYSC_OMAP2_AUTOIDLE)>;
345 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
349 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
350 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>;
352 #address-cells = <1>;
354 ranges = <0x0 0x31000 0x1000>;
357 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
359 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
361 clocks = <&timer1_fck>;
366 target-module@33000 { /* 0x44e33000, ap 26 18.0 */
367 compatible = "ti,sysc";
369 #address-cells = <1>;
371 ranges = <0x0 0x33000 0x1000>;
374 target-module@35000 { /* 0x44e35000, ap 28 50.0 */
375 compatible = "ti,sysc-omap2", "ti,sysc";
376 ti,hwmods = "wd_timer2";
380 reg-names = "rev", "sysc", "syss";
381 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
382 SYSC_OMAP2_SOFTRESET)>;
383 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
386 <SYSC_IDLE_SMART_WKUP>;
388 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
389 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
391 #address-cells = <1>;
393 ranges = <0x0 0x35000 0x1000>;
396 compatible = "ti,am4372-wdt","ti,omap3-wdt";
398 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
402 target-module@37000 { /* 0x44e37000, ap 30 08.0 */
403 compatible = "ti,sysc";
405 #address-cells = <1>;
407 ranges = <0x0 0x37000 0x1000>;
410 target-module@39000 { /* 0x44e39000, ap 32 02.0 */
411 compatible = "ti,sysc";
413 #address-cells = <1>;
415 ranges = <0x0 0x39000 0x1000>;
418 target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */
419 compatible = "ti,sysc-omap4-simple", "ti,sysc";
423 reg-names = "rev", "sysc";
424 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
427 <SYSC_IDLE_SMART_WKUP>;
428 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
429 clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
431 #address-cells = <1>;
433 ranges = <0x0 0x3e000 0x1000>;
436 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
439 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&clk_32768_ck>;
442 clock-names = "int-clk";
443 system-power-controller;
448 target-module@40000 { /* 0x44e40000, ap 36 68.0 */
449 compatible = "ti,sysc";
451 #address-cells = <1>;
453 ranges = <0x0 0x40000 0x40000>;
456 target-module@86000 { /* 0x44e86000, ap 40 70.0 */
457 compatible = "ti,sysc-omap2", "ti,sysc";
458 ti,hwmods = "counter_32k";
461 reg-names = "rev", "sysc";
462 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
464 /* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */
465 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>;
467 #address-cells = <1>;
469 ranges = <0x0 0x86000 0x1000>;
471 counter32k: counter@0 {
472 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
477 target-module@88000 { /* 0x44e88000, ap 38 12.0 */
478 compatible = "ti,sysc";
480 #address-cells = <1>;
482 ranges = <0x00000000 0x00088000 0x00008000>,
483 <0x00008000 0x00090000 0x00001000>,
484 <0x00009000 0x00091000 0x00001000>;
489 &l4_fast { /* 0x4a000000 */
490 compatible = "ti,am4-l4-fast", "simple-bus";
491 reg = <0x4a000000 0x800>,
494 reg-names = "ap", "la", "ia0";
495 #address-cells = <1>;
497 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */
499 segment@0 { /* 0x4a000000 */
500 compatible = "simple-bus";
501 #address-cells = <1>;
503 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
504 <0x00000800 0x00000800 0x000800>, /* ap 1 */
505 <0x00001000 0x00001000 0x000400>, /* ap 2 */
506 <0x00100000 0x00100000 0x008000>, /* ap 3 */
507 <0x00108000 0x00108000 0x001000>, /* ap 4 */
508 <0x00400000 0x00400000 0x002000>, /* ap 5 */
509 <0x00402000 0x00402000 0x001000>, /* ap 6 */
510 <0x00200000 0x00200000 0x080000>, /* ap 7 */
511 <0x00280000 0x00280000 0x001000>; /* ap 8 */
513 target-module@100000 { /* 0x4a100000, ap 3 04.0 */
514 compatible = "ti,sysc-omap4-simple", "ti,sysc";
515 ti,hwmods = "cpgmac0";
516 reg = <0x101200 0x4>,
519 reg-names = "rev", "sysc", "syss";
521 ti,sysc-midle = <SYSC_IDLE_FORCE>,
523 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
526 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
528 #address-cells = <1>;
530 ranges = <0x0 0x100000 0x8000>;
533 compatible = "ti,am4372-cpsw","ti,cpsw";
536 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
537 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
538 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
539 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
540 #address-cells = <1>;
542 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
543 <&dpll_clksel_mac_clk>;
544 clock-names = "fck", "cpts", "50mclk";
545 assigned-clocks = <&dpll_clksel_mac_clk>;
546 assigned-clock-rates = <50000000>;
548 cpdma_channels = <8>;
549 ale_entries = <1024>;
550 bd_ram_size = <0x2000>;
551 mac_control = <0x20>;
554 cpts_clock_mult = <0x80000000>;
555 cpts_clock_shift = <29>;
556 ranges = <0 0 0x8000>;
557 syscon = <&scm_conf>;
559 davinci_mdio: mdio@1000 {
560 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
561 reg = <0x1000 0x100>;
562 #address-cells = <1>;
564 clocks = <&cpsw_125mhz_gclk>;
566 ti,hwmods = "davinci_mdio";
567 bus_freq = <1000000>;
571 cpsw_emac0: slave@200 {
572 /* Filled in by U-Boot */
573 mac-address = [ 00 00 00 00 00 00 ];
574 phys = <&phy_gmii_sel 1 0>;
577 cpsw_emac1: slave@300 {
578 /* Filled in by U-Boot */
579 mac-address = [ 00 00 00 00 00 00 ];
580 phys = <&phy_gmii_sel 2 0>;
585 target-module@200000 { /* 0x4a200000, ap 7 02.0 */
586 compatible = "ti,sysc";
588 #address-cells = <1>;
590 ranges = <0x0 0x200000 0x80000>;
593 target-module@400000 { /* 0x4a400000, ap 5 08.0 */
594 compatible = "ti,sysc";
596 #address-cells = <1>;
598 ranges = <0x0 0x400000 0x2000>;
603 &l4_per { /* 0x48000000 */
604 compatible = "ti,am4-l4-per", "simple-bus";
605 reg = <0x48000000 0x800>,
611 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
612 #address-cells = <1>;
614 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */
615 <0x00100000 0x48100000 0x100000>, /* segment 1 */
616 <0x00200000 0x48200000 0x100000>, /* segment 2 */
617 <0x00300000 0x48300000 0x100000>, /* segment 3 */
618 <0x46000000 0x46000000 0x400000>, /* l3 data port */
619 <0x46400000 0x46400000 0x400000>; /* l3 data port */
621 segment@0 { /* 0x48000000 */
622 compatible = "simple-bus";
623 #address-cells = <1>;
625 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
626 <0x00000800 0x00000800 0x000800>, /* ap 1 */
627 <0x00001000 0x00001000 0x000400>, /* ap 2 */
628 <0x00001400 0x00001400 0x000400>, /* ap 3 */
629 <0x00001800 0x00001800 0x000400>, /* ap 4 */
630 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */
631 <0x00008000 0x00008000 0x001000>, /* ap 6 */
632 <0x00009000 0x00009000 0x001000>, /* ap 7 */
633 <0x00022000 0x00022000 0x001000>, /* ap 8 */
634 <0x00023000 0x00023000 0x001000>, /* ap 9 */
635 <0x00024000 0x00024000 0x001000>, /* ap 10 */
636 <0x00025000 0x00025000 0x001000>, /* ap 11 */
637 <0x0002a000 0x0002a000 0x001000>, /* ap 12 */
638 <0x0002b000 0x0002b000 0x001000>, /* ap 13 */
639 <0x00038000 0x00038000 0x002000>, /* ap 14 */
640 <0x0003a000 0x0003a000 0x001000>, /* ap 15 */
641 <0x0003c000 0x0003c000 0x002000>, /* ap 16 */
642 <0x0003e000 0x0003e000 0x001000>, /* ap 17 */
643 <0x00040000 0x00040000 0x001000>, /* ap 18 */
644 <0x00041000 0x00041000 0x001000>, /* ap 19 */
645 <0x00042000 0x00042000 0x001000>, /* ap 20 */
646 <0x00043000 0x00043000 0x001000>, /* ap 21 */
647 <0x00044000 0x00044000 0x001000>, /* ap 22 */
648 <0x00045000 0x00045000 0x001000>, /* ap 23 */
649 <0x00046000 0x00046000 0x001000>, /* ap 24 */
650 <0x00047000 0x00047000 0x001000>, /* ap 25 */
651 <0x00048000 0x00048000 0x001000>, /* ap 26 */
652 <0x00049000 0x00049000 0x001000>, /* ap 27 */
653 <0x0004c000 0x0004c000 0x001000>, /* ap 28 */
654 <0x0004d000 0x0004d000 0x001000>, /* ap 29 */
655 <0x00060000 0x00060000 0x001000>, /* ap 30 */
656 <0x00061000 0x00061000 0x001000>, /* ap 31 */
657 <0x00080000 0x00080000 0x010000>, /* ap 32 */
658 <0x00090000 0x00090000 0x001000>, /* ap 33 */
659 <0x00030000 0x00030000 0x001000>, /* ap 65 */
660 <0x00031000 0x00031000 0x001000>, /* ap 66 */
661 <0x0004a000 0x0004a000 0x001000>, /* ap 71 */
662 <0x0004b000 0x0004b000 0x001000>, /* ap 72 */
663 <0x000c8000 0x000c8000 0x001000>, /* ap 73 */
664 <0x000c9000 0x000c9000 0x001000>, /* ap 74 */
665 <0x000ca000 0x000ca000 0x001000>, /* ap 77 */
666 <0x000cb000 0x000cb000 0x001000>, /* ap 78 */
667 <0x00034000 0x00034000 0x001000>, /* ap 80 */
668 <0x00035000 0x00035000 0x001000>, /* ap 81 */
669 <0x00036000 0x00036000 0x001000>, /* ap 84 */
670 <0x00037000 0x00037000 0x001000>, /* ap 85 */
671 <0x46000000 0x46000000 0x400000>, /* l3 data port */
672 <0x46400000 0x46400000 0x400000>; /* l3 data port */
674 target-module@8000 { /* 0x48008000, ap 6 10.0 */
675 compatible = "ti,sysc";
677 #address-cells = <1>;
679 ranges = <0x0 0x8000 0x1000>;
682 target-module@22000 { /* 0x48022000, ap 8 0a.0 */
683 compatible = "ti,sysc-omap2", "ti,sysc";
688 reg-names = "rev", "sysc", "syss";
689 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
690 SYSC_OMAP2_SOFTRESET |
691 SYSC_OMAP2_AUTOIDLE)>;
692 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
695 <SYSC_IDLE_SMART_WKUP>;
696 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
697 clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>;
699 #address-cells = <1>;
701 ranges = <0x0 0x22000 0x1000>;
704 compatible = "ti,am4372-uart","ti,omap2-uart";
706 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
711 target-module@24000 { /* 0x48024000, ap 10 1c.0 */
712 compatible = "ti,sysc-omap2", "ti,sysc";
717 reg-names = "rev", "sysc", "syss";
718 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
719 SYSC_OMAP2_SOFTRESET |
720 SYSC_OMAP2_AUTOIDLE)>;
721 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
724 <SYSC_IDLE_SMART_WKUP>;
725 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
726 clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>;
728 #address-cells = <1>;
730 ranges = <0x0 0x24000 0x1000>;
733 compatible = "ti,am4372-uart","ti,omap2-uart";
735 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
740 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */
741 compatible = "ti,sysc-omap2", "ti,sysc";
746 reg-names = "rev", "sysc", "syss";
747 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
748 SYSC_OMAP2_ENAWAKEUP |
749 SYSC_OMAP2_SOFTRESET |
750 SYSC_OMAP2_AUTOIDLE)>;
751 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
754 <SYSC_IDLE_SMART_WKUP>;
756 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
757 clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>;
759 #address-cells = <1>;
761 ranges = <0x0 0x2a000 0x1000>;
764 compatible = "ti,am4372-i2c","ti,omap4-i2c";
766 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
767 #address-cells = <1>;
773 target-module@30000 { /* 0x48030000, ap 65 08.0 */
774 compatible = "ti,sysc-omap2", "ti,sysc";
779 reg-names = "rev", "sysc", "syss";
780 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
781 SYSC_OMAP2_SOFTRESET |
782 SYSC_OMAP2_AUTOIDLE)>;
783 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
787 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
788 clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>;
790 #address-cells = <1>;
792 ranges = <0x0 0x30000 0x1000>;
795 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
797 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
798 #address-cells = <1>;
804 target-module@34000 { /* 0x48034000, ap 80 56.0 */
805 compatible = "ti,sysc";
807 #address-cells = <1>;
809 ranges = <0x0 0x34000 0x1000>;
812 target-module@36000 { /* 0x48036000, ap 84 3e.0 */
813 compatible = "ti,sysc";
815 #address-cells = <1>;
817 ranges = <0x0 0x36000 0x1000>;
820 target-module@38000 { /* 0x48038000, ap 14 04.0 */
821 compatible = "ti,sysc-omap4-simple", "ti,sysc";
822 ti,hwmods = "mcasp0";
825 reg-names = "rev", "sysc";
826 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
829 /* Domains (P, C): per_pwrdm, l3s_clkdm */
830 clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>;
832 #address-cells = <1>;
834 ranges = <0x0 0x38000 0x2000>,
835 <0x46000000 0x46000000 0x400000>;
838 compatible = "ti,am33xx-mcasp-audio";
840 <0x46000000 0x400000>;
841 reg-names = "mpu", "dat";
842 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
843 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
844 interrupt-names = "tx", "rx";
848 dma-names = "tx", "rx";
852 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */
853 compatible = "ti,sysc-omap4-simple", "ti,sysc";
854 ti,hwmods = "mcasp1";
857 reg-names = "rev", "sysc";
858 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
861 /* Domains (P, C): per_pwrdm, l3s_clkdm */
862 clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>;
864 #address-cells = <1>;
866 ranges = <0x0 0x3c000 0x2000>,
867 <0x46400000 0x46400000 0x400000>;
870 compatible = "ti,am33xx-mcasp-audio";
872 <0x46400000 0x400000>;
873 reg-names = "mpu", "dat";
874 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
875 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
876 interrupt-names = "tx", "rx";
880 dma-names = "tx", "rx";
884 target-module@40000 { /* 0x48040000, ap 18 1e.0 */
885 compatible = "ti,sysc-omap4-timer", "ti,sysc";
886 ti,hwmods = "timer2";
890 reg-names = "rev", "sysc", "syss";
891 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
892 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
895 <SYSC_IDLE_SMART_WKUP>;
896 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
897 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>;
899 #address-cells = <1>;
901 ranges = <0x0 0x40000 0x1000>;
904 compatible = "ti,am4372-timer","ti,am335x-timer";
906 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
907 clocks = <&timer2_fck>;
912 target-module@42000 { /* 0x48042000, ap 20 24.0 */
913 compatible = "ti,sysc-omap4-timer", "ti,sysc";
914 ti,hwmods = "timer3";
918 reg-names = "rev", "sysc", "syss";
919 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
920 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
923 <SYSC_IDLE_SMART_WKUP>;
924 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
925 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>;
927 #address-cells = <1>;
929 ranges = <0x0 0x42000 0x1000>;
932 compatible = "ti,am4372-timer","ti,am335x-timer";
934 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
939 target-module@44000 { /* 0x48044000, ap 22 26.0 */
940 compatible = "ti,sysc-omap4-timer", "ti,sysc";
941 ti,hwmods = "timer4";
945 reg-names = "rev", "sysc", "syss";
946 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
947 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
950 <SYSC_IDLE_SMART_WKUP>;
951 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
952 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>;
954 #address-cells = <1>;
956 ranges = <0x0 0x44000 0x1000>;
959 compatible = "ti,am4372-timer","ti,am335x-timer";
961 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
967 target-module@46000 { /* 0x48046000, ap 24 28.0 */
968 compatible = "ti,sysc-omap4-timer", "ti,sysc";
969 ti,hwmods = "timer5";
973 reg-names = "rev", "sysc", "syss";
974 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
975 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
978 <SYSC_IDLE_SMART_WKUP>;
979 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
980 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>;
982 #address-cells = <1>;
984 ranges = <0x0 0x46000 0x1000>;
987 compatible = "ti,am4372-timer","ti,am335x-timer";
989 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
995 target-module@48000 { /* 0x48048000, ap 26 1a.0 */
996 compatible = "ti,sysc-omap4-timer", "ti,sysc";
997 ti,hwmods = "timer6";
1001 reg-names = "rev", "sysc", "syss";
1002 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1003 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1006 <SYSC_IDLE_SMART_WKUP>;
1007 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1008 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>;
1009 clock-names = "fck";
1010 #address-cells = <1>;
1012 ranges = <0x0 0x48000 0x1000>;
1015 compatible = "ti,am4372-timer","ti,am335x-timer";
1017 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1019 status = "disabled";
1023 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */
1024 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1025 ti,hwmods = "timer7";
1026 reg = <0x4a000 0x4>,
1029 reg-names = "rev", "sysc", "syss";
1030 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1031 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1034 <SYSC_IDLE_SMART_WKUP>;
1035 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1036 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>;
1037 clock-names = "fck";
1038 #address-cells = <1>;
1040 ranges = <0x0 0x4a000 0x1000>;
1043 compatible = "ti,am4372-timer","ti,am335x-timer";
1045 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1047 status = "disabled";
1051 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */
1052 compatible = "ti,sysc-omap2", "ti,sysc";
1053 ti,hwmods = "gpio2";
1054 reg = <0x4c000 0x4>,
1057 reg-names = "rev", "sysc", "syss";
1058 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1059 SYSC_OMAP2_SOFTRESET |
1060 SYSC_OMAP2_AUTOIDLE)>;
1061 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1064 <SYSC_IDLE_SMART_WKUP>;
1066 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1067 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>,
1068 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>;
1069 clock-names = "fck", "dbclk";
1070 #address-cells = <1>;
1072 ranges = <0x0 0x4c000 0x1000>;
1075 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1077 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1080 interrupt-controller;
1081 #interrupt-cells = <2>;
1082 status = "disabled";
1086 target-module@60000 { /* 0x48060000, ap 30 14.0 */
1087 compatible = "ti,sysc-omap2", "ti,sysc";
1089 reg = <0x602fc 0x4>,
1092 reg-names = "rev", "sysc", "syss";
1093 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1094 SYSC_OMAP2_ENAWAKEUP |
1095 SYSC_OMAP2_SOFTRESET |
1096 SYSC_OMAP2_AUTOIDLE)>;
1097 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1101 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1102 clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>;
1103 clock-names = "fck";
1104 #address-cells = <1>;
1106 ranges = <0x0 0x60000 0x1000>;
1109 compatible = "ti,omap4-hsmmc";
1112 ti,needs-special-reset;
1113 dmas = <&edma 24 0>,
1115 dma-names = "tx", "rx";
1116 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1117 status = "disabled";
1121 target-module@80000 { /* 0x48080000, ap 32 18.0 */
1122 compatible = "ti,sysc-omap2", "ti,sysc";
1124 reg = <0x80000 0x4>,
1127 reg-names = "rev", "sysc", "syss";
1128 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1129 SYSC_OMAP2_SOFTRESET |
1130 SYSC_OMAP2_AUTOIDLE)>;
1131 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1135 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1136 clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>;
1137 clock-names = "fck";
1138 #address-cells = <1>;
1140 ranges = <0x0 0x80000 0x10000>;
1143 compatible = "ti,am3352-elm";
1145 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1146 clocks = <&l4ls_gclk>;
1147 clock-names = "fck";
1148 status = "disabled";
1152 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */
1153 compatible = "ti,sysc-omap4", "ti,sysc";
1154 ti,hwmods = "mailbox";
1155 reg = <0xc8000 0x4>,
1157 reg-names = "rev", "sysc";
1158 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1159 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1162 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1163 clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>;
1164 clock-names = "fck";
1165 #address-cells = <1>;
1167 ranges = <0x0 0xc8000 0x1000>;
1169 mailbox: mailbox@0 {
1170 compatible = "ti,omap4-mailbox";
1172 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1174 ti,mbox-num-users = <4>;
1175 ti,mbox-num-fifos = <8>;
1176 mbox_wkupm3: wkup_m3 {
1178 ti,mbox-tx = <0 0 0>;
1179 ti,mbox-rx = <0 0 3>;
1184 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */
1185 compatible = "ti,sysc-omap2", "ti,sysc";
1186 ti,hwmods = "spinlock";
1187 reg = <0xca000 0x4>,
1190 reg-names = "rev", "sysc", "syss";
1191 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1192 SYSC_OMAP2_ENAWAKEUP |
1193 SYSC_OMAP2_SOFTRESET |
1194 SYSC_OMAP2_AUTOIDLE)>;
1195 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1199 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1200 clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>;
1201 clock-names = "fck";
1202 #address-cells = <1>;
1204 ranges = <0x0 0xca000 0x1000>;
1206 hwspinlock: spinlock@0 {
1207 compatible = "ti,omap4-hwspinlock";
1209 #hwlock-cells = <1>;
1214 segment@100000 { /* 0x48100000 */
1215 compatible = "simple-bus";
1216 #address-cells = <1>;
1218 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */
1219 <0x0008d000 0x0018d000 0x001000>, /* ap 35 */
1220 <0x0008e000 0x0018e000 0x001000>, /* ap 36 */
1221 <0x0008f000 0x0018f000 0x001000>, /* ap 37 */
1222 <0x0009c000 0x0019c000 0x001000>, /* ap 38 */
1223 <0x0009d000 0x0019d000 0x001000>, /* ap 39 */
1224 <0x000a6000 0x001a6000 0x001000>, /* ap 40 */
1225 <0x000a7000 0x001a7000 0x001000>, /* ap 41 */
1226 <0x000a8000 0x001a8000 0x001000>, /* ap 42 */
1227 <0x000a9000 0x001a9000 0x001000>, /* ap 43 */
1228 <0x000aa000 0x001aa000 0x001000>, /* ap 44 */
1229 <0x000ab000 0x001ab000 0x001000>, /* ap 45 */
1230 <0x000ac000 0x001ac000 0x001000>, /* ap 46 */
1231 <0x000ad000 0x001ad000 0x001000>, /* ap 47 */
1232 <0x000ae000 0x001ae000 0x001000>, /* ap 48 */
1233 <0x000af000 0x001af000 0x001000>, /* ap 49 */
1234 <0x000cc000 0x001cc000 0x002000>, /* ap 50 */
1235 <0x000ce000 0x001ce000 0x002000>, /* ap 51 */
1236 <0x000d0000 0x001d0000 0x002000>, /* ap 52 */
1237 <0x000d2000 0x001d2000 0x002000>, /* ap 53 */
1238 <0x000d8000 0x001d8000 0x001000>, /* ap 54 */
1239 <0x000d9000 0x001d9000 0x001000>, /* ap 55 */
1240 <0x000a0000 0x001a0000 0x001000>, /* ap 67 */
1241 <0x000a1000 0x001a1000 0x001000>, /* ap 68 */
1242 <0x000a2000 0x001a2000 0x001000>, /* ap 69 */
1243 <0x000a3000 0x001a3000 0x001000>, /* ap 70 */
1244 <0x000a4000 0x001a4000 0x001000>, /* ap 92 */
1245 <0x000a5000 0x001a5000 0x001000>, /* ap 93 */
1246 <0x000c1000 0x001c1000 0x001000>, /* ap 94 */
1247 <0x000c2000 0x001c2000 0x001000>; /* ap 95 */
1249 target-module@8c000 { /* 0x4818c000, ap 34 0c.0 */
1250 compatible = "ti,sysc";
1251 status = "disabled";
1252 #address-cells = <1>;
1254 ranges = <0x0 0x8c000 0x1000>;
1257 target-module@8e000 { /* 0x4818e000, ap 36 02.0 */
1258 compatible = "ti,sysc";
1259 status = "disabled";
1260 #address-cells = <1>;
1262 ranges = <0x0 0x8e000 0x1000>;
1265 target-module@9c000 { /* 0x4819c000, ap 38 52.0 */
1266 compatible = "ti,sysc-omap2", "ti,sysc";
1268 reg = <0x9c000 0x8>,
1271 reg-names = "rev", "sysc", "syss";
1272 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1273 SYSC_OMAP2_ENAWAKEUP |
1274 SYSC_OMAP2_SOFTRESET |
1275 SYSC_OMAP2_AUTOIDLE)>;
1276 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1279 <SYSC_IDLE_SMART_WKUP>;
1281 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1282 clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>;
1283 clock-names = "fck";
1284 #address-cells = <1>;
1286 ranges = <0x0 0x9c000 0x1000>;
1289 compatible = "ti,am4372-i2c","ti,omap4-i2c";
1291 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1292 #address-cells = <1>;
1294 status = "disabled";
1298 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */
1299 compatible = "ti,sysc-omap2", "ti,sysc";
1301 reg = <0xa0000 0x4>,
1304 reg-names = "rev", "sysc", "syss";
1305 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1306 SYSC_OMAP2_SOFTRESET |
1307 SYSC_OMAP2_AUTOIDLE)>;
1308 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1312 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1313 clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>;
1314 clock-names = "fck";
1315 #address-cells = <1>;
1317 ranges = <0x0 0xa0000 0x1000>;
1320 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1322 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1323 #address-cells = <1>;
1325 status = "disabled";
1329 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */
1330 compatible = "ti,sysc-omap2", "ti,sysc";
1332 reg = <0xa2000 0x4>,
1335 reg-names = "rev", "sysc", "syss";
1336 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1337 SYSC_OMAP2_SOFTRESET |
1338 SYSC_OMAP2_AUTOIDLE)>;
1339 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1343 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1344 clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>;
1345 clock-names = "fck";
1346 #address-cells = <1>;
1348 ranges = <0x0 0xa2000 0x1000>;
1351 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1353 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1354 #address-cells = <1>;
1356 status = "disabled";
1360 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */
1361 compatible = "ti,sysc-omap2", "ti,sysc";
1363 reg = <0xa4000 0x4>,
1366 reg-names = "rev", "sysc", "syss";
1367 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1368 SYSC_OMAP2_SOFTRESET |
1369 SYSC_OMAP2_AUTOIDLE)>;
1370 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1374 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1375 clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>;
1376 clock-names = "fck";
1377 #address-cells = <1>;
1379 ranges = <0x0 0xa4000 0x1000>;
1382 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1384 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
1385 #address-cells = <1>;
1387 status = "disabled";
1391 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */
1392 compatible = "ti,sysc-omap2", "ti,sysc";
1393 ti,hwmods = "uart4";
1394 reg = <0xa6050 0x4>,
1397 reg-names = "rev", "sysc", "syss";
1398 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1399 SYSC_OMAP2_SOFTRESET |
1400 SYSC_OMAP2_AUTOIDLE)>;
1401 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1404 <SYSC_IDLE_SMART_WKUP>;
1405 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1406 clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>;
1407 clock-names = "fck";
1408 #address-cells = <1>;
1410 ranges = <0x0 0xa6000 0x1000>;
1413 compatible = "ti,am4372-uart","ti,omap2-uart";
1415 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1416 status = "disabled";
1420 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */
1421 compatible = "ti,sysc-omap2", "ti,sysc";
1422 ti,hwmods = "uart5";
1423 reg = <0xa8050 0x4>,
1426 reg-names = "rev", "sysc", "syss";
1427 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1428 SYSC_OMAP2_SOFTRESET |
1429 SYSC_OMAP2_AUTOIDLE)>;
1430 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1433 <SYSC_IDLE_SMART_WKUP>;
1434 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1435 clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>;
1436 clock-names = "fck";
1437 #address-cells = <1>;
1439 ranges = <0x0 0xa8000 0x1000>;
1442 compatible = "ti,am4372-uart","ti,omap2-uart";
1444 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1445 status = "disabled";
1449 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */
1450 compatible = "ti,sysc-omap2", "ti,sysc";
1451 ti,hwmods = "uart6";
1452 reg = <0xaa050 0x4>,
1455 reg-names = "rev", "sysc", "syss";
1456 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1457 SYSC_OMAP2_SOFTRESET |
1458 SYSC_OMAP2_AUTOIDLE)>;
1459 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1462 <SYSC_IDLE_SMART_WKUP>;
1463 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1464 clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>;
1465 clock-names = "fck";
1466 #address-cells = <1>;
1468 ranges = <0x0 0xaa000 0x1000>;
1471 compatible = "ti,am4372-uart","ti,omap2-uart";
1473 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1474 status = "disabled";
1478 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */
1479 compatible = "ti,sysc-omap2", "ti,sysc";
1480 ti,hwmods = "gpio3";
1481 reg = <0xac000 0x4>,
1484 reg-names = "rev", "sysc", "syss";
1485 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1486 SYSC_OMAP2_SOFTRESET |
1487 SYSC_OMAP2_AUTOIDLE)>;
1488 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1491 <SYSC_IDLE_SMART_WKUP>;
1493 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1494 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>,
1495 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>;
1496 clock-names = "fck", "dbclk";
1497 #address-cells = <1>;
1499 ranges = <0x0 0xac000 0x1000>;
1502 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1504 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1507 interrupt-controller;
1508 #interrupt-cells = <2>;
1509 status = "disabled";
1513 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */
1514 compatible = "ti,sysc-omap2", "ti,sysc";
1515 ti,hwmods = "gpio4";
1516 reg = <0xae000 0x4>,
1519 reg-names = "rev", "sysc", "syss";
1520 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1521 SYSC_OMAP2_SOFTRESET |
1522 SYSC_OMAP2_AUTOIDLE)>;
1523 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1526 <SYSC_IDLE_SMART_WKUP>;
1528 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1529 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>,
1530 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>;
1531 clock-names = "fck", "dbclk";
1532 #address-cells = <1>;
1534 ranges = <0x0 0xae000 0x1000>;
1537 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1539 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1542 interrupt-controller;
1543 #interrupt-cells = <2>;
1544 status = "disabled";
1548 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */
1549 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1550 ti,hwmods = "timer8";
1551 reg = <0xc1000 0x4>,
1554 reg-names = "rev", "sysc", "syss";
1555 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1556 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1559 <SYSC_IDLE_SMART_WKUP>;
1560 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1561 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>;
1562 clock-names = "fck";
1563 #address-cells = <1>;
1565 ranges = <0x0 0xc1000 0x1000>;
1568 compatible = "ti,am4372-timer","ti,am335x-timer";
1570 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
1571 status = "disabled";
1575 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */
1576 compatible = "ti,sysc-omap4", "ti,sysc";
1577 ti,hwmods = "d_can0";
1578 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1579 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;
1580 clock-names = "fck";
1581 #address-cells = <1>;
1583 ranges = <0x0 0xcc000 0x2000>;
1586 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1588 syscon-raminit = <&scm_conf 0x644 0>;
1589 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1590 status = "disabled";
1594 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */
1595 compatible = "ti,sysc-omap4", "ti,sysc";
1596 ti,hwmods = "d_can1";
1597 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1598 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;
1599 clock-names = "fck";
1600 #address-cells = <1>;
1602 ranges = <0x0 0xd0000 0x2000>;
1605 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1607 syscon-raminit = <&scm_conf 0x644 1>;
1608 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1609 status = "disabled";
1613 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */
1614 compatible = "ti,sysc-omap2", "ti,sysc";
1616 reg = <0xd82fc 0x4>,
1619 reg-names = "rev", "sysc", "syss";
1620 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1621 SYSC_OMAP2_ENAWAKEUP |
1622 SYSC_OMAP2_SOFTRESET |
1623 SYSC_OMAP2_AUTOIDLE)>;
1624 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1628 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1629 clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>;
1630 clock-names = "fck";
1631 #address-cells = <1>;
1633 ranges = <0x0 0xd8000 0x1000>;
1636 compatible = "ti,omap4-hsmmc";
1638 ti,needs-special-reset;
1641 dma-names = "tx", "rx";
1642 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1643 status = "disabled";
1648 segment@200000 { /* 0x48200000 */
1649 compatible = "simple-bus";
1650 #address-cells = <1>;
1654 segment@300000 { /* 0x48300000 */
1655 compatible = "simple-bus";
1656 #address-cells = <1>;
1658 ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */
1659 <0x00001000 0x00301000 0x001000>, /* ap 57 */
1660 <0x00002000 0x00302000 0x001000>, /* ap 58 */
1661 <0x00003000 0x00303000 0x001000>, /* ap 59 */
1662 <0x00004000 0x00304000 0x001000>, /* ap 60 */
1663 <0x00005000 0x00305000 0x001000>, /* ap 61 */
1664 <0x00018000 0x00318000 0x004000>, /* ap 62 */
1665 <0x0001c000 0x0031c000 0x001000>, /* ap 63 */
1666 <0x00010000 0x00310000 0x002000>, /* ap 64 */
1667 <0x00028000 0x00328000 0x001000>, /* ap 75 */
1668 <0x00029000 0x00329000 0x001000>, /* ap 76 */
1669 <0x00012000 0x00312000 0x001000>, /* ap 79 */
1670 <0x00020000 0x00320000 0x001000>, /* ap 82 */
1671 <0x00021000 0x00321000 0x001000>, /* ap 83 */
1672 <0x00026000 0x00326000 0x001000>, /* ap 86 */
1673 <0x00027000 0x00327000 0x001000>, /* ap 87 */
1674 <0x0002a000 0x0032a000 0x000400>, /* ap 88 */
1675 <0x0002c000 0x0032c000 0x001000>, /* ap 89 */
1676 <0x00013000 0x00313000 0x001000>, /* ap 90 */
1677 <0x00014000 0x00314000 0x001000>, /* ap 91 */
1678 <0x00006000 0x00306000 0x001000>, /* ap 96 */
1679 <0x00007000 0x00307000 0x001000>, /* ap 97 */
1680 <0x00008000 0x00308000 0x001000>, /* ap 98 */
1681 <0x00009000 0x00309000 0x001000>, /* ap 99 */
1682 <0x0000a000 0x0030a000 0x001000>, /* ap 100 */
1683 <0x0000b000 0x0030b000 0x001000>, /* ap 101 */
1684 <0x0003d000 0x0033d000 0x001000>, /* ap 102 */
1685 <0x0003e000 0x0033e000 0x001000>, /* ap 103 */
1686 <0x0003f000 0x0033f000 0x001000>, /* ap 104 */
1687 <0x00040000 0x00340000 0x001000>, /* ap 105 */
1688 <0x00041000 0x00341000 0x001000>, /* ap 106 */
1689 <0x00042000 0x00342000 0x001000>, /* ap 107 */
1690 <0x00045000 0x00345000 0x001000>, /* ap 108 */
1691 <0x00046000 0x00346000 0x001000>, /* ap 109 */
1692 <0x00047000 0x00347000 0x001000>, /* ap 110 */
1693 <0x00048000 0x00348000 0x001000>, /* ap 111 */
1694 <0x000f2000 0x003f2000 0x002000>, /* ap 112 */
1695 <0x000f4000 0x003f4000 0x001000>, /* ap 113 */
1696 <0x0004c000 0x0034c000 0x002000>, /* ap 114 */
1697 <0x0004e000 0x0034e000 0x001000>, /* ap 115 */
1698 <0x00022000 0x00322000 0x001000>, /* ap 116 */
1699 <0x00023000 0x00323000 0x001000>, /* ap 117 */
1700 <0x000f0000 0x003f0000 0x001000>, /* ap 118 */
1701 <0x0002a400 0x0032a400 0x000400>, /* ap 119 */
1702 <0x0002a800 0x0032a800 0x000400>, /* ap 120 */
1703 <0x0002ac00 0x0032ac00 0x000400>, /* ap 121 */
1704 <0x0002b000 0x0032b000 0x001000>, /* ap 122 */
1705 <0x00080000 0x00380000 0x020000>, /* ap 123 */
1706 <0x000a0000 0x003a0000 0x001000>, /* ap 124 */
1707 <0x000a8000 0x003a8000 0x008000>, /* ap 125 */
1708 <0x000b0000 0x003b0000 0x001000>, /* ap 126 */
1709 <0x000c0000 0x003c0000 0x020000>, /* ap 127 */
1710 <0x000e0000 0x003e0000 0x001000>, /* ap 128 */
1711 <0x000e8000 0x003e8000 0x008000>; /* ap 129 */
1713 target-module@0 { /* 0x48300000, ap 56 40.0 */
1714 compatible = "ti,sysc-omap4", "ti,sysc";
1715 ti,hwmods = "epwmss0";
1718 reg-names = "rev", "sysc";
1719 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1722 <SYSC_IDLE_SMART_WKUP>;
1723 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1726 <SYSC_IDLE_SMART_WKUP>;
1727 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1728 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>;
1729 clock-names = "fck";
1730 #address-cells = <1>;
1732 ranges = <0x0 0x0 0x1000>;
1735 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1737 #address-cells = <1>;
1739 ranges = <0 0 0x1000>;
1740 status = "disabled";
1743 compatible = "ti,am4372-ecap",
1748 clocks = <&l4ls_gclk>;
1749 clock-names = "fck";
1750 status = "disabled";
1754 compatible = "ti,am4372-ehrpwm",
1759 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1760 clock-names = "tbclk", "fck";
1761 status = "disabled";
1766 target-module@2000 { /* 0x48302000, ap 58 4a.0 */
1767 compatible = "ti,sysc-omap4", "ti,sysc";
1768 ti,hwmods = "epwmss1";
1771 reg-names = "rev", "sysc";
1772 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1775 <SYSC_IDLE_SMART_WKUP>;
1776 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1779 <SYSC_IDLE_SMART_WKUP>;
1780 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1781 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>;
1782 clock-names = "fck";
1783 #address-cells = <1>;
1785 ranges = <0x0 0x2000 0x1000>;
1788 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1790 #address-cells = <1>;
1792 ranges = <0 0 0x1000>;
1793 status = "disabled";
1796 compatible = "ti,am4372-ecap",
1801 clocks = <&l4ls_gclk>;
1802 clock-names = "fck";
1803 status = "disabled";
1807 compatible = "ti,am4372-ehrpwm",
1812 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1813 clock-names = "tbclk", "fck";
1814 status = "disabled";
1819 target-module@4000 { /* 0x48304000, ap 60 44.0 */
1820 compatible = "ti,sysc-omap4", "ti,sysc";
1821 ti,hwmods = "epwmss2";
1824 reg-names = "rev", "sysc";
1825 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1828 <SYSC_IDLE_SMART_WKUP>;
1829 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1832 <SYSC_IDLE_SMART_WKUP>;
1833 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1834 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>;
1835 clock-names = "fck";
1836 #address-cells = <1>;
1838 ranges = <0x0 0x4000 0x1000>;
1841 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1843 #address-cells = <1>;
1845 ranges = <0 0 0x1000>;
1846 status = "disabled";
1849 compatible = "ti,am4372-ecap",
1854 clocks = <&l4ls_gclk>;
1855 clock-names = "fck";
1856 status = "disabled";
1860 compatible = "ti,am4372-ehrpwm",
1865 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
1866 clock-names = "tbclk", "fck";
1867 status = "disabled";
1872 target-module@6000 { /* 0x48306000, ap 96 58.0 */
1873 compatible = "ti,sysc-omap4", "ti,sysc";
1874 ti,hwmods = "epwmss3";
1877 reg-names = "rev", "sysc";
1878 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1881 <SYSC_IDLE_SMART_WKUP>;
1882 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1885 <SYSC_IDLE_SMART_WKUP>;
1886 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1887 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>;
1888 clock-names = "fck";
1889 #address-cells = <1>;
1891 ranges = <0x0 0x6000 0x1000>;
1894 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1896 #address-cells = <1>;
1898 ranges = <0 0 0x1000>;
1899 status = "disabled";
1902 compatible = "ti,am4372-ehrpwm",
1907 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
1908 clock-names = "tbclk", "fck";
1909 status = "disabled";
1914 target-module@8000 { /* 0x48308000, ap 98 54.0 */
1915 compatible = "ti,sysc-omap4", "ti,sysc";
1916 ti,hwmods = "epwmss4";
1919 reg-names = "rev", "sysc";
1920 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1923 <SYSC_IDLE_SMART_WKUP>;
1924 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1927 <SYSC_IDLE_SMART_WKUP>;
1928 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1929 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>;
1930 clock-names = "fck";
1931 #address-cells = <1>;
1933 ranges = <0x0 0x8000 0x1000>;
1936 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1938 #address-cells = <1>;
1940 ranges = <0 0 0x1000>;
1941 status = "disabled";
1943 ehrpwm4: pwm@48308200 {
1944 compatible = "ti,am4372-ehrpwm",
1949 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
1950 clock-names = "tbclk", "fck";
1951 status = "disabled";
1956 target-module@a000 { /* 0x4830a000, ap 100 60.0 */
1957 compatible = "ti,sysc-omap4", "ti,sysc";
1958 ti,hwmods = "epwmss5";
1961 reg-names = "rev", "sysc";
1962 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1965 <SYSC_IDLE_SMART_WKUP>;
1966 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1969 <SYSC_IDLE_SMART_WKUP>;
1970 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1971 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>;
1972 clock-names = "fck";
1973 #address-cells = <1>;
1975 ranges = <0x0 0xa000 0x1000>;
1978 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1980 #address-cells = <1>;
1982 ranges = <0 0 0x1000>;
1983 status = "disabled";
1986 compatible = "ti,am4372-ehrpwm",
1991 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
1992 clock-names = "tbclk", "fck";
1993 status = "disabled";
1998 target-module@10000 { /* 0x48310000, ap 64 4e.1 */
1999 compatible = "ti,sysc-omap2", "ti,sysc";
2001 reg = <0x11fe0 0x4>,
2003 reg-names = "rev", "sysc";
2004 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
2005 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2007 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2008 clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>;
2009 clock-names = "fck";
2010 #address-cells = <1>;
2012 ranges = <0x0 0x10000 0x2000>;
2015 compatible = "ti,omap4-rng";
2017 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
2021 target-module@13000 { /* 0x48313000, ap 90 50.0 */
2022 compatible = "ti,sysc";
2023 status = "disabled";
2024 #address-cells = <1>;
2026 ranges = <0x0 0x13000 0x1000>;
2029 target-module@18000 { /* 0x48318000, ap 62 4c.0 */
2030 compatible = "ti,sysc";
2031 status = "disabled";
2032 #address-cells = <1>;
2034 ranges = <0x0 0x18000 0x4000>;
2037 target-module@20000 { /* 0x48320000, ap 82 34.0 */
2038 compatible = "ti,sysc-omap2", "ti,sysc";
2039 ti,hwmods = "gpio5";
2040 reg = <0x20000 0x4>,
2043 reg-names = "rev", "sysc", "syss";
2044 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2045 SYSC_OMAP2_SOFTRESET |
2046 SYSC_OMAP2_AUTOIDLE)>;
2047 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2050 <SYSC_IDLE_SMART_WKUP>;
2052 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2053 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>,
2054 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>;
2055 clock-names = "fck", "dbclk";
2056 #address-cells = <1>;
2058 ranges = <0x0 0x20000 0x1000>;
2061 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2063 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
2066 interrupt-controller;
2067 #interrupt-cells = <2>;
2068 status = "disabled";
2072 target-module@22000 { /* 0x48322000, ap 116 64.0 */
2073 compatible = "ti,sysc-omap2", "ti,sysc";
2074 ti,hwmods = "gpio6";
2075 reg = <0x22000 0x4>,
2078 reg-names = "rev", "sysc", "syss";
2079 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2080 SYSC_OMAP2_SOFTRESET |
2081 SYSC_OMAP2_AUTOIDLE)>;
2082 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2085 <SYSC_IDLE_SMART_WKUP>;
2087 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2088 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>,
2089 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>;
2090 clock-names = "fck", "dbclk";
2091 #address-cells = <1>;
2093 ranges = <0x0 0x22000 0x1000>;
2096 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2098 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2101 interrupt-controller;
2102 #interrupt-cells = <2>;
2103 status = "disabled";
2107 target-module@26000 { /* 0x48326000, ap 86 66.0 */
2108 compatible = "ti,sysc-omap4", "ti,sysc";
2109 ti,hwmods = "vpfe0";
2110 reg = <0x26000 0x4>,
2112 reg-names = "rev", "sysc";
2113 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2116 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2119 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2120 clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>;
2121 clock-names = "fck";
2122 #address-cells = <1>;
2124 ranges = <0x0 0x26000 0x1000>;
2127 compatible = "ti,am437x-vpfe";
2129 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2130 status = "disabled";
2134 target-module@28000 { /* 0x48328000, ap 75 0e.0 */
2135 compatible = "ti,sysc-omap4", "ti,sysc";
2136 ti,hwmods = "vpfe1";
2137 reg = <0x28000 0x4>,
2139 reg-names = "rev", "sysc";
2140 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2143 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2146 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2147 clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>;
2148 clock-names = "fck";
2149 #address-cells = <1>;
2151 ranges = <0x0 0x28000 0x1000>;
2154 compatible = "ti,am437x-vpfe";
2156 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
2157 status = "disabled";
2161 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */
2162 compatible = "ti,sysc-omap2", "ti,sysc";
2163 ti,hwmods = "dss_core";
2164 reg = <0x2a000 0x4>,
2167 reg-names = "rev", "sysc", "syss";
2168 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2169 SYSC_OMAP2_AUTOIDLE)>;
2171 /* Domains (P, C): per_pwrdm, dss_clkdm */
2172 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2173 clock-names = "fck";
2174 #address-cells = <1>;
2176 ranges = <0x00000000 0x0002a000 0x00000400>,
2177 <0x00000400 0x0002a400 0x00000400>,
2178 <0x00000800 0x0002a800 0x00000400>,
2179 <0x00000c00 0x0002ac00 0x00000400>,
2180 <0x00001000 0x0002b000 0x00001000>;
2183 target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */
2184 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2185 ti,hwmods = "timer9";
2186 reg = <0x3d000 0x4>,
2189 reg-names = "rev", "sysc", "syss";
2190 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2191 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2194 <SYSC_IDLE_SMART_WKUP>;
2195 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2196 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>;
2197 clock-names = "fck";
2198 #address-cells = <1>;
2200 ranges = <0x0 0x3d000 0x1000>;
2203 compatible = "ti,am4372-timer","ti,am335x-timer";
2205 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
2206 status = "disabled";
2210 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */
2211 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2212 ti,hwmods = "timer10";
2213 reg = <0x3f000 0x4>,
2216 reg-names = "rev", "sysc", "syss";
2217 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2218 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2221 <SYSC_IDLE_SMART_WKUP>;
2222 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2223 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>;
2224 clock-names = "fck";
2225 #address-cells = <1>;
2227 ranges = <0x0 0x3f000 0x1000>;
2230 compatible = "ti,am4372-timer","ti,am335x-timer";
2232 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
2233 status = "disabled";
2237 target-module@41000 { /* 0x48341000, ap 106 76.0 */
2238 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2239 ti,hwmods = "timer11";
2240 reg = <0x41000 0x4>,
2243 reg-names = "rev", "sysc", "syss";
2244 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2245 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2248 <SYSC_IDLE_SMART_WKUP>;
2249 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2250 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>;
2251 clock-names = "fck";
2252 #address-cells = <1>;
2254 ranges = <0x0 0x41000 0x1000>;
2257 compatible = "ti,am4372-timer","ti,am335x-timer";
2259 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
2260 status = "disabled";
2264 target-module@45000 { /* 0x48345000, ap 108 6a.0 */
2265 compatible = "ti,sysc-omap2", "ti,sysc";
2267 reg = <0x45000 0x4>,
2270 reg-names = "rev", "sysc", "syss";
2271 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2272 SYSC_OMAP2_SOFTRESET |
2273 SYSC_OMAP2_AUTOIDLE)>;
2274 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2278 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2279 clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>;
2280 clock-names = "fck";
2281 #address-cells = <1>;
2283 ranges = <0x0 0x45000 0x1000>;
2286 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
2288 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
2289 #address-cells = <1>;
2291 status = "disabled";
2295 target-module@47000 { /* 0x48347000, ap 110 70.0 */
2296 compatible = "ti,sysc-omap2", "ti,sysc";
2297 ti,hwmods = "hdq1w";
2298 reg = <0x47000 0x4>,
2301 reg-names = "rev", "sysc", "syss";
2302 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2303 SYSC_OMAP2_AUTOIDLE)>;
2304 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2305 clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>;
2306 clock-names = "fck";
2307 #address-cells = <1>;
2309 ranges = <0x0 0x47000 0x1000>;
2312 compatible = "ti,am4372-hdq";
2314 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
2315 clocks = <&func_12m_clk>;
2316 clock-names = "fck";
2317 status = "disabled";
2321 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */
2322 compatible = "ti,sysc";
2323 status = "disabled";
2324 #address-cells = <1>;
2326 ranges = <0x0 0x4c000 0x2000>;
2329 target-module@80000 { /* 0x48380000, ap 123 42.0 */
2330 compatible = "ti,sysc-omap4", "ti,sysc";
2331 ti,hwmods = "usb_otg_ss0";
2332 reg = <0x80000 0x4>,
2334 reg-names = "rev", "sysc";
2335 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2336 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2339 <SYSC_IDLE_SMART_WKUP>;
2340 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2343 <SYSC_IDLE_SMART_WKUP>;
2344 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2345 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>;
2346 clock-names = "fck";
2347 #address-cells = <1>;
2349 ranges = <0x0 0x80000 0x20000>;
2351 dwc3_1: omap_dwc3@0 {
2352 compatible = "ti,am437x-dwc3";
2353 reg = <0x0 0x10000>;
2354 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2355 #address-cells = <1>;
2358 ranges = <0 0 0x20000>;
2361 compatible = "synopsys,dwc3";
2362 reg = <0x10000 0x10000>;
2363 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2364 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2365 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2366 interrupt-names = "peripheral",
2369 phys = <&usb2_phy1>;
2370 phy-names = "usb2-phy";
2371 maximum-speed = "high-speed";
2373 status = "disabled";
2374 snps,dis_u3_susphy_quirk;
2375 snps,dis_u2_susphy_quirk;
2380 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */
2381 compatible = "ti,sysc-omap4", "ti,sysc";
2382 ti,hwmods = "ocp2scp0";
2383 reg = <0xa8000 0x4>;
2385 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2386 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>;
2387 clock-names = "fck";
2388 #address-cells = <1>;
2390 ranges = <0x0 0xa8000 0x8000>;
2392 ocp2scp0: ocp2scp@0 {
2393 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2394 #address-cells = <1>;
2396 ranges = <0 0 0x8000>;
2398 usb2_phy1: phy@8000 {
2399 compatible = "ti,am437x-usb2";
2401 syscon-phy-power = <&scm_conf 0x620>;
2402 clocks = <&usb_phy0_always_on_clk32k>,
2403 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>;
2404 clock-names = "wkupclk", "refclk";
2406 status = "disabled";
2411 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */
2412 compatible = "ti,sysc-omap4", "ti,sysc";
2413 ti,hwmods = "usb_otg_ss1";
2414 reg = <0xc0000 0x4>,
2416 reg-names = "rev", "sysc";
2417 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2418 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2421 <SYSC_IDLE_SMART_WKUP>;
2422 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2425 <SYSC_IDLE_SMART_WKUP>;
2426 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2427 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>;
2428 clock-names = "fck";
2429 #address-cells = <1>;
2431 ranges = <0x0 0xc0000 0x20000>;
2433 dwc3_2: omap_dwc3@0 {
2434 compatible = "ti,am437x-dwc3";
2435 reg = <0x0 0x10000>;
2436 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2437 #address-cells = <1>;
2440 ranges = <0 0 0x20000>;
2443 compatible = "synopsys,dwc3";
2444 reg = <0x10000 0x10000>;
2445 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2446 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2447 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2448 interrupt-names = "peripheral",
2451 phys = <&usb2_phy2>;
2452 phy-names = "usb2-phy";
2453 maximum-speed = "high-speed";
2455 status = "disabled";
2456 snps,dis_u3_susphy_quirk;
2457 snps,dis_u2_susphy_quirk;
2462 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */
2463 compatible = "ti,sysc-omap4", "ti,sysc";
2464 ti,hwmods = "ocp2scp1";
2465 reg = <0xe8000 0x4>;
2467 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2468 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>;
2469 clock-names = "fck";
2470 #address-cells = <1>;
2472 ranges = <0x0 0xe8000 0x8000>;
2474 ocp2scp1: ocp2scp@0 {
2475 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2476 #address-cells = <1>;
2478 ranges = <0 0 0x8000>;
2480 usb2_phy2: phy@8000 {
2481 compatible = "ti,am437x-usb2";
2483 syscon-phy-power = <&scm_conf 0x628>;
2484 clocks = <&usb_phy1_always_on_clk32k>,
2485 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>;
2486 clock-names = "wkupclk", "refclk";
2488 status = "disabled";
2493 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */
2494 compatible = "ti,sysc";
2495 status = "disabled";
2496 #address-cells = <1>;
2498 ranges = <0x0 0xf2000 0x2000>;