2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
44 compatible = "arm,cortex-a8";
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
60 voltage-tolerance = <2>; /* 2 percentage */
62 clocks = <&dpll_mpu_ck>;
65 clock-latency = <300000>; /* From omap-cpufreq driver */
70 compatible = "arm,cortex-a8-pmu";
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
79 compatible = "ti,omap-infra";
81 compatible = "ti,omap3-mpu";
87 * XXX: Use a flat representation of the AM33XX interconnect.
88 * The real AM33XX interconnect network is quite complex. Since
89 * it will not bring real advantage to represent that in DT
90 * for the moment, just use a fake OCP bus entry to represent
91 * the whole bus hierarchy.
94 compatible = "simple-bus";
98 ti,hwmods = "l3_main";
100 l4_wkup: l4_wkup@44c00000 {
101 compatible = "ti,am3-l4-wkup", "simple-bus";
102 #address-cells = <1>;
104 ranges = <0 0x44c00000 0x280000>;
106 wkup_m3: wkup_m3@100000 {
107 compatible = "ti,am3352-wkup-m3";
108 reg = <0x100000 0x4000>,
110 reg-names = "umem", "dmem";
111 ti,hwmods = "wkup_m3";
112 ti,pm-firmware = "am335x-pm-firmware.elf";
116 compatible = "ti,am3-prcm";
117 reg = <0x200000 0x4000>;
119 prcm_clocks: clocks {
120 #address-cells = <1>;
124 prcm_clockdomains: clockdomains {
129 compatible = "ti,am3-scm", "simple-bus";
130 reg = <0x210000 0x2000>;
131 #address-cells = <1>;
133 ranges = <0 0x210000 0x2000>;
135 am33xx_pinmux: pinmux@800 {
136 compatible = "pinctrl-single";
138 #address-cells = <1>;
140 pinctrl-single,register-width = <32>;
141 pinctrl-single,function-mask = <0x7f>;
144 scm_conf: scm_conf@0 {
145 compatible = "syscon";
147 #address-cells = <1>;
151 #address-cells = <1>;
156 scm_clockdomains: clockdomains {
161 intc: interrupt-controller@48200000 {
162 compatible = "ti,am33xx-intc";
163 interrupt-controller;
164 #interrupt-cells = <1>;
165 reg = <0x48200000 0x1000>;
168 edma: edma@49000000 {
169 compatible = "ti,edma3";
170 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
171 reg = <0x49000000 0x10000>,
173 interrupts = <12 13 14>;
177 gpio0: gpio@44e07000 {
178 compatible = "ti,omap4-gpio";
182 interrupt-controller;
183 #interrupt-cells = <2>;
184 reg = <0x44e07000 0x1000>;
188 gpio1: gpio@4804c000 {
189 compatible = "ti,omap4-gpio";
193 interrupt-controller;
194 #interrupt-cells = <2>;
195 reg = <0x4804c000 0x1000>;
199 gpio2: gpio@481ac000 {
200 compatible = "ti,omap4-gpio";
204 interrupt-controller;
205 #interrupt-cells = <2>;
206 reg = <0x481ac000 0x1000>;
210 gpio3: gpio@481ae000 {
211 compatible = "ti,omap4-gpio";
215 interrupt-controller;
216 #interrupt-cells = <2>;
217 reg = <0x481ae000 0x1000>;
221 uart0: serial@44e09000 {
222 compatible = "ti,omap3-uart";
224 clock-frequency = <48000000>;
225 reg = <0x44e09000 0x2000>;
228 dmas = <&edma 26>, <&edma 27>;
229 dma-names = "tx", "rx";
232 uart1: serial@48022000 {
233 compatible = "ti,omap3-uart";
235 clock-frequency = <48000000>;
236 reg = <0x48022000 0x2000>;
239 dmas = <&edma 28>, <&edma 29>;
240 dma-names = "tx", "rx";
243 uart2: serial@48024000 {
244 compatible = "ti,omap3-uart";
246 clock-frequency = <48000000>;
247 reg = <0x48024000 0x2000>;
250 dmas = <&edma 30>, <&edma 31>;
251 dma-names = "tx", "rx";
254 uart3: serial@481a6000 {
255 compatible = "ti,omap3-uart";
257 clock-frequency = <48000000>;
258 reg = <0x481a6000 0x2000>;
263 uart4: serial@481a8000 {
264 compatible = "ti,omap3-uart";
266 clock-frequency = <48000000>;
267 reg = <0x481a8000 0x2000>;
272 uart5: serial@481aa000 {
273 compatible = "ti,omap3-uart";
275 clock-frequency = <48000000>;
276 reg = <0x481aa000 0x2000>;
282 compatible = "ti,omap4-i2c";
283 #address-cells = <1>;
286 reg = <0x44e0b000 0x1000>;
292 compatible = "ti,omap4-i2c";
293 #address-cells = <1>;
296 reg = <0x4802a000 0x1000>;
302 compatible = "ti,omap4-i2c";
303 #address-cells = <1>;
306 reg = <0x4819c000 0x1000>;
312 compatible = "ti,omap4-hsmmc";
315 ti,needs-special-reset;
316 ti,needs-special-hs-handling;
319 dma-names = "tx", "rx";
321 interrupt-parent = <&intc>;
322 reg = <0x48060000 0x1000>;
327 compatible = "ti,omap4-hsmmc";
329 ti,needs-special-reset;
332 dma-names = "tx", "rx";
334 interrupt-parent = <&intc>;
335 reg = <0x481d8000 0x1000>;
340 compatible = "ti,omap4-hsmmc";
342 ti,needs-special-reset;
344 interrupt-parent = <&intc>;
345 reg = <0x47810000 0x1000>;
349 hwspinlock: spinlock@480ca000 {
350 compatible = "ti,omap4-hwspinlock";
351 reg = <0x480ca000 0x1000>;
352 ti,hwmods = "spinlock";
357 compatible = "ti,omap3-wdt";
358 ti,hwmods = "wd_timer2";
359 reg = <0x44e35000 0x1000>;
363 dcan0: can@481cc000 {
364 compatible = "ti,am3352-d_can";
365 ti,hwmods = "d_can0";
366 reg = <0x481cc000 0x2000>;
367 clocks = <&dcan0_fck>;
369 syscon-raminit = <&scm_conf 0x644 0>;
374 dcan1: can@481d0000 {
375 compatible = "ti,am3352-d_can";
376 ti,hwmods = "d_can1";
377 reg = <0x481d0000 0x2000>;
378 clocks = <&dcan1_fck>;
380 syscon-raminit = <&scm_conf 0x644 1>;
385 mailbox: mailbox@480C8000 {
386 compatible = "ti,omap4-mailbox";
387 reg = <0x480C8000 0x200>;
389 ti,hwmods = "mailbox";
391 ti,mbox-num-users = <4>;
392 ti,mbox-num-fifos = <8>;
393 mbox_wkupm3: wkup_m3 {
394 ti,mbox-tx = <0 0 0>;
395 ti,mbox-rx = <0 0 3>;
399 timer1: timer@44e31000 {
400 compatible = "ti,am335x-timer-1ms";
401 reg = <0x44e31000 0x400>;
403 ti,hwmods = "timer1";
407 timer2: timer@48040000 {
408 compatible = "ti,am335x-timer";
409 reg = <0x48040000 0x400>;
411 ti,hwmods = "timer2";
414 timer3: timer@48042000 {
415 compatible = "ti,am335x-timer";
416 reg = <0x48042000 0x400>;
418 ti,hwmods = "timer3";
421 timer4: timer@48044000 {
422 compatible = "ti,am335x-timer";
423 reg = <0x48044000 0x400>;
425 ti,hwmods = "timer4";
429 timer5: timer@48046000 {
430 compatible = "ti,am335x-timer";
431 reg = <0x48046000 0x400>;
433 ti,hwmods = "timer5";
437 timer6: timer@48048000 {
438 compatible = "ti,am335x-timer";
439 reg = <0x48048000 0x400>;
441 ti,hwmods = "timer6";
445 timer7: timer@4804a000 {
446 compatible = "ti,am335x-timer";
447 reg = <0x4804a000 0x400>;
449 ti,hwmods = "timer7";
454 compatible = "ti,am3352-rtc", "ti,da830-rtc";
455 reg = <0x44e3e000 0x1000>;
462 compatible = "ti,omap4-mcspi";
463 #address-cells = <1>;
465 reg = <0x48030000 0x400>;
473 dma-names = "tx0", "rx0", "tx1", "rx1";
478 compatible = "ti,omap4-mcspi";
479 #address-cells = <1>;
481 reg = <0x481a0000 0x400>;
489 dma-names = "tx0", "rx0", "tx1", "rx1";
494 compatible = "ti,am33xx-usb";
495 reg = <0x47400000 0x1000>;
497 #address-cells = <1>;
499 ti,hwmods = "usb_otg_hs";
502 usb_ctrl_mod: control@44e10620 {
503 compatible = "ti,am335x-usb-ctrl-module";
504 reg = <0x44e10620 0x10
506 reg-names = "phy_ctrl", "wakeup";
510 usb0_phy: usb-phy@47401300 {
511 compatible = "ti,am335x-usb-phy";
512 reg = <0x47401300 0x100>;
515 ti,ctrl_mod = <&usb_ctrl_mod>;
519 compatible = "ti,musb-am33xx";
521 reg = <0x47401400 0x400
523 reg-names = "mc", "control";
526 interrupt-names = "mc";
528 mentor,multipoint = <1>;
529 mentor,num-eps = <16>;
530 mentor,ram-bits = <12>;
531 mentor,power = <500>;
534 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
535 &cppi41dma 2 0 &cppi41dma 3 0
536 &cppi41dma 4 0 &cppi41dma 5 0
537 &cppi41dma 6 0 &cppi41dma 7 0
538 &cppi41dma 8 0 &cppi41dma 9 0
539 &cppi41dma 10 0 &cppi41dma 11 0
540 &cppi41dma 12 0 &cppi41dma 13 0
541 &cppi41dma 14 0 &cppi41dma 0 1
542 &cppi41dma 1 1 &cppi41dma 2 1
543 &cppi41dma 3 1 &cppi41dma 4 1
544 &cppi41dma 5 1 &cppi41dma 6 1
545 &cppi41dma 7 1 &cppi41dma 8 1
546 &cppi41dma 9 1 &cppi41dma 10 1
547 &cppi41dma 11 1 &cppi41dma 12 1
548 &cppi41dma 13 1 &cppi41dma 14 1>;
550 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
551 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
553 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
554 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
558 usb1_phy: usb-phy@47401b00 {
559 compatible = "ti,am335x-usb-phy";
560 reg = <0x47401b00 0x100>;
563 ti,ctrl_mod = <&usb_ctrl_mod>;
567 compatible = "ti,musb-am33xx";
569 reg = <0x47401c00 0x400
571 reg-names = "mc", "control";
573 interrupt-names = "mc";
575 mentor,multipoint = <1>;
576 mentor,num-eps = <16>;
577 mentor,ram-bits = <12>;
578 mentor,power = <500>;
581 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
582 &cppi41dma 17 0 &cppi41dma 18 0
583 &cppi41dma 19 0 &cppi41dma 20 0
584 &cppi41dma 21 0 &cppi41dma 22 0
585 &cppi41dma 23 0 &cppi41dma 24 0
586 &cppi41dma 25 0 &cppi41dma 26 0
587 &cppi41dma 27 0 &cppi41dma 28 0
588 &cppi41dma 29 0 &cppi41dma 15 1
589 &cppi41dma 16 1 &cppi41dma 17 1
590 &cppi41dma 18 1 &cppi41dma 19 1
591 &cppi41dma 20 1 &cppi41dma 21 1
592 &cppi41dma 22 1 &cppi41dma 23 1
593 &cppi41dma 24 1 &cppi41dma 25 1
594 &cppi41dma 26 1 &cppi41dma 27 1
595 &cppi41dma 28 1 &cppi41dma 29 1>;
597 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
598 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
600 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
601 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
605 cppi41dma: dma-controller@47402000 {
606 compatible = "ti,am3359-cppi41";
607 reg = <0x47400000 0x1000
611 reg-names = "glue", "controller", "scheduler", "queuemgr";
613 interrupt-names = "glue";
615 #dma-channels = <30>;
616 #dma-requests = <256>;
621 epwmss0: epwmss@48300000 {
622 compatible = "ti,am33xx-pwmss";
623 reg = <0x48300000 0x10>;
624 ti,hwmods = "epwmss0";
625 #address-cells = <1>;
628 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
629 0x48300180 0x48300180 0x80 /* EQEP */
630 0x48300200 0x48300200 0x80>; /* EHRPWM */
632 ecap0: ecap@48300100 {
633 compatible = "ti,am33xx-ecap";
635 reg = <0x48300100 0x80>;
637 interrupt-names = "ecap0";
642 ehrpwm0: ehrpwm@48300200 {
643 compatible = "ti,am33xx-ehrpwm";
645 reg = <0x48300200 0x80>;
646 ti,hwmods = "ehrpwm0";
651 epwmss1: epwmss@48302000 {
652 compatible = "ti,am33xx-pwmss";
653 reg = <0x48302000 0x10>;
654 ti,hwmods = "epwmss1";
655 #address-cells = <1>;
658 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
659 0x48302180 0x48302180 0x80 /* EQEP */
660 0x48302200 0x48302200 0x80>; /* EHRPWM */
662 ecap1: ecap@48302100 {
663 compatible = "ti,am33xx-ecap";
665 reg = <0x48302100 0x80>;
667 interrupt-names = "ecap1";
672 ehrpwm1: ehrpwm@48302200 {
673 compatible = "ti,am33xx-ehrpwm";
675 reg = <0x48302200 0x80>;
676 ti,hwmods = "ehrpwm1";
681 epwmss2: epwmss@48304000 {
682 compatible = "ti,am33xx-pwmss";
683 reg = <0x48304000 0x10>;
684 ti,hwmods = "epwmss2";
685 #address-cells = <1>;
688 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
689 0x48304180 0x48304180 0x80 /* EQEP */
690 0x48304200 0x48304200 0x80>; /* EHRPWM */
692 ecap2: ecap@48304100 {
693 compatible = "ti,am33xx-ecap";
695 reg = <0x48304100 0x80>;
697 interrupt-names = "ecap2";
702 ehrpwm2: ehrpwm@48304200 {
703 compatible = "ti,am33xx-ehrpwm";
705 reg = <0x48304200 0x80>;
706 ti,hwmods = "ehrpwm2";
711 mac: ethernet@4a100000 {
712 compatible = "ti,cpsw";
713 ti,hwmods = "cpgmac0";
714 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
715 clock-names = "fck", "cpts";
716 cpdma_channels = <8>;
717 ale_entries = <1024>;
718 bd_ram_size = <0x2000>;
721 mac_control = <0x20>;
724 cpts_clock_mult = <0x80000000>;
725 cpts_clock_shift = <29>;
726 reg = <0x4a100000 0x800
728 #address-cells = <1>;
730 interrupt-parent = <&intc>;
737 interrupts = <40 41 42 43>;
739 syscon = <&scm_conf>;
742 davinci_mdio: mdio@4a101000 {
743 compatible = "ti,davinci_mdio";
744 #address-cells = <1>;
746 ti,hwmods = "davinci_mdio";
747 bus_freq = <1000000>;
748 reg = <0x4a101000 0x100>;
752 cpsw_emac0: slave@4a100200 {
753 /* Filled in by U-Boot */
754 mac-address = [ 00 00 00 00 00 00 ];
757 cpsw_emac1: slave@4a100300 {
758 /* Filled in by U-Boot */
759 mac-address = [ 00 00 00 00 00 00 ];
762 phy_sel: cpsw-phy-sel@44e10650 {
763 compatible = "ti,am3352-cpsw-phy-sel";
764 reg= <0x44e10650 0x4>;
765 reg-names = "gmii-sel";
769 ocmcram: ocmcram@40300000 {
770 compatible = "mmio-sram";
771 reg = <0x40300000 0x10000>; /* 64k */
775 compatible = "ti,am3352-elm";
776 reg = <0x48080000 0x2000>;
782 lcdc: lcdc@4830e000 {
783 compatible = "ti,am33xx-tilcdc";
784 reg = <0x4830e000 0x1000>;
785 interrupt-parent = <&intc>;
791 tscadc: tscadc@44e0d000 {
792 compatible = "ti,am3359-tscadc";
793 reg = <0x44e0d000 0x1000>;
794 interrupt-parent = <&intc>;
796 ti,hwmods = "adc_tsc";
800 compatible = "ti,am3359-tsc";
803 #io-channel-cells = <1>;
804 compatible = "ti,am3359-adc";
808 gpmc: gpmc@50000000 {
809 compatible = "ti,am3352-gpmc";
812 reg = <0x50000000 0x2000>;
815 gpmc,num-waitpins = <2>;
816 #address-cells = <2>;
821 sham: sham@53100000 {
822 compatible = "ti,omap4-sham";
824 reg = <0x53100000 0x200>;
831 compatible = "ti,omap4-aes";
833 reg = <0x53500000 0xa0>;
837 dma-names = "tx", "rx";
840 mcasp0: mcasp@48038000 {
841 compatible = "ti,am33xx-mcasp-audio";
842 ti,hwmods = "mcasp0";
843 reg = <0x48038000 0x2000>,
844 <0x46000000 0x400000>;
845 reg-names = "mpu", "dat";
846 interrupts = <80>, <81>;
847 interrupt-names = "tx", "rx";
851 dma-names = "tx", "rx";
854 mcasp1: mcasp@4803C000 {
855 compatible = "ti,am33xx-mcasp-audio";
856 ti,hwmods = "mcasp1";
857 reg = <0x4803C000 0x2000>,
858 <0x46400000 0x400000>;
859 reg-names = "mpu", "dat";
860 interrupts = <82>, <83>;
861 interrupt-names = "tx", "rx";
865 dma-names = "tx", "rx";
869 compatible = "ti,omap4-rng";
871 reg = <0x48310000 0x2000>;
877 /include/ "am33xx-clocks.dtsi"