2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
44 compatible = "arm,cortex-a8";
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
60 voltage-tolerance = <2>; /* 2 percentage */
62 clocks = <&dpll_mpu_ck>;
65 clock-latency = <300000>; /* From omap-cpufreq driver */
70 compatible = "arm,cortex-a8-pmu";
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
79 compatible = "ti,omap-infra";
81 compatible = "ti,omap3-mpu";
86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
96 * XXX: Use a flat representation of the AM33XX interconnect.
97 * The real AM33XX interconnect network is quite complex. Since
98 * it will not bring real advantage to represent that in DT
99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
103 compatible = "simple-bus";
104 #address-cells = <1>;
107 ti,hwmods = "l3_main";
109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
113 prcm_clocks: clocks {
114 #address-cells = <1>;
118 prcm_clockdomains: clockdomains {
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
126 scrm_clocks: clocks {
127 #address-cells = <1>;
131 scrm_clockdomains: clockdomains {
135 cm: syscon@44e10000 {
136 compatible = "ti,am33xx-controlmodule", "syscon";
137 reg = <0x44e10000 0x800>;
140 intc: interrupt-controller@48200000 {
141 compatible = "ti,omap2-intc";
142 interrupt-controller;
143 #interrupt-cells = <1>;
144 ti,intc-size = <128>;
145 reg = <0x48200000 0x1000>;
148 edma: edma@49000000 {
149 compatible = "ti,edma3";
150 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
151 reg = <0x49000000 0x10000>,
153 interrupts = <12 13 14>;
157 gpio0: gpio@44e07000 {
158 compatible = "ti,omap4-gpio";
162 interrupt-controller;
163 #interrupt-cells = <2>;
164 reg = <0x44e07000 0x1000>;
168 gpio1: gpio@4804c000 {
169 compatible = "ti,omap4-gpio";
173 interrupt-controller;
174 #interrupt-cells = <2>;
175 reg = <0x4804c000 0x1000>;
179 gpio2: gpio@481ac000 {
180 compatible = "ti,omap4-gpio";
184 interrupt-controller;
185 #interrupt-cells = <2>;
186 reg = <0x481ac000 0x1000>;
190 gpio3: gpio@481ae000 {
191 compatible = "ti,omap4-gpio";
195 interrupt-controller;
196 #interrupt-cells = <2>;
197 reg = <0x481ae000 0x1000>;
201 uart0: serial@44e09000 {
202 compatible = "ti,omap3-uart";
204 clock-frequency = <48000000>;
205 reg = <0x44e09000 0x2000>;
210 uart1: serial@48022000 {
211 compatible = "ti,omap3-uart";
213 clock-frequency = <48000000>;
214 reg = <0x48022000 0x2000>;
219 uart2: serial@48024000 {
220 compatible = "ti,omap3-uart";
222 clock-frequency = <48000000>;
223 reg = <0x48024000 0x2000>;
228 uart3: serial@481a6000 {
229 compatible = "ti,omap3-uart";
231 clock-frequency = <48000000>;
232 reg = <0x481a6000 0x2000>;
237 uart4: serial@481a8000 {
238 compatible = "ti,omap3-uart";
240 clock-frequency = <48000000>;
241 reg = <0x481a8000 0x2000>;
246 uart5: serial@481aa000 {
247 compatible = "ti,omap3-uart";
249 clock-frequency = <48000000>;
250 reg = <0x481aa000 0x2000>;
256 compatible = "ti,omap4-i2c";
257 #address-cells = <1>;
260 reg = <0x44e0b000 0x1000>;
266 compatible = "ti,omap4-i2c";
267 #address-cells = <1>;
270 reg = <0x4802a000 0x1000>;
276 compatible = "ti,omap4-i2c";
277 #address-cells = <1>;
280 reg = <0x4819c000 0x1000>;
286 compatible = "ti,omap4-hsmmc";
289 ti,needs-special-reset;
290 ti,needs-special-hs-handling;
293 dma-names = "tx", "rx";
295 interrupt-parent = <&intc>;
296 reg = <0x48060000 0x1000>;
301 compatible = "ti,omap4-hsmmc";
303 ti,needs-special-reset;
306 dma-names = "tx", "rx";
308 interrupt-parent = <&intc>;
309 reg = <0x481d8000 0x1000>;
314 compatible = "ti,omap4-hsmmc";
316 ti,needs-special-reset;
318 interrupt-parent = <&intc>;
319 reg = <0x47810000 0x1000>;
323 hwspinlock: spinlock@480ca000 {
324 compatible = "ti,omap4-hwspinlock";
325 reg = <0x480ca000 0x1000>;
326 ti,hwmods = "spinlock";
331 compatible = "ti,omap3-wdt";
332 ti,hwmods = "wd_timer2";
333 reg = <0x44e35000 0x1000>;
337 dcan0: d_can@481cc000 {
338 compatible = "bosch,d_can";
339 ti,hwmods = "d_can0";
340 reg = <0x481cc000 0x2000
346 dcan1: d_can@481d0000 {
347 compatible = "bosch,d_can";
348 ti,hwmods = "d_can1";
349 reg = <0x481d0000 0x2000
355 mailbox: mailbox@480C8000 {
356 compatible = "ti,omap4-mailbox";
357 reg = <0x480C8000 0x200>;
359 ti,hwmods = "mailbox";
360 ti,mbox-num-users = <4>;
361 ti,mbox-num-fifos = <8>;
364 timer1: timer@44e31000 {
365 compatible = "ti,am335x-timer-1ms";
366 reg = <0x44e31000 0x400>;
368 ti,hwmods = "timer1";
372 timer2: timer@48040000 {
373 compatible = "ti,am335x-timer";
374 reg = <0x48040000 0x400>;
376 ti,hwmods = "timer2";
379 timer3: timer@48042000 {
380 compatible = "ti,am335x-timer";
381 reg = <0x48042000 0x400>;
383 ti,hwmods = "timer3";
386 timer4: timer@48044000 {
387 compatible = "ti,am335x-timer";
388 reg = <0x48044000 0x400>;
390 ti,hwmods = "timer4";
394 timer5: timer@48046000 {
395 compatible = "ti,am335x-timer";
396 reg = <0x48046000 0x400>;
398 ti,hwmods = "timer5";
402 timer6: timer@48048000 {
403 compatible = "ti,am335x-timer";
404 reg = <0x48048000 0x400>;
406 ti,hwmods = "timer6";
410 timer7: timer@4804a000 {
411 compatible = "ti,am335x-timer";
412 reg = <0x4804a000 0x400>;
414 ti,hwmods = "timer7";
419 compatible = "ti,da830-rtc";
420 reg = <0x44e3e000 0x1000>;
427 compatible = "ti,omap4-mcspi";
428 #address-cells = <1>;
430 reg = <0x48030000 0x400>;
438 dma-names = "tx0", "rx0", "tx1", "rx1";
443 compatible = "ti,omap4-mcspi";
444 #address-cells = <1>;
446 reg = <0x481a0000 0x400>;
454 dma-names = "tx0", "rx0", "tx1", "rx1";
459 compatible = "ti,am33xx-usb";
460 reg = <0x47400000 0x1000>;
462 #address-cells = <1>;
464 ti,hwmods = "usb_otg_hs";
467 usb_ctrl_mod: control@44e10620 {
468 compatible = "ti,am335x-usb-ctrl-module";
469 reg = <0x44e10620 0x10
471 reg-names = "phy_ctrl", "wakeup";
475 usb0_phy: usb-phy@47401300 {
476 compatible = "ti,am335x-usb-phy";
477 reg = <0x47401300 0x100>;
480 ti,ctrl_mod = <&usb_ctrl_mod>;
484 compatible = "ti,musb-am33xx";
486 reg = <0x47401400 0x400
488 reg-names = "mc", "control";
491 interrupt-names = "mc";
493 mentor,multipoint = <1>;
494 mentor,num-eps = <16>;
495 mentor,ram-bits = <12>;
496 mentor,power = <500>;
499 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
500 &cppi41dma 2 0 &cppi41dma 3 0
501 &cppi41dma 4 0 &cppi41dma 5 0
502 &cppi41dma 6 0 &cppi41dma 7 0
503 &cppi41dma 8 0 &cppi41dma 9 0
504 &cppi41dma 10 0 &cppi41dma 11 0
505 &cppi41dma 12 0 &cppi41dma 13 0
506 &cppi41dma 14 0 &cppi41dma 0 1
507 &cppi41dma 1 1 &cppi41dma 2 1
508 &cppi41dma 3 1 &cppi41dma 4 1
509 &cppi41dma 5 1 &cppi41dma 6 1
510 &cppi41dma 7 1 &cppi41dma 8 1
511 &cppi41dma 9 1 &cppi41dma 10 1
512 &cppi41dma 11 1 &cppi41dma 12 1
513 &cppi41dma 13 1 &cppi41dma 14 1>;
515 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
516 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
518 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
519 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
523 usb1_phy: usb-phy@47401b00 {
524 compatible = "ti,am335x-usb-phy";
525 reg = <0x47401b00 0x100>;
528 ti,ctrl_mod = <&usb_ctrl_mod>;
532 compatible = "ti,musb-am33xx";
534 reg = <0x47401c00 0x400
536 reg-names = "mc", "control";
538 interrupt-names = "mc";
540 mentor,multipoint = <1>;
541 mentor,num-eps = <16>;
542 mentor,ram-bits = <12>;
543 mentor,power = <500>;
546 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
547 &cppi41dma 17 0 &cppi41dma 18 0
548 &cppi41dma 19 0 &cppi41dma 20 0
549 &cppi41dma 21 0 &cppi41dma 22 0
550 &cppi41dma 23 0 &cppi41dma 24 0
551 &cppi41dma 25 0 &cppi41dma 26 0
552 &cppi41dma 27 0 &cppi41dma 28 0
553 &cppi41dma 29 0 &cppi41dma 15 1
554 &cppi41dma 16 1 &cppi41dma 17 1
555 &cppi41dma 18 1 &cppi41dma 19 1
556 &cppi41dma 20 1 &cppi41dma 21 1
557 &cppi41dma 22 1 &cppi41dma 23 1
558 &cppi41dma 24 1 &cppi41dma 25 1
559 &cppi41dma 26 1 &cppi41dma 27 1
560 &cppi41dma 28 1 &cppi41dma 29 1>;
562 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
563 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
565 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
566 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
570 cppi41dma: dma-controller@47402000 {
571 compatible = "ti,am3359-cppi41";
572 reg = <0x47400000 0x1000
576 reg-names = "glue", "controller", "scheduler", "queuemgr";
578 interrupt-names = "glue";
580 #dma-channels = <30>;
581 #dma-requests = <256>;
586 epwmss0: epwmss@48300000 {
587 compatible = "ti,am33xx-pwmss";
588 reg = <0x48300000 0x10>;
589 ti,hwmods = "epwmss0";
590 #address-cells = <1>;
593 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
594 0x48300180 0x48300180 0x80 /* EQEP */
595 0x48300200 0x48300200 0x80>; /* EHRPWM */
597 ecap0: ecap@48300100 {
598 compatible = "ti,am33xx-ecap";
600 reg = <0x48300100 0x80>;
602 interrupt-names = "ecap0";
607 ehrpwm0: ehrpwm@48300200 {
608 compatible = "ti,am33xx-ehrpwm";
610 reg = <0x48300200 0x80>;
611 ti,hwmods = "ehrpwm0";
616 epwmss1: epwmss@48302000 {
617 compatible = "ti,am33xx-pwmss";
618 reg = <0x48302000 0x10>;
619 ti,hwmods = "epwmss1";
620 #address-cells = <1>;
623 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
624 0x48302180 0x48302180 0x80 /* EQEP */
625 0x48302200 0x48302200 0x80>; /* EHRPWM */
627 ecap1: ecap@48302100 {
628 compatible = "ti,am33xx-ecap";
630 reg = <0x48302100 0x80>;
632 interrupt-names = "ecap1";
637 ehrpwm1: ehrpwm@48302200 {
638 compatible = "ti,am33xx-ehrpwm";
640 reg = <0x48302200 0x80>;
641 ti,hwmods = "ehrpwm1";
646 epwmss2: epwmss@48304000 {
647 compatible = "ti,am33xx-pwmss";
648 reg = <0x48304000 0x10>;
649 ti,hwmods = "epwmss2";
650 #address-cells = <1>;
653 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
654 0x48304180 0x48304180 0x80 /* EQEP */
655 0x48304200 0x48304200 0x80>; /* EHRPWM */
657 ecap2: ecap@48304100 {
658 compatible = "ti,am33xx-ecap";
660 reg = <0x48304100 0x80>;
662 interrupt-names = "ecap2";
667 ehrpwm2: ehrpwm@48304200 {
668 compatible = "ti,am33xx-ehrpwm";
670 reg = <0x48304200 0x80>;
671 ti,hwmods = "ehrpwm2";
676 mac: ethernet@4a100000 {
677 compatible = "ti,cpsw";
678 ti,hwmods = "cpgmac0";
679 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
680 clock-names = "fck", "cpts";
681 cpdma_channels = <8>;
682 ale_entries = <1024>;
683 bd_ram_size = <0x2000>;
686 mac_control = <0x20>;
689 cpts_clock_mult = <0x80000000>;
690 cpts_clock_shift = <29>;
691 reg = <0x4a100000 0x800
693 #address-cells = <1>;
695 interrupt-parent = <&intc>;
702 interrupts = <40 41 42 43>;
706 davinci_mdio: mdio@4a101000 {
707 compatible = "ti,davinci_mdio";
708 #address-cells = <1>;
710 ti,hwmods = "davinci_mdio";
711 bus_freq = <1000000>;
712 reg = <0x4a101000 0x100>;
716 cpsw_emac0: slave@4a100200 {
717 /* Filled in by U-Boot */
718 mac-address = [ 00 00 00 00 00 00 ];
721 cpsw_emac1: slave@4a100300 {
722 /* Filled in by U-Boot */
723 mac-address = [ 00 00 00 00 00 00 ];
726 phy_sel: cpsw-phy-sel@44e10650 {
727 compatible = "ti,am3352-cpsw-phy-sel";
728 reg= <0x44e10650 0x4>;
729 reg-names = "gmii-sel";
733 ocmcram: ocmcram@40300000 {
734 compatible = "ti,am3352-ocmcram";
735 reg = <0x40300000 0x10000>;
736 ti,hwmods = "ocmcram";
739 wkup_m3: wkup_m3@44d00000 {
740 compatible = "ti,am3353-wkup-m3";
741 reg = <0x44d00000 0x4000 /* M3 UMEM */
742 0x44d80000 0x2000>; /* M3 DMEM */
743 ti,hwmods = "wkup_m3";
748 compatible = "ti,am3352-elm";
749 reg = <0x48080000 0x2000>;
755 lcdc: lcdc@4830e000 {
756 compatible = "ti,am33xx-tilcdc";
757 reg = <0x4830e000 0x1000>;
758 interrupt-parent = <&intc>;
764 tscadc: tscadc@44e0d000 {
765 compatible = "ti,am3359-tscadc";
766 reg = <0x44e0d000 0x1000>;
767 interrupt-parent = <&intc>;
769 ti,hwmods = "adc_tsc";
773 compatible = "ti,am3359-tsc";
776 #io-channel-cells = <1>;
777 compatible = "ti,am3359-adc";
781 gpmc: gpmc@50000000 {
782 compatible = "ti,am3352-gpmc";
785 reg = <0x50000000 0x2000>;
788 gpmc,num-waitpins = <2>;
789 #address-cells = <2>;
794 sham: sham@53100000 {
795 compatible = "ti,omap4-sham";
797 reg = <0x53100000 0x200>;
804 compatible = "ti,omap4-aes";
806 reg = <0x53500000 0xa0>;
810 dma-names = "tx", "rx";
813 mcasp0: mcasp@48038000 {
814 compatible = "ti,am33xx-mcasp-audio";
815 ti,hwmods = "mcasp0";
816 reg = <0x48038000 0x2000>,
817 <0x46000000 0x400000>;
818 reg-names = "mpu", "dat";
819 interrupts = <80>, <81>;
820 interrupt-names = "tx", "rx";
824 dma-names = "tx", "rx";
827 mcasp1: mcasp@4803C000 {
828 compatible = "ti,am33xx-mcasp-audio";
829 ti,hwmods = "mcasp1";
830 reg = <0x4803C000 0x2000>,
831 <0x46400000 0x400000>;
832 reg-names = "mpu", "dat";
833 interrupts = <82>, <83>;
834 interrupt-names = "tx", "rx";
838 dma-names = "tx", "rx";
842 compatible = "ti,omap4-rng";
844 reg = <0x48310000 0x2000>;
850 /include/ "am33xx-clocks.dtsi"