2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux Kernel Configuration"
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_GENERIC_DMA_COHERENT
23 select HAVE_KERNEL_GZIP
24 select HAVE_KERNEL_LZO
25 select HAVE_KERNEL_LZMA
27 select HAVE_PERF_EVENTS
28 select PERF_USE_VMALLOC
29 select HAVE_REGS_AND_STACK_ACCESS_API
31 The ARM series is a line of low-power-consumption RISC chip designs
32 licensed by ARM Ltd and targeted at embedded applications and
33 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
34 manufactured, but legacy ARM-based PC hardware remains popular in
35 Europe. There is an ARM Linux project with a web page at
36 <http://www.arm.linux.org.uk/>.
41 config SYS_SUPPORTS_APM_EMULATION
47 config ARCH_USES_GETTIMEOFFSET
51 config GENERIC_CLOCKEVENTS
54 config GENERIC_CLOCKEVENTS_BROADCAST
56 depends on GENERIC_CLOCKEVENTS
61 select GENERIC_ALLOCATOR
72 The Extended Industry Standard Architecture (EISA) bus was
73 developed as an open alternative to the IBM MicroChannel bus.
75 The EISA bus provided some of the features of the IBM MicroChannel
76 bus while maintaining backward compatibility with cards made for
77 the older ISA bus. The EISA bus saw limited use between 1988 and
78 1995 when it was made obsolete by the PCI bus.
80 Say Y here if you are building a kernel for an EISA-based machine.
90 MicroChannel Architecture is found in some IBM PS/2 machines and
91 laptops. It is a bus system similar to PCI or ISA. See
92 <file:Documentation/mca.txt> (and especially the web page given
93 there) before attempting to build an MCA bus kernel.
95 config GENERIC_HARDIRQS
99 config STACKTRACE_SUPPORT
103 config HAVE_LATENCYTOP_SUPPORT
108 config LOCKDEP_SUPPORT
112 config TRACE_IRQFLAGS_SUPPORT
116 config HARDIRQS_SW_RESEND
120 config GENERIC_IRQ_PROBE
124 config GENERIC_LOCKBREAK
127 depends on SMP && PREEMPT
129 config RWSEM_GENERIC_SPINLOCK
133 config RWSEM_XCHGADD_ALGORITHM
136 config ARCH_HAS_ILOG2_U32
139 config ARCH_HAS_ILOG2_U64
142 config ARCH_HAS_CPUFREQ
145 Internal node to signify that the ARCH has CPUFREQ support
146 and that the relevant menu configurations are displayed for
149 config GENERIC_HWEIGHT
153 config GENERIC_CALIBRATE_DELAY
157 config ARCH_MAY_HAVE_PC_FDC
163 config NEED_DMA_MAP_STATE
166 config GENERIC_ISA_DMA
175 config GENERIC_HARDIRQS_NO__DO_IRQ
178 config ARM_L1_CACHE_SHIFT_6
181 Setting ARM L1 cache line size to 64 Bytes.
185 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
186 default DRAM_BASE if REMAP_VECTORS_TO_RAM
189 The base address of exception vectors.
191 source "init/Kconfig"
193 source "kernel/Kconfig.freezer"
198 bool "MMU-based Paged Memory Management Support"
201 Select if you want MMU-based virtualised addressing space
202 support by paged memory management. If unsure, say 'Y'.
205 # The "ARM system type" choice list is ordered alphabetically by option
206 # text. Please add new entries in the option alphabetic order.
209 prompt "ARM system type"
210 default ARCH_VERSATILE
213 bool "Agilent AAEC-2000 based"
217 select ARCH_USES_GETTIMEOFFSET
219 This enables support for systems based on the Agilent AAEC-2000
221 config ARCH_INTEGRATOR
222 bool "ARM Ltd. Integrator family"
224 select ARCH_HAS_CPUFREQ
227 select GENERIC_CLOCKEVENTS
228 select PLAT_VERSATILE
230 Support for ARM's Integrator platform.
233 bool "ARM Ltd. RealView family"
237 select GENERIC_CLOCKEVENTS
238 select ARCH_WANT_OPTIONAL_GPIOLIB
239 select PLAT_VERSATILE
240 select ARM_TIMER_SP804
241 select GPIO_PL061 if GPIOLIB
243 This enables support for ARM Ltd RealView boards.
245 config ARCH_VERSATILE
246 bool "ARM Ltd. Versatile family"
251 select GENERIC_CLOCKEVENTS
252 select ARCH_WANT_OPTIONAL_GPIOLIB
253 select PLAT_VERSATILE
254 select ARM_TIMER_SP804
256 This enables support for ARM Ltd Versatile board.
259 bool "ARM Ltd. Versatile Express family"
260 select ARCH_WANT_OPTIONAL_GPIOLIB
262 select ARM_TIMER_SP804
264 select GENERIC_CLOCKEVENTS
267 select PLAT_VERSATILE
269 This enables support for the ARM Ltd Versatile Express boards.
273 select ARCH_REQUIRE_GPIOLIB
276 This enables support for systems based on the Atmel AT91RM9200,
277 AT91SAM9 and AT91CAP9 processors.
280 bool "Broadcom BCMRING"
285 select GENERIC_CLOCKEVENTS
286 select ARCH_WANT_OPTIONAL_GPIOLIB
288 Support for Broadcom's BCMRing platform.
291 bool "Cirrus Logic CLPS711x/EP721x-based"
293 select ARCH_USES_GETTIMEOFFSET
295 Support for Cirrus Logic 711x/721x based boards.
298 bool "Cavium Networks CNS3XXX family"
300 select GENERIC_CLOCKEVENTS
302 select PCI_DOMAINS if PCI
304 Support for Cavium Networks CNS3XXX platform.
307 bool "Cortina Systems Gemini"
309 select ARCH_REQUIRE_GPIOLIB
310 select ARCH_USES_GETTIMEOFFSET
312 Support for the Cortina Systems Gemini family SoCs
319 select ARCH_USES_GETTIMEOFFSET
321 This is an evaluation board for the StrongARM processor available
322 from Digital. It has limited hardware on-board, including an
323 Ethernet interface, two PCMCIA sockets, two serial ports and a
332 select ARCH_REQUIRE_GPIOLIB
333 select ARCH_HAS_HOLES_MEMORYMODEL
334 select ARCH_USES_GETTIMEOFFSET
336 This enables support for the Cirrus EP93xx series of CPUs.
338 config ARCH_FOOTBRIDGE
342 select ARCH_USES_GETTIMEOFFSET
344 Support for systems based on the DC21285 companion chip
345 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
348 bool "Freescale MXC/iMX-based"
349 select GENERIC_CLOCKEVENTS
350 select ARCH_REQUIRE_GPIOLIB
353 Support for Freescale MXC/iMX-based family of processors
356 bool "Freescale STMP3xxx"
359 select ARCH_REQUIRE_GPIOLIB
360 select GENERIC_CLOCKEVENTS
361 select USB_ARCH_HAS_EHCI
363 Support for systems based on the Freescale 3xxx CPUs.
366 bool "Hilscher NetX based"
369 select GENERIC_CLOCKEVENTS
371 This enables support for systems based on the Hilscher NetX Soc
374 bool "Hynix HMS720x-based"
377 select ARCH_USES_GETTIMEOFFSET
379 This enables support for systems based on the Hynix HMS720x
387 select ARCH_SUPPORTS_MSI
390 Support for Intel's IOP13XX (XScale) family of processors.
398 select ARCH_REQUIRE_GPIOLIB
400 Support for Intel's 80219 and IOP32X (XScale) family of
409 select ARCH_REQUIRE_GPIOLIB
411 Support for Intel's IOP33X (XScale) family of processors.
418 select ARCH_USES_GETTIMEOFFSET
420 Support for Intel's IXP23xx (XScale) family of processors.
423 bool "IXP2400/2800-based"
427 select ARCH_USES_GETTIMEOFFSET
429 Support for Intel's IXP2400/2800 (XScale) family of processors.
436 select GENERIC_CLOCKEVENTS
437 select DMABOUNCE if PCI
439 Support for Intel's IXP4XX (XScale) family of processors.
444 select ARCH_REQUIRE_GPIOLIB
445 select GENERIC_CLOCKEVENTS
448 Support for the Marvell Dove SoC 88AP510
451 bool "Marvell Kirkwood"
454 select ARCH_REQUIRE_GPIOLIB
455 select GENERIC_CLOCKEVENTS
458 Support for the following Marvell Kirkwood series SoCs:
459 88F6180, 88F6192 and 88F6281.
462 bool "Marvell Loki (88RC8480)"
464 select GENERIC_CLOCKEVENTS
467 Support for the Marvell Loki (88RC8480) SoC.
472 select ARCH_REQUIRE_GPIOLIB
475 select USB_ARCH_HAS_OHCI
478 select GENERIC_CLOCKEVENTS
480 Support for the NXP LPC32XX family of processors
483 bool "Marvell MV78xx0"
486 select ARCH_REQUIRE_GPIOLIB
487 select GENERIC_CLOCKEVENTS
490 Support for the following Marvell MV78xx0 series SoCs:
498 select ARCH_REQUIRE_GPIOLIB
499 select GENERIC_CLOCKEVENTS
502 Support for the following Marvell Orion 5x series SoCs:
503 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
504 Orion-2 (5281), Orion-1-90 (6183).
507 bool "Marvell PXA168/910/MMP2"
509 select ARCH_REQUIRE_GPIOLIB
511 select GENERIC_CLOCKEVENTS
515 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
518 bool "Micrel/Kendin KS8695"
520 select ARCH_REQUIRE_GPIOLIB
521 select ARCH_USES_GETTIMEOFFSET
523 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
524 System-on-Chip devices.
527 bool "NetSilicon NS9xxx"
530 select GENERIC_CLOCKEVENTS
533 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
536 <http://www.digi.com/products/microprocessors/index.jsp>
539 bool "Nuvoton W90X900 CPU"
541 select ARCH_REQUIRE_GPIOLIB
543 select GENERIC_CLOCKEVENTS
545 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
546 At present, the w90x900 has been renamed nuc900, regarding
547 the ARM series product line, you can login the following
548 link address to know more.
550 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
551 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
554 bool "Nuvoton NUC93X CPU"
558 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
559 low-power and high performance MPEG-4/JPEG multimedia controller chip.
564 select GENERIC_CLOCKEVENTS
568 select ARCH_HAS_BARRIERS if CACHE_L2X0
570 This enables support for NVIDIA Tegra based systems (Tegra APX,
571 Tegra 6xx and Tegra 2 series).
574 bool "Philips Nexperia PNX4008 Mobile"
577 select ARCH_USES_GETTIMEOFFSET
579 This enables support for Philips PNX4008 mobile platform.
582 bool "PXA2xx/PXA3xx-based"
585 select ARCH_HAS_CPUFREQ
587 select ARCH_REQUIRE_GPIOLIB
588 select GENERIC_CLOCKEVENTS
592 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
597 select GENERIC_CLOCKEVENTS
598 select ARCH_REQUIRE_GPIOLIB
600 Support for Qualcomm MSM/QSD based systems. This runs on the
601 apps processor of the MSM/QSD and depends on a shared memory
602 interface to the modem processor which runs the baseband
603 stack and controls some vital subsystems
604 (clock and power control, etc).
607 bool "Renesas SH-Mobile"
609 Support for Renesas's SH-Mobile ARM platforms
616 select ARCH_MAY_HAVE_PC_FDC
617 select HAVE_PATA_PLATFORM
620 select ARCH_SPARSEMEM_ENABLE
621 select ARCH_USES_GETTIMEOFFSET
623 On the Acorn Risc-PC, Linux can support the internal IDE disk and
624 CD-ROM interface, serial and parallel port, and the floppy drive.
630 select ARCH_SPARSEMEM_ENABLE
632 select ARCH_HAS_CPUFREQ
634 select GENERIC_CLOCKEVENTS
637 select ARCH_REQUIRE_GPIOLIB
639 Support for StrongARM 11x0 based boards.
642 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
644 select ARCH_HAS_CPUFREQ
646 select ARCH_USES_GETTIMEOFFSET
647 select HAVE_S3C2410_I2C
649 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
650 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
651 the Samsung SMDK2410 development board (and derivatives).
653 Note, the S3C2416 and the S3C2450 are so close that they even share
654 the same SoC ID code. This means that there is no seperate machine
655 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
658 bool "Samsung S3C64XX"
664 select ARCH_USES_GETTIMEOFFSET
665 select ARCH_HAS_CPUFREQ
666 select ARCH_REQUIRE_GPIOLIB
667 select SAMSUNG_CLKSRC
668 select SAMSUNG_IRQ_VIC_TIMER
669 select SAMSUNG_IRQ_UART
670 select S3C_GPIO_TRACK
671 select S3C_GPIO_PULL_UPDOWN
672 select S3C_GPIO_CFG_S3C24XX
673 select S3C_GPIO_CFG_S3C64XX
675 select USB_ARCH_HAS_OHCI
676 select SAMSUNG_GPIOLIB_4BIT
677 select HAVE_S3C2410_I2C
678 select HAVE_S3C2410_WATCHDOG
680 Samsung S3C64XX series based systems
683 bool "Samsung S5P6440"
687 select HAVE_S3C2410_WATCHDOG
688 select ARCH_USES_GETTIMEOFFSET
689 select HAVE_S3C2410_I2C
692 Samsung S5P6440 CPU based systems
695 bool "Samsung S5P6442"
699 select ARCH_USES_GETTIMEOFFSET
700 select HAVE_S3C2410_WATCHDOG
702 Samsung S5P6442 CPU based systems
705 bool "Samsung S5PC100"
709 select ARM_L1_CACHE_SHIFT_6
710 select ARCH_USES_GETTIMEOFFSET
711 select HAVE_S3C2410_I2C
713 select HAVE_S3C2410_WATCHDOG
715 Samsung S5PC100 series based systems
718 bool "Samsung S5PV210/S5PC110"
722 select ARM_L1_CACHE_SHIFT_6
723 select ARCH_USES_GETTIMEOFFSET
724 select HAVE_S3C2410_I2C
726 select HAVE_S3C2410_WATCHDOG
728 Samsung S5PV210/S5PC110 series based systems
731 bool "Samsung S5PV310/S5PC210"
735 select GENERIC_CLOCKEVENTS
737 Samsung S5PV310 series based systems
746 select ARCH_USES_GETTIMEOFFSET
748 Support for the StrongARM based Digital DNARD machine, also known
749 as "Shark" (<http://www.shark-linux.de/shark.html>).
754 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
755 select ARCH_USES_GETTIMEOFFSET
757 Say Y here for systems based on one of the Sharp LH7A40X
758 System on a Chip processors. These CPUs include an ARM922T
759 core with a wide array of integrated devices for
760 hand-held and low-power applications.
763 bool "ST-Ericsson U300 Series"
769 select GENERIC_CLOCKEVENTS
773 Support for ST-Ericsson U300 series mobile platforms.
776 bool "ST-Ericsson U8500 Series"
779 select GENERIC_CLOCKEVENTS
781 select ARCH_REQUIRE_GPIOLIB
783 Support for ST-Ericsson's Ux500 architecture
786 bool "STMicroelectronics Nomadik"
791 select GENERIC_CLOCKEVENTS
792 select ARCH_REQUIRE_GPIOLIB
794 Support for the Nomadik platform by ST-Ericsson
798 select GENERIC_CLOCKEVENTS
799 select ARCH_REQUIRE_GPIOLIB
803 select GENERIC_ALLOCATOR
804 select ARCH_HAS_HOLES_MEMORYMODEL
806 Support for TI's DaVinci platform.
811 select ARCH_REQUIRE_GPIOLIB
812 select ARCH_HAS_CPUFREQ
813 select GENERIC_CLOCKEVENTS
814 select ARCH_HAS_HOLES_MEMORYMODEL
816 Support for TI's OMAP platform (OMAP1 and OMAP2).
821 select ARCH_REQUIRE_GPIOLIB
823 select GENERIC_CLOCKEVENTS
826 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
831 # This is sorted alphabetically by mach-* pathname. However, plat-*
832 # Kconfigs may be included either alphabetically (according to the
833 # plat- suffix) or along side the corresponding mach-* source.
835 source "arch/arm/mach-aaec2000/Kconfig"
837 source "arch/arm/mach-at91/Kconfig"
839 source "arch/arm/mach-bcmring/Kconfig"
841 source "arch/arm/mach-clps711x/Kconfig"
843 source "arch/arm/mach-cns3xxx/Kconfig"
845 source "arch/arm/mach-davinci/Kconfig"
847 source "arch/arm/mach-dove/Kconfig"
849 source "arch/arm/mach-ep93xx/Kconfig"
851 source "arch/arm/mach-footbridge/Kconfig"
853 source "arch/arm/mach-gemini/Kconfig"
855 source "arch/arm/mach-h720x/Kconfig"
857 source "arch/arm/mach-integrator/Kconfig"
859 source "arch/arm/mach-iop32x/Kconfig"
861 source "arch/arm/mach-iop33x/Kconfig"
863 source "arch/arm/mach-iop13xx/Kconfig"
865 source "arch/arm/mach-ixp4xx/Kconfig"
867 source "arch/arm/mach-ixp2000/Kconfig"
869 source "arch/arm/mach-ixp23xx/Kconfig"
871 source "arch/arm/mach-kirkwood/Kconfig"
873 source "arch/arm/mach-ks8695/Kconfig"
875 source "arch/arm/mach-lh7a40x/Kconfig"
877 source "arch/arm/mach-loki/Kconfig"
879 source "arch/arm/mach-lpc32xx/Kconfig"
881 source "arch/arm/mach-msm/Kconfig"
883 source "arch/arm/mach-mv78xx0/Kconfig"
885 source "arch/arm/plat-mxc/Kconfig"
887 source "arch/arm/mach-netx/Kconfig"
889 source "arch/arm/mach-nomadik/Kconfig"
890 source "arch/arm/plat-nomadik/Kconfig"
892 source "arch/arm/mach-ns9xxx/Kconfig"
894 source "arch/arm/mach-nuc93x/Kconfig"
896 source "arch/arm/plat-omap/Kconfig"
898 source "arch/arm/mach-omap1/Kconfig"
900 source "arch/arm/mach-omap2/Kconfig"
902 source "arch/arm/mach-orion5x/Kconfig"
904 source "arch/arm/mach-pxa/Kconfig"
905 source "arch/arm/plat-pxa/Kconfig"
907 source "arch/arm/mach-mmp/Kconfig"
909 source "arch/arm/mach-realview/Kconfig"
911 source "arch/arm/mach-sa1100/Kconfig"
913 source "arch/arm/plat-samsung/Kconfig"
914 source "arch/arm/plat-s3c24xx/Kconfig"
915 source "arch/arm/plat-s5p/Kconfig"
917 source "arch/arm/plat-spear/Kconfig"
920 source "arch/arm/mach-s3c2400/Kconfig"
921 source "arch/arm/mach-s3c2410/Kconfig"
922 source "arch/arm/mach-s3c2412/Kconfig"
923 source "arch/arm/mach-s3c2416/Kconfig"
924 source "arch/arm/mach-s3c2440/Kconfig"
925 source "arch/arm/mach-s3c2443/Kconfig"
929 source "arch/arm/mach-s3c64xx/Kconfig"
932 source "arch/arm/mach-s5p6440/Kconfig"
934 source "arch/arm/mach-s5p6442/Kconfig"
936 source "arch/arm/mach-s5pc100/Kconfig"
938 source "arch/arm/mach-s5pv210/Kconfig"
940 source "arch/arm/mach-s5pv310/Kconfig"
942 source "arch/arm/mach-shmobile/Kconfig"
944 source "arch/arm/plat-stmp3xxx/Kconfig"
946 source "arch/arm/mach-tegra/Kconfig"
948 source "arch/arm/mach-u300/Kconfig"
950 source "arch/arm/mach-ux500/Kconfig"
952 source "arch/arm/mach-versatile/Kconfig"
954 source "arch/arm/mach-vexpress/Kconfig"
956 source "arch/arm/mach-w90x900/Kconfig"
958 # Definitions to make life easier
964 select GENERIC_CLOCKEVENTS
972 config PLAT_VERSATILE
975 config ARM_TIMER_SP804
978 source arch/arm/mm/Kconfig
981 bool "Enable iWMMXt support"
982 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
983 default y if PXA27x || PXA3xx || ARCH_MMP
985 Enable support for iWMMXt context switching at run time if
986 running on a CPU that supports it.
988 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
991 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
995 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
996 (!ARCH_OMAP3 || OMAP3_EMU)
1001 source "arch/arm/Kconfig-nommu"
1004 config ARM_ERRATA_411920
1005 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1006 depends on CPU_V6 && !SMP
1008 Invalidation of the Instruction Cache operation can
1009 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1010 It does not affect the MPCore. This option enables the ARM Ltd.
1011 recommended workaround.
1013 config ARM_ERRATA_430973
1014 bool "ARM errata: Stale prediction on replaced interworking branch"
1017 This option enables the workaround for the 430973 Cortex-A8
1018 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1019 interworking branch is replaced with another code sequence at the
1020 same virtual address, whether due to self-modifying code or virtual
1021 to physical address re-mapping, Cortex-A8 does not recover from the
1022 stale interworking branch prediction. This results in Cortex-A8
1023 executing the new code sequence in the incorrect ARM or Thumb state.
1024 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1025 and also flushes the branch target cache at every context switch.
1026 Note that setting specific bits in the ACTLR register may not be
1027 available in non-secure mode.
1029 config ARM_ERRATA_458693
1030 bool "ARM errata: Processor deadlock when a false hazard is created"
1033 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1034 erratum. For very specific sequences of memory operations, it is
1035 possible for a hazard condition intended for a cache line to instead
1036 be incorrectly associated with a different cache line. This false
1037 hazard might then cause a processor deadlock. The workaround enables
1038 the L1 caching of the NEON accesses and disables the PLD instruction
1039 in the ACTLR register. Note that setting specific bits in the ACTLR
1040 register may not be available in non-secure mode.
1042 config ARM_ERRATA_460075
1043 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1046 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1047 erratum. Any asynchronous access to the L2 cache may encounter a
1048 situation in which recent store transactions to the L2 cache are lost
1049 and overwritten with stale memory contents from external memory. The
1050 workaround disables the write-allocate mode for the L2 cache via the
1051 ACTLR register. Note that setting specific bits in the ACTLR register
1052 may not be available in non-secure mode.
1054 config ARM_ERRATA_742230
1055 bool "ARM errata: DMB operation may be faulty"
1056 depends on CPU_V7 && SMP
1058 This option enables the workaround for the 742230 Cortex-A9
1059 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1060 between two write operations may not ensure the correct visibility
1061 ordering of the two writes. This workaround sets a specific bit in
1062 the diagnostic register of the Cortex-A9 which causes the DMB
1063 instruction to behave as a DSB, ensuring the correct behaviour of
1066 config ARM_ERRATA_742231
1067 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1068 depends on CPU_V7 && SMP
1070 This option enables the workaround for the 742231 Cortex-A9
1071 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1072 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1073 accessing some data located in the same cache line, may get corrupted
1074 data due to bad handling of the address hazard when the line gets
1075 replaced from one of the CPUs at the same time as another CPU is
1076 accessing it. This workaround sets specific bits in the diagnostic
1077 register of the Cortex-A9 which reduces the linefill issuing
1078 capabilities of the processor.
1080 config PL310_ERRATA_588369
1081 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1082 depends on CACHE_L2X0 && ARCH_OMAP4
1084 The PL310 L2 cache controller implements three types of Clean &
1085 Invalidate maintenance operations: by Physical Address
1086 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1087 They are architecturally defined to behave as the execution of a
1088 clean operation followed immediately by an invalidate operation,
1089 both performing to the same memory location. This functionality
1090 is not correctly implemented in PL310 as clean lines are not
1091 invalidated as a result of these operations. Note that this errata
1092 uses Texas Instrument's secure monitor api.
1094 config ARM_ERRATA_720789
1095 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1096 depends on CPU_V7 && SMP
1098 This option enables the workaround for the 720789 Cortex-A9 (prior to
1099 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1100 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1101 As a consequence of this erratum, some TLB entries which should be
1102 invalidated are not, resulting in an incoherency in the system page
1103 tables. The workaround changes the TLB flushing routines to invalidate
1104 entries regardless of the ASID.
1106 config ARM_ERRATA_743622
1107 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1110 This option enables the workaround for the 743622 Cortex-A9
1111 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1112 optimisation in the Cortex-A9 Store Buffer may lead to data
1113 corruption. This workaround sets a specific bit in the diagnostic
1114 register of the Cortex-A9 which disables the Store Buffer
1115 optimisation, preventing the defect from occurring. This has no
1116 visible impact on the overall performance or power consumption of the
1121 source "arch/arm/common/Kconfig"
1131 Find out whether you have ISA slots on your motherboard. ISA is the
1132 name of a bus system, i.e. the way the CPU talks to the other stuff
1133 inside your box. Other bus systems are PCI, EISA, MicroChannel
1134 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1135 newer boards don't support it. If you have ISA, say Y, otherwise N.
1137 # Select ISA DMA controller support
1142 # Select ISA DMA interface
1147 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1149 Find out whether you have a PCI motherboard. PCI is the name of a
1150 bus system, i.e. the way the CPU talks to the other stuff inside
1151 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1152 VESA. If you have PCI, say Y, otherwise N.
1161 # Select the host bridge type
1162 config PCI_HOST_VIA82C505
1164 depends on PCI && ARCH_SHARK
1167 config PCI_HOST_ITE8152
1169 depends on PCI && MACH_ARMCORE
1173 source "drivers/pci/Kconfig"
1175 source "drivers/pcmcia/Kconfig"
1179 menu "Kernel Features"
1181 source "kernel/time/Kconfig"
1184 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1185 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
1186 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1187 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1188 depends on GENERIC_CLOCKEVENTS
1189 select USE_GENERIC_SMP_HELPERS
1190 select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\
1191 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1193 This enables support for systems with more than one CPU. If you have
1194 a system with only one CPU, like most personal computers, say N. If
1195 you have a system with more than one CPU, say Y.
1197 If you say N here, the kernel will run on single and multiprocessor
1198 machines, but will use only one CPU of a multiprocessor machine. If
1199 you say Y here, the kernel will run on many, but not all, single
1200 processor machines. On a single processor machine, the kernel will
1201 run faster if you say N here.
1203 See also <file:Documentation/i386/IO-APIC.txt>,
1204 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1205 <http://www.linuxdoc.org/docs.html#howto>.
1207 If you don't know what to do here, say N.
1213 This option enables support for the ARM system coherency unit
1219 This options enables support for the ARM timer and watchdog unit
1222 prompt "Memory split"
1225 Select the desired split between kernel and user memory.
1227 If you are not absolutely sure what you are doing, leave this
1231 bool "3G/1G user/kernel split"
1233 bool "2G/2G user/kernel split"
1235 bool "1G/3G user/kernel split"
1240 default 0x40000000 if VMSPLIT_1G
1241 default 0x80000000 if VMSPLIT_2G
1245 int "Maximum number of CPUs (2-32)"
1251 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1252 depends on SMP && HOTPLUG && EXPERIMENTAL
1254 Say Y here to experiment with turning CPUs off and on. CPUs
1255 can be controlled through /sys/devices/system/cpu.
1258 bool "Use local timer interrupts"
1259 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
1260 REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1261 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1263 select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \
1264 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS
1266 Enable support for local timers on SMP platforms, rather then the
1267 legacy IPI broadcast method. Local timers allows the system
1268 accounting to be spread across the timer interval, preventing a
1269 "thundering herd" at every timer tick.
1271 source kernel/Kconfig.preempt
1275 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
1276 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1277 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1278 default AT91_TIMER_HZ if ARCH_AT91
1279 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1282 config THUMB2_KERNEL
1283 bool "Compile the kernel in Thumb-2 mode"
1284 depends on CPU_V7 && EXPERIMENTAL
1286 select ARM_ASM_UNIFIED
1288 By enabling this option, the kernel will be compiled in
1289 Thumb-2 mode. A compiler/assembler that understand the unified
1290 ARM-Thumb syntax is needed.
1294 config ARM_ASM_UNIFIED
1298 bool "Use the ARM EABI to compile the kernel"
1300 This option allows for the kernel to be compiled using the latest
1301 ARM ABI (aka EABI). This is only useful if you are using a user
1302 space environment that is also compiled with EABI.
1304 Since there are major incompatibilities between the legacy ABI and
1305 EABI, especially with regard to structure member alignment, this
1306 option also changes the kernel syscall calling convention to
1307 disambiguate both ABIs and allow for backward compatibility support
1308 (selected with CONFIG_OABI_COMPAT).
1310 To use this you need GCC version 4.0.0 or later.
1313 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1314 depends on AEABI && EXPERIMENTAL
1317 This option preserves the old syscall interface along with the
1318 new (ARM EABI) one. It also provides a compatibility layer to
1319 intercept syscalls that have structure arguments which layout
1320 in memory differs between the legacy ABI and the new ARM EABI
1321 (only for non "thumb" binaries). This option adds a tiny
1322 overhead to all syscalls and produces a slightly larger kernel.
1323 If you know you'll be using only pure EABI user space then you
1324 can say N here. If this option is not selected and you attempt
1325 to execute a legacy ABI binary then the result will be
1326 UNPREDICTABLE (in fact it can be predicted that it won't work
1327 at all). If in doubt say Y.
1329 config ARCH_HAS_HOLES_MEMORYMODEL
1332 config ARCH_SPARSEMEM_ENABLE
1335 config ARCH_SPARSEMEM_DEFAULT
1336 def_bool ARCH_SPARSEMEM_ENABLE
1338 config ARCH_SELECT_MEMORY_MODEL
1339 def_bool ARCH_SPARSEMEM_ENABLE
1342 bool "High Memory Support (EXPERIMENTAL)"
1343 depends on MMU && EXPERIMENTAL
1345 The address space of ARM processors is only 4 Gigabytes large
1346 and it has to accommodate user address space, kernel address
1347 space as well as some memory mapped IO. That means that, if you
1348 have a large amount of physical memory and/or IO, not all of the
1349 memory can be "permanently mapped" by the kernel. The physical
1350 memory that is not permanently mapped is called "high memory".
1352 Depending on the selected kernel/user memory split, minimum
1353 vmalloc space and actual amount of RAM, you may not need this
1354 option which should result in a slightly faster kernel.
1359 bool "Allocate 2nd-level pagetables from highmem"
1361 depends on !OUTER_CACHE
1363 config HW_PERF_EVENTS
1364 bool "Enable hardware performance counter support for perf events"
1365 depends on PERF_EVENTS && CPU_HAS_PMU
1368 Enable hardware performance counter support for perf events. If
1369 disabled, perf events will use software events only.
1374 This enables support for sparse irqs. This is useful in general
1375 as most CPUs have a fairly sparse array of IRQ vectors, which
1376 the irq_desc then maps directly on to. Systems with a high
1377 number of off-chip IRQs will want to treat this as
1378 experimental until they have been independently verified.
1382 config FORCE_MAX_ZONEORDER
1383 int "Maximum zone order" if ARCH_SHMOBILE
1384 range 11 64 if ARCH_SHMOBILE
1385 default "9" if SA1111
1388 The kernel memory allocator divides physically contiguous memory
1389 blocks into "zones", where each zone is a power of two number of
1390 pages. This option selects the largest power of two that the kernel
1391 keeps in the memory allocator. If you need to allocate very large
1392 blocks of physically contiguous memory, then you may need to
1393 increase this value.
1395 This config option is actually maximum order plus one. For example,
1396 a value of 11 means that the largest free memory block is 2^10 pages.
1399 bool "Timer and CPU usage LEDs"
1400 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1401 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1402 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1403 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1404 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1405 ARCH_AT91 || ARCH_DAVINCI || \
1406 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1408 If you say Y here, the LEDs on your machine will be used
1409 to provide useful information about your current system status.
1411 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1412 be able to select which LEDs are active using the options below. If
1413 you are compiling a kernel for the EBSA-110 or the LART however, the
1414 red LED will simply flash regularly to indicate that the system is
1415 still functional. It is safe to say Y here if you have a CATS
1416 system, but the driver will do nothing.
1419 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1420 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1421 || MACH_OMAP_PERSEUS2
1423 depends on !GENERIC_CLOCKEVENTS
1424 default y if ARCH_EBSA110
1426 If you say Y here, one of the system LEDs (the green one on the
1427 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1428 will flash regularly to indicate that the system is still
1429 operational. This is mainly useful to kernel hackers who are
1430 debugging unstable kernels.
1432 The LART uses the same LED for both Timer LED and CPU usage LED
1433 functions. You may choose to use both, but the Timer LED function
1434 will overrule the CPU usage LED.
1437 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1439 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1440 || MACH_OMAP_PERSEUS2
1443 If you say Y here, the red LED will be used to give a good real
1444 time indication of CPU usage, by lighting whenever the idle task
1445 is not currently executing.
1447 The LART uses the same LED for both Timer LED and CPU usage LED
1448 functions. You may choose to use both, but the Timer LED function
1449 will overrule the CPU usage LED.
1451 config ALIGNMENT_TRAP
1453 depends on CPU_CP15_MMU
1454 default y if !ARCH_EBSA110
1455 select HAVE_PROC_CPU if PROC_FS
1457 ARM processors cannot fetch/store information which is not
1458 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1459 address divisible by 4. On 32-bit ARM processors, these non-aligned
1460 fetch/store instructions will be emulated in software if you say
1461 here, which has a severe performance impact. This is necessary for
1462 correct operation of some network protocols. With an IP-only
1463 configuration it is safe to say N, otherwise say Y.
1465 config UACCESS_WITH_MEMCPY
1466 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1467 depends on MMU && EXPERIMENTAL
1468 default y if CPU_FEROCEON
1470 Implement faster copy_to_user and clear_user methods for CPU
1471 cores where a 8-word STM instruction give significantly higher
1472 memory write throughput than a sequence of individual 32bit stores.
1474 A possible side effect is a slight increase in scheduling latency
1475 between threads sharing the same address space if they invoke
1476 such copy operations with large buffers.
1478 However, if the CPU data cache is using a write-allocate mode,
1479 this option is unlikely to provide any performance gain.
1481 config CC_STACKPROTECTOR
1482 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1484 This option turns on the -fstack-protector GCC feature. This
1485 feature puts, at the beginning of functions, a canary value on
1486 the stack just before the return address, and validates
1487 the value just before actually returning. Stack based buffer
1488 overflows (that need to overwrite this return address) now also
1489 overwrite the canary, which gets detected and the attack is then
1490 neutralized via a kernel panic.
1491 This feature requires gcc version 4.2 or above.
1493 config DEPRECATED_PARAM_STRUCT
1494 bool "Provide old way to pass kernel parameters"
1496 This was deprecated in 2001 and announced to live on for 5 years.
1497 Some old boot loaders still use this way.
1503 # Compressed boot loader in ROM. Yes, we really want to ask about
1504 # TEXT and BSS so we preserve their values in the config files.
1505 config ZBOOT_ROM_TEXT
1506 hex "Compressed ROM boot loader base address"
1509 The physical address at which the ROM-able zImage is to be
1510 placed in the target. Platforms which normally make use of
1511 ROM-able zImage formats normally set this to a suitable
1512 value in their defconfig file.
1514 If ZBOOT_ROM is not enabled, this has no effect.
1516 config ZBOOT_ROM_BSS
1517 hex "Compressed ROM boot loader BSS address"
1520 The base address of an area of read/write memory in the target
1521 for the ROM-able zImage which must be available while the
1522 decompressor is running. It must be large enough to hold the
1523 entire decompressed kernel plus an additional 128 KiB.
1524 Platforms which normally make use of ROM-able zImage formats
1525 normally set this to a suitable value in their defconfig file.
1527 If ZBOOT_ROM is not enabled, this has no effect.
1530 bool "Compressed boot loader in ROM/flash"
1531 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1533 Say Y here if you intend to execute your compressed kernel image
1534 (zImage) directly from ROM or flash. If unsure, say N.
1537 string "Default kernel command string"
1540 On some architectures (EBSA110 and CATS), there is currently no way
1541 for the boot loader to pass arguments to the kernel. For these
1542 architectures, you should supply some command-line options at build
1543 time by entering them here. As a minimum, you should specify the
1544 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1546 config CMDLINE_FORCE
1547 bool "Always use the default kernel command string"
1548 depends on CMDLINE != ""
1550 Always use the default kernel command string, even if the boot
1551 loader passes other arguments to the kernel.
1552 This is useful if you cannot or don't want to change the
1553 command-line options your boot loader passes to the kernel.
1558 bool "Kernel Execute-In-Place from ROM"
1559 depends on !ZBOOT_ROM
1561 Execute-In-Place allows the kernel to run from non-volatile storage
1562 directly addressable by the CPU, such as NOR flash. This saves RAM
1563 space since the text section of the kernel is not loaded from flash
1564 to RAM. Read-write sections, such as the data section and stack,
1565 are still copied to RAM. The XIP kernel is not compressed since
1566 it has to run directly from flash, so it will take more space to
1567 store it. The flash address used to link the kernel object files,
1568 and for storing it, is configuration dependent. Therefore, if you
1569 say Y here, you must know the proper physical address where to
1570 store the kernel image depending on your own flash memory usage.
1572 Also note that the make target becomes "make xipImage" rather than
1573 "make zImage" or "make Image". The final kernel binary to put in
1574 ROM memory will be arch/arm/boot/xipImage.
1578 config XIP_PHYS_ADDR
1579 hex "XIP Kernel Physical Location"
1580 depends on XIP_KERNEL
1581 default "0x00080000"
1583 This is the physical address in your flash memory the kernel will
1584 be linked for and stored to. This address is dependent on your
1588 bool "Kexec system call (EXPERIMENTAL)"
1589 depends on EXPERIMENTAL
1591 kexec is a system call that implements the ability to shutdown your
1592 current kernel, and to start another kernel. It is like a reboot
1593 but it is independent of the system firmware. And like a reboot
1594 you can start any kernel with it, not just Linux.
1596 It is an ongoing process to be certain the hardware in a machine
1597 is properly shutdown, so do not be surprised if this code does not
1598 initially work for you. It may help to enable device hotplugging
1602 bool "Export atags in procfs"
1606 Should the atags used to boot the kernel be exported in an "atags"
1607 file in procfs. Useful with kexec.
1609 config AUTO_ZRELADDR
1610 bool "Auto calculation of the decompressed kernel image address"
1611 depends on !ZBOOT_ROM && !ARCH_U300
1613 ZRELADDR is the physical address where the decompressed kernel
1614 image will be placed. If AUTO_ZRELADDR is selected, the address
1615 will be determined at run-time by masking the current IP with
1616 0xf8000000. This assumes the zImage being placed in the first 128MB
1617 from start of memory.
1621 menu "CPU Power Management"
1625 source "drivers/cpufreq/Kconfig"
1627 config CPU_FREQ_SA1100
1630 config CPU_FREQ_SA1110
1633 config CPU_FREQ_INTEGRATOR
1634 tristate "CPUfreq driver for ARM Integrator CPUs"
1635 depends on ARCH_INTEGRATOR && CPU_FREQ
1638 This enables the CPUfreq driver for ARM Integrator CPUs.
1640 For details, take a look at <file:Documentation/cpu-freq>.
1646 depends on CPU_FREQ && ARCH_PXA && PXA25x
1648 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1650 config CPU_FREQ_S3C64XX
1651 bool "CPUfreq support for Samsung S3C64XX CPUs"
1652 depends on CPU_FREQ && CPU_S3C6410
1657 Internal configuration node for common cpufreq on Samsung SoC
1659 config CPU_FREQ_S3C24XX
1660 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1661 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1664 This enables the CPUfreq driver for the Samsung S3C24XX family
1667 For details, take a look at <file:Documentation/cpu-freq>.
1671 config CPU_FREQ_S3C24XX_PLL
1672 bool "Support CPUfreq changing of PLL frequency"
1673 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1675 Compile in support for changing the PLL frequency from the
1676 S3C24XX series CPUfreq driver. The PLL takes time to settle
1677 after a frequency change, so by default it is not enabled.
1679 This also means that the PLL tables for the selected CPU(s) will
1680 be built which may increase the size of the kernel image.
1682 config CPU_FREQ_S3C24XX_DEBUG
1683 bool "Debug CPUfreq Samsung driver core"
1684 depends on CPU_FREQ_S3C24XX
1686 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1688 config CPU_FREQ_S3C24XX_IODEBUG
1689 bool "Debug CPUfreq Samsung driver IO timing"
1690 depends on CPU_FREQ_S3C24XX
1692 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1694 config CPU_FREQ_S3C24XX_DEBUGFS
1695 bool "Export debugfs for CPUFreq"
1696 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1698 Export status information via debugfs.
1702 source "drivers/cpuidle/Kconfig"
1706 menu "Floating point emulation"
1708 comment "At least one emulation must be selected"
1711 bool "NWFPE math emulation"
1712 depends on !AEABI || OABI_COMPAT
1714 Say Y to include the NWFPE floating point emulator in the kernel.
1715 This is necessary to run most binaries. Linux does not currently
1716 support floating point hardware so you need to say Y here even if
1717 your machine has an FPA or floating point co-processor podule.
1719 You may say N here if you are going to load the Acorn FPEmulator
1720 early in the bootup.
1723 bool "Support extended precision"
1724 depends on FPE_NWFPE
1726 Say Y to include 80-bit support in the kernel floating-point
1727 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1728 Note that gcc does not generate 80-bit operations by default,
1729 so in most cases this option only enlarges the size of the
1730 floating point emulator without any good reason.
1732 You almost surely want to say N here.
1735 bool "FastFPE math emulation (EXPERIMENTAL)"
1736 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1738 Say Y here to include the FAST floating point emulator in the kernel.
1739 This is an experimental much faster emulator which now also has full
1740 precision for the mantissa. It does not support any exceptions.
1741 It is very simple, and approximately 3-6 times faster than NWFPE.
1743 It should be sufficient for most programs. It may be not suitable
1744 for scientific calculations, but you have to check this for yourself.
1745 If you do not feel you need a faster FP emulation you should better
1749 bool "VFP-format floating point maths"
1750 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1752 Say Y to include VFP support code in the kernel. This is needed
1753 if your hardware includes a VFP unit.
1755 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1756 release notes and additional status information.
1758 Say N if your target does not have VFP hardware.
1766 bool "Advanced SIMD (NEON) Extension support"
1767 depends on VFPv3 && CPU_V7
1769 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1774 menu "Userspace binary formats"
1776 source "fs/Kconfig.binfmt"
1779 tristate "RISC OS personality"
1782 Say Y here to include the kernel code necessary if you want to run
1783 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1784 experimental; if this sounds frightening, say N and sleep in peace.
1785 You can also say M here to compile this support as a module (which
1786 will be called arthur).
1790 menu "Power management options"
1792 source "kernel/power/Kconfig"
1794 config ARCH_SUSPEND_POSSIBLE
1799 source "net/Kconfig"
1801 source "drivers/Kconfig"
1805 source "arch/arm/Kconfig.debug"
1807 source "security/Kconfig"
1809 source "crypto/Kconfig"
1811 source "lib/Kconfig"