4 #ifndef __NR_sys_io_uring_setup
5 #define __NR_sys_io_uring_setup 335
7 #ifndef __NR_sys_io_uring_enter
8 #define __NR_sys_io_uring_enter 336
11 static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
12 unsigned int *ecx, unsigned int *edx)
15 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
16 : "0" (*eax), "2" (*ecx)
20 #include "arch-x86-common.h" /* IWYU pragma: export */
22 #define FIO_ARCH (arch_x86_64)
24 #define FIO_HUGE_PAGE 2097152
26 #define nop __asm__ __volatile__("rep;nop": : :"memory")
27 #define read_barrier() __asm__ __volatile__("lfence":::"memory")
28 #define write_barrier() __asm__ __volatile__("sfence":::"memory")
30 static inline unsigned long arch_ffz(unsigned long bitmask)
32 __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask));
36 static inline unsigned long long get_cpu_clock(void)
40 __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));
41 return ((unsigned long long) hi << 32ULL) | lo;
45 #define ARCH_HAVE_SSE4_2
46 #define ARCH_HAVE_CPU_CLOCK
47 #define ARCH_HAVE_IOURING
49 #define RDRAND_LONG ".byte 0x48,0x0f,0xc7,0xf0"
50 #define RDSEED_LONG ".byte 0x48,0x0f,0xc7,0xf8"
51 #define RDRAND_RETRY 100
53 static inline int arch_rand_long(unsigned long *val)
57 asm volatile("1: " RDRAND_LONG "\n\t"
62 : "=r" (ok), "=a" (*val)
63 : "0" (RDRAND_RETRY));
68 static inline int arch_rand_seed(unsigned long *seed)
72 asm volatile(RDSEED_LONG "\n\t"
74 : "=qm" (ok), "=a" (*seed));