4 #define ARCH (arch_sparc)
6 #ifndef __NR_ioprio_set
7 #define __NR_ioprio_set 196
8 #define __NR_ioprio_get 218
11 #ifndef __NR_fadvise64
12 #define __NR_fadvise64 209
15 #ifndef __NR_sys_splice
16 #define __NR_sys_splice 232
17 #define __NR_sys_tee 280
18 #define __NR_sys_vmsplice 25
21 #define nop do { } while (0)
23 #define read_barrier() __asm__ __volatile__ ("" : : : "memory")
24 #define write_barrier() __asm__ __volatile__ ("" : : : "memory")
27 volatile unsigned char lock;
30 static inline void spin_lock(spinlock_t *lock)
34 "ldstub [%0], %%g2\n\t"
35 "orcc %%g2, 0x0, %%g0\n\t"
37 " ldub [%0], %%g2\n\t"
40 "orcc %%g2, 0x0, %%g0\n\t"
42 " ldub [%0], %%g2\n\t"
47 : "g2", "memory", "cc");
50 static inline void spin_unlock(spinlock_t *lock)
52 __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory");