2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/of_fdt.h>
18 #include <linux/cache.h>
19 #include <asm/sections.h>
20 #include <asm/arcregs.h>
22 #include <asm/setup.h>
25 #include <asm/unwind.h>
26 #include <asm/mach_desc.h>
29 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
31 unsigned int intr_to_DE_cnt;
33 /* Part of U-boot ABI: see head.S */
34 int __initdata uboot_tag;
35 char __initdata *uboot_arg;
37 const struct machine_desc *machine_desc;
39 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
41 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
43 static const struct cpuinfo_data arc_cpu_tbl[] = {
44 #ifdef CONFIG_ISA_ARCOMPACT
45 { {0x20, "ARC 600" }, 0x2F},
46 { {0x30, "ARC 700" }, 0x33},
47 { {0x34, "ARC 700 R4.10"}, 0x34},
48 { {0x35, "ARC 700 R4.11"}, 0x35},
50 { {0x50, "ARC HS38 R2.0"}, 0x51},
51 { {0x52, "ARC HS38 R2.1"}, 0x52},
52 { {0x53, "ARC HS38 R3.0"}, 0x53},
57 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
59 if (is_isa_arcompact()) {
60 struct bcr_iccm_arcompact iccm;
61 struct bcr_dccm_arcompact dccm;
63 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
65 cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
66 cpu->iccm.base_addr = iccm.base << 16;
69 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
72 cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
74 base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
75 cpu->dccm.base_addr = base & ~0xF;
78 struct bcr_iccm_arcv2 iccm;
79 struct bcr_dccm_arcv2 dccm;
82 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
84 cpu->iccm.sz = 256 << iccm.sz00; /* 512B to 16M */
85 if (iccm.sz00 == 0xF && iccm.sz01 > 0)
86 cpu->iccm.sz <<= iccm.sz01;
88 region = read_aux_reg(ARC_REG_AUX_ICCM);
89 cpu->iccm.base_addr = region & 0xF0000000;
92 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
94 cpu->dccm.sz = 256 << dccm.sz0;
95 if (dccm.sz0 == 0xF && dccm.sz1 > 0)
96 cpu->dccm.sz <<= dccm.sz1;
98 region = read_aux_reg(ARC_REG_AUX_DCCM);
99 cpu->dccm.base_addr = region & 0xF0000000;
104 static void read_arc_build_cfg_regs(void)
106 struct bcr_timer timer;
107 struct bcr_generic bcr;
108 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
109 const struct cpuinfo_data *tbl;
113 READ_BCR(AUX_IDENTITY, cpu->core);
114 READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
116 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
117 if ((cpu->core.family >= tbl->info.id) &&
118 (cpu->core.family <= tbl->up_range)) {
119 cpu->details = tbl->info.str;
124 if (tbl->info.id == 0)
125 cpu->details = "UNKNOWN";
127 READ_BCR(ARC_REG_TIMERS_BCR, timer);
128 cpu->extn.timer0 = timer.t0;
129 cpu->extn.timer1 = timer.t1;
130 cpu->extn.rtc = timer.rtc;
132 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
134 READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
136 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
137 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
138 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
139 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
140 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
141 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
143 /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
144 read_decode_ccm_bcr(cpu);
146 read_decode_mmu_bcr();
147 read_decode_cache_bcr();
149 if (is_isa_arcompact()) {
150 struct bcr_fp_arcompact sp, dp;
151 struct bcr_bpu_arcompact bpu;
153 READ_BCR(ARC_REG_FP_BCR, sp);
154 READ_BCR(ARC_REG_DPFP_BCR, dp);
155 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
156 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
158 READ_BCR(ARC_REG_BPU_BCR, bpu);
159 cpu->bpu.ver = bpu.ver;
160 cpu->bpu.full = bpu.fam ? 1 : 0;
162 cpu->bpu.num_cache = 256 << (bpu.ent - 1);
163 cpu->bpu.num_pred = 256 << (bpu.ent - 1);
166 struct bcr_fp_arcv2 spdp;
167 struct bcr_bpu_arcv2 bpu;
169 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
170 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
171 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
173 READ_BCR(ARC_REG_BPU_BCR, bpu);
174 cpu->bpu.ver = bpu.ver;
175 cpu->bpu.full = bpu.ft;
176 cpu->bpu.num_cache = 256 << bpu.bce;
177 cpu->bpu.num_pred = 2048 << bpu.pte;
180 READ_BCR(ARC_REG_AP_BCR, bcr);
181 cpu->extn.ap = bcr.ver ? 1 : 0;
183 READ_BCR(ARC_REG_SMART_BCR, bcr);
184 cpu->extn.smart = bcr.ver ? 1 : 0;
186 READ_BCR(ARC_REG_RTT_BCR, bcr);
187 cpu->extn.rtt = bcr.ver ? 1 : 0;
189 cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
191 /* some hacks for lack of feature BCR info in old ARC700 cores */
192 if (is_isa_arcompact()) {
193 if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
194 cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
196 cpu->isa.atomic = cpu->isa.atomic1;
198 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
202 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
204 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
205 struct bcr_identity *core = &cpu->core;
210 n += scnprintf(buf + n, len - n,
211 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
212 core->family, core->cpu_id, core->chip_id);
214 n += scnprintf(buf + n, len - n, "processor [%d]\t: %s (%s ISA) %s\n",
215 cpu_id, cpu->details,
216 is_isa_arcompact() ? "ARCompact" : "ARCv2",
217 IS_AVAIL1(cpu->isa.be, "[Big-Endian]"));
219 n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
220 IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
221 IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
222 IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
223 CONFIG_ARC_HAS_RTC));
225 n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
226 IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
227 IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
228 IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
231 n += scnprintf(buf + n, len - n, "\n\t\t: ");
233 if (cpu->extn_mpy.ver) {
234 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
235 n += scnprintf(buf + n, len - n, "mpy ");
237 int opt = 2; /* stock MPY/MPYH */
239 if (cpu->extn_mpy.dsp) /* OPT 7-9 */
240 opt = cpu->extn_mpy.dsp + 6;
242 n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
246 n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
247 IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
248 IS_AVAIL1(cpu->extn.norm, "norm "),
249 IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
250 IS_AVAIL1(cpu->extn.swap, "swap "),
251 IS_AVAIL1(cpu->extn.minmax, "minmax "),
252 IS_AVAIL1(cpu->extn.crc, "crc "),
253 IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
256 n += scnprintf(buf + n, len - n,
257 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
258 IS_AVAIL1(cpu->bpu.full, "full"),
259 IS_AVAIL1(!cpu->bpu.full, "partial"),
260 cpu->bpu.num_cache, cpu->bpu.num_pred);
265 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
268 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
272 n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
274 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
275 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
276 IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
277 IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
280 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
281 IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
282 IS_AVAIL1(cpu->extn.smart, "smaRT "),
283 IS_AVAIL1(cpu->extn.rtt, "RTT "));
285 if (cpu->dccm.sz || cpu->iccm.sz)
286 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
287 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
288 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
290 n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
291 EF_ARC_OSABI_CURRENT >> 8,
292 EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
293 "no-legacy-syscalls" : "64-bit data any register aligned");
298 static void arc_chk_core_config(void)
300 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
303 if (!cpu->extn.timer0)
304 panic("Timer0 is not present!\n");
306 if (!cpu->extn.timer1)
307 panic("Timer1 is not present!\n");
309 #ifdef CONFIG_ARC_HAS_DCCM
311 * DCCM can be arbit placed in hardware.
312 * Make sure it's placement/sz matches what Linux is built with
314 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
315 panic("Linux built with incorrect DCCM Base address\n");
317 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
318 panic("Linux built with incorrect DCCM Size\n");
321 #ifdef CONFIG_ARC_HAS_ICCM
322 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
323 panic("Linux built with incorrect ICCM Size\n");
327 * FP hardware/software config sanity
328 * -If hardware contains DPFP, kernel needs to save/restore FPU state
329 * -If not, it will crash trying to save/restore the non-existant regs
331 * (only DPDP checked since SP has no arch visible regs)
333 fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
335 if (cpu->extn.fpu_dp && !fpu_enabled)
336 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
337 else if (!cpu->extn.fpu_dp && fpu_enabled)
338 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
342 * Initialize and setup the processor core
343 * This is called by all the CPUs thus should not do special case stuff
344 * such as only for boot CPU etc
347 void setup_processor(void)
350 int cpu_id = smp_processor_id();
352 read_arc_build_cfg_regs();
355 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
360 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
361 printk(arc_platform_smp_cpuinfo());
363 arc_chk_core_config();
366 static inline int is_kernel(unsigned long addr)
368 if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
373 void __init setup_arch(char **cmdline_p)
375 #ifdef CONFIG_ARC_UBOOT_SUPPORT
376 /* make sure that uboot passed pointer to cmdline/dtb is valid */
377 if (uboot_tag && is_kernel((unsigned long)uboot_arg))
378 panic("Invalid uboot arg\n");
380 /* See if u-boot passed an external Device Tree blob */
381 machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
385 /* No, so try the embedded one */
386 machine_desc = setup_machine_fdt(__dtb_start);
388 panic("Embedded DT invalid\n");
391 * If we are here, it is established that @uboot_arg didn't
392 * point to DT blob. Instead if u-boot says it is cmdline,
393 * append to embedded DT cmdline.
394 * setup_machine_fdt() would have populated @boot_command_line
396 if (uboot_tag == 1) {
397 /* Ensure a whitespace between the 2 cmdlines */
398 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
399 strlcat(boot_command_line, uboot_arg,
404 /* Save unparsed command line copy for /proc/cmdline */
405 *cmdline_p = boot_command_line;
407 /* To force early parsing of things like mem=xxx */
410 /* Platform/board specific: e.g. early console registration */
411 if (machine_desc->init_early)
412 machine_desc->init_early();
419 /* copy flat DT out of .init and then unflatten it */
420 unflatten_and_copy_device_tree();
422 /* Can be issue if someone passes cmd line arg "ro"
423 * But that is unlikely so keeping it as it is
425 root_mountflags &= ~MS_RDONLY;
427 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
428 conswitchp = &dummy_con;
434 static int __init customize_machine(void)
436 if (machine_desc->init_machine)
437 machine_desc->init_machine();
441 arch_initcall(customize_machine);
443 static int __init init_late_machine(void)
445 if (machine_desc->init_late)
446 machine_desc->init_late();
450 late_initcall(init_late_machine);
452 * Get CPU information for use by the procfs.
455 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
456 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
458 static int show_cpuinfo(struct seq_file *m, void *v)
461 int cpu_id = ptr_to_cpu(v);
462 struct device_node *core_clk = of_find_node_by_name(NULL, "core_clk");
465 if (!cpu_online(cpu_id)) {
466 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
470 str = (char *)__get_free_page(GFP_TEMPORARY);
474 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
476 of_property_read_u32(core_clk, "clock-frequency", &freq);
478 seq_printf(m, "CPU speed\t: %u.%02u Mhz\n",
479 freq / 1000000, (freq / 10000) % 100);
481 seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
482 loops_per_jiffy / (500000 / HZ),
483 (loops_per_jiffy / (5000 / HZ)) % 100);
485 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
486 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
487 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
488 seq_printf(m, arc_platform_smp_cpuinfo());
490 free_page((unsigned long)str);
497 static void *c_start(struct seq_file *m, loff_t *pos)
500 * Callback returns cpu-id to iterator for show routine, NULL to stop.
501 * However since NULL is also a valid cpu-id (0), we use a round-about
502 * way to pass it w/o having to kmalloc/free a 2 byte string.
503 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
505 return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
508 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
511 return c_start(m, pos);
514 static void c_stop(struct seq_file *m, void *v)
518 const struct seq_operations cpuinfo_op = {
525 static DEFINE_PER_CPU(struct cpu, cpu_topology);
527 static int __init topology_init(void)
531 for_each_present_cpu(cpu)
532 register_cpu(&per_cpu(cpu_topology, cpu), cpu);
537 subsys_initcall(topology_init);