3 This document describes the Linux kernel Makefiles.
10 --- 3.1 Goal definitions
11 --- 3.2 Built-in object goals - obj-y
12 --- 3.3 Loadable module goals - obj-m
13 --- 3.4 Objects which export symbols
14 --- 3.5 Library file goals - lib-y
15 --- 3.6 Descending down in directories
16 --- 3.7 Compilation flags
17 --- 3.8 Command line dependency
18 --- 3.9 Dependency tracking
19 --- 3.10 Special Rules
20 --- 3.11 $(CC) support functions
21 --- 3.12 $(LD) support functions
23 === 4 Host Program support
24 --- 4.1 Simple Host Program
25 --- 4.2 Composite Host Programs
26 --- 4.3 Using C++ for host programs
27 --- 4.4 Controlling compiler options for host programs
28 --- 4.5 When host programs are actually built
29 --- 4.6 Using hostprogs-$(CONFIG_FOO)
31 === 5 Kbuild clean infrastructure
33 === 6 Architecture Makefiles
34 --- 6.1 Set variables to tweak the build to the architecture
35 --- 6.2 Add prerequisites to archheaders:
36 --- 6.3 Add prerequisites to archprepare:
37 --- 6.4 List directories to visit when descending
38 --- 6.5 Architecture-specific boot images
39 --- 6.6 Building non-kbuild targets
40 --- 6.7 Commands useful for building a boot image
41 --- 6.8 Custom kbuild commands
42 --- 6.9 Preprocessing linker scripts
43 --- 6.10 Generic header files
44 --- 6.11 Post-link pass
46 === 7 Kbuild syntax for exported headers
47 --- 7.1 no-export-headers
52 === 8 Kbuild Variables
53 === 9 Makefile language
59 The Makefiles have five parts:
61 Makefile the top Makefile.
62 .config the kernel configuration file.
63 arch/$(ARCH)/Makefile the arch Makefile.
64 scripts/Makefile.* common rules etc. for all kbuild Makefiles.
65 kbuild Makefiles there are about 500 of these.
67 The top Makefile reads the .config file, which comes from the kernel
68 configuration process.
70 The top Makefile is responsible for building two major products: vmlinux
71 (the resident kernel image) and modules (any module files).
72 It builds these goals by recursively descending into the subdirectories of
73 the kernel source tree.
74 The list of subdirectories which are visited depends upon the kernel
75 configuration. The top Makefile textually includes an arch Makefile
76 with the name arch/$(ARCH)/Makefile. The arch Makefile supplies
77 architecture-specific information to the top Makefile.
79 Each subdirectory has a kbuild Makefile which carries out the commands
80 passed down from above. The kbuild Makefile uses information from the
81 .config file to construct various file lists used by kbuild to build
82 any built-in or modular targets.
84 scripts/Makefile.* contains all the definitions/rules etc. that
85 are used to build the kernel based on the kbuild makefiles.
90 People have four different relationships with the kernel Makefiles.
92 *Users* are people who build kernels. These people type commands such as
93 "make menuconfig" or "make". They usually do not read or edit
94 any kernel Makefiles (or any other source files).
96 *Normal developers* are people who work on features such as device
97 drivers, file systems, and network protocols. These people need to
98 maintain the kbuild Makefiles for the subsystem they are
99 working on. In order to do this effectively, they need some overall
100 knowledge about the kernel Makefiles, plus detailed knowledge about the
101 public interface for kbuild.
103 *Arch developers* are people who work on an entire architecture, such
104 as sparc or ia64. Arch developers need to know about the arch Makefile
105 as well as kbuild Makefiles.
107 *Kbuild developers* are people who work on the kernel build system itself.
108 These people need to know about all aspects of the kernel Makefiles.
110 This document is aimed towards normal developers and arch developers.
113 === 3 The kbuild files
115 Most Makefiles within the kernel are kbuild Makefiles that use the
116 kbuild infrastructure. This chapter introduces the syntax used in the
118 The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
119 be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
122 Section 3.1 "Goal definitions" is a quick intro, further chapters provide
123 more details, with real examples.
125 --- 3.1 Goal definitions
127 Goal definitions are the main part (heart) of the kbuild Makefile.
128 These lines define the files to be built, any special compilation
129 options, and any subdirectories to be entered recursively.
131 The most simple kbuild makefile contains one line:
136 This tells kbuild that there is one object in that directory, named
137 foo.o. foo.o will be built from foo.c or foo.S.
139 If foo.o shall be built as a module, the variable obj-m is used.
140 Therefore the following pattern is often used:
143 obj-$(CONFIG_FOO) += foo.o
145 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
146 If CONFIG_FOO is neither y nor m, then the file will not be compiled
149 --- 3.2 Built-in object goals - obj-y
151 The kbuild Makefile specifies object files for vmlinux
152 in the $(obj-y) lists. These lists depend on the kernel
155 Kbuild compiles all the $(obj-y) files. It then calls
156 "$(AR) rcSTP" to merge these files into one built-in.a file.
157 This is a thin archive without a symbol table. It will be later
158 linked into vmlinux by scripts/link-vmlinux.sh
160 The order of files in $(obj-y) is significant. Duplicates in
161 the lists are allowed: the first instance will be linked into
162 built-in.a and succeeding instances will be ignored.
164 Link order is significant, because certain functions
165 (module_init() / __initcall) will be called during boot in the
166 order they appear. So keep in mind that changing the link
167 order may e.g. change the order in which your SCSI
168 controllers are detected, and thus your disks are renumbered.
171 #drivers/isdn/i4l/Makefile
172 # Makefile for the kernel ISDN subsystem and device drivers.
173 # Each configuration option enables a list of files.
174 obj-$(CONFIG_ISDN_I4L) += isdn.o
175 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
177 --- 3.3 Loadable module goals - obj-m
179 $(obj-m) specifies object files which are built as loadable
182 A module may be built from one source file or several source
183 files. In the case of one source file, the kbuild makefile
184 simply adds the file to $(obj-m).
187 #drivers/isdn/i4l/Makefile
188 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
190 Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
192 If a kernel module is built from several source files, you specify
193 that you want to build a module in the same way as above; however,
194 kbuild needs to know which object files you want to build your
195 module from, so you have to tell it by setting a $(<module_name>-y)
199 #drivers/isdn/i4l/Makefile
200 obj-$(CONFIG_ISDN_I4L) += isdn.o
201 isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
203 In this example, the module name will be isdn.o. Kbuild will
204 compile the objects listed in $(isdn-y) and then run
205 "$(LD) -r" on the list of these files to generate isdn.o.
207 Due to kbuild recognizing $(<module_name>-y) for composite objects,
208 you can use the value of a CONFIG_ symbol to optionally include an
209 object file as part of a composite object.
213 obj-$(CONFIG_EXT2_FS) += ext2.o
214 ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \
215 namei.o super.o symlink.o
216 ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
219 In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
220 part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
223 Note: Of course, when you are building objects into the kernel,
224 the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
225 kbuild will build an ext2.o file for you out of the individual
226 parts and then link this into built-in.a, as you would expect.
228 --- 3.4 Objects which export symbols
230 No special notation is required in the makefiles for
231 modules exporting symbols.
233 --- 3.5 Library file goals - lib-y
235 Objects listed with obj-* are used for modules, or
236 combined in a built-in.a for that specific directory.
237 There is also the possibility to list objects that will
238 be included in a library, lib.a.
239 All objects listed with lib-y are combined in a single
240 library for that directory.
241 Objects that are listed in obj-y and additionally listed in
242 lib-y will not be included in the library, since they will
243 be accessible anyway.
244 For consistency, objects listed in lib-m will be included in lib.a.
246 Note that the same kbuild makefile may list files to be built-in
247 and to be part of a library. Therefore the same directory
248 may contain both a built-in.a and a lib.a file.
251 #arch/x86/lib/Makefile
254 This will create a library lib.a based on delay.o. For kbuild to
255 actually recognize that there is a lib.a being built, the directory
256 shall be listed in libs-y.
257 See also "6.4 List directories to visit when descending".
259 Use of lib-y is normally restricted to lib/ and arch/*/lib.
261 --- 3.6 Descending down in directories
263 A Makefile is only responsible for building objects in its own
264 directory. Files in subdirectories should be taken care of by
265 Makefiles in these subdirs. The build system will automatically
266 invoke make recursively in subdirectories, provided you let it know of
269 To do so, obj-y and obj-m are used.
270 ext2 lives in a separate directory, and the Makefile present in fs/
271 tells kbuild to descend down using the following assignment.
275 obj-$(CONFIG_EXT2_FS) += ext2/
277 If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
278 the corresponding obj- variable will be set, and kbuild will descend
279 down in the ext2 directory.
280 Kbuild only uses this information to decide that it needs to visit
281 the directory, it is the Makefile in the subdirectory that
282 specifies what is modular and what is built-in.
284 It is good practice to use a CONFIG_ variable when assigning directory
285 names. This allows kbuild to totally skip the directory if the
286 corresponding CONFIG_ option is neither 'y' nor 'm'.
288 --- 3.7 Compilation flags
290 ccflags-y, asflags-y and ldflags-y
291 These three flags apply only to the kbuild makefile in which they
292 are assigned. They are used for all the normal cc, as and ld
293 invocations happening during a recursive build.
294 Note: Flags with the same behaviour were previously named:
295 EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.
296 They are still supported but their usage is deprecated.
298 ccflags-y specifies options for compiling with $(CC).
301 # drivers/acpi/acpica/Makefile
302 ccflags-y := -Os -D_LINUX -DBUILDING_ACPICA
303 ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT
305 This variable is necessary because the top Makefile owns the
306 variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
309 asflags-y specifies options for assembling with $(AS).
312 #arch/sparc/kernel/Makefile
315 ldflags-y specifies options for linking with $(LD).
318 #arch/cris/boot/compressed/Makefile
319 ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
321 subdir-ccflags-y, subdir-asflags-y
322 The two flags listed above are similar to ccflags-y and asflags-y.
323 The difference is that the subdir- variants have effect for the kbuild
324 file where they are present and all subdirectories.
325 Options specified using subdir-* are added to the commandline before
326 the options specified using the non-subdir variants.
329 subdir-ccflags-y := -Werror
333 CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
336 $(CFLAGS_$@) specifies per-file options for $(CC). The $@
337 part has a literal value which specifies the file that it is for.
340 # drivers/scsi/Makefile
341 CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF
342 CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
345 These two lines specify compilation flags for aha152x.o and gdth.o.
347 $(AFLAGS_$@) is a similar feature for source files in assembly
351 # arch/arm/kernel/Makefile
352 AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
353 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
354 AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
357 --- 3.9 Dependency tracking
359 Kbuild tracks dependencies on the following:
360 1) All prerequisite files (both *.c and *.h)
361 2) CONFIG_ options used in all prerequisite files
362 3) Command-line used to compile target
364 Thus, if you change an option to $(CC) all affected files will
367 --- 3.10 Special Rules
369 Special rules are used when the kbuild infrastructure does
370 not provide the required support. A typical example is
371 header files generated during the build process.
372 Another example are the architecture-specific Makefiles which
373 need special rules to prepare boot images etc.
375 Special rules are written as normal Make rules.
376 Kbuild is not executing in the directory where the Makefile is
377 located, so all special rules shall provide a relative
378 path to prerequisite files and target files.
380 Two variables are used when defining special rules:
383 $(src) is a relative path which points to the directory
384 where the Makefile is located. Always use $(src) when
385 referring to files located in the src tree.
388 $(obj) is a relative path which points to the directory
389 where the target is saved. Always use $(obj) when
390 referring to generated files.
393 #drivers/scsi/Makefile
394 $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
395 $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
397 This is a special rule, following the normal syntax
399 The target file depends on two prerequisite files. References
400 to the target file are prefixed with $(obj), references
401 to prerequisites are referenced with $(src) (because they are not
405 echoing information to user in a rule is often a good practice
406 but when execution "make -s" one does not expect to see any output
407 except for warnings/errors.
408 To support this kbuild defines $(kecho) which will echo out the
409 text following $(kecho) to stdout except if "make -s" is used.
412 #arch/blackfin/boot/Makefile
413 $(obj)/vmImage: $(obj)/vmlinux.gz
414 $(call if_changed,uimage)
415 @$(kecho) 'Kernel: $@ is ready'
418 --- 3.11 $(CC) support functions
420 The kernel may be built with several different versions of
421 $(CC), each supporting a unique set of features and options.
422 kbuild provides basic support to check for valid options for $(CC).
423 $(CC) is usually the gcc compiler, but other alternatives are
427 as-option is used to check if $(CC) -- when used to compile
428 assembler (*.S) files -- supports the given option. An optional
429 second option may be specified if the first option is not supported.
433 cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
435 In the above example, cflags-y will be assigned the option
436 -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
437 The second argument is optional, and if supplied will be used
438 if first argument is not supported.
441 as-instr checks if the assembler reports a specific instruction
442 and then outputs either option1 or option2
443 C escapes are supported in the test instruction
444 Note: as-instr-option uses KBUILD_AFLAGS for $(AS) options
447 cc-option is used to check if $(CC) supports a given option, and if
448 not supported to use an optional second option.
452 cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
454 In the above example, cflags-y will be assigned the option
455 -march=pentium-mmx if supported by $(CC), otherwise -march=i586.
456 The second argument to cc-option is optional, and if omitted,
457 cflags-y will be assigned no value if first option is not supported.
458 Note: cc-option uses KBUILD_CFLAGS for $(CC) options
461 cc-option-yn is used to check if gcc supports a given option
462 and return 'y' if supported, otherwise 'n'.
466 biarch := $(call cc-option-yn, -m32)
467 aflags-$(biarch) += -a32
468 cflags-$(biarch) += -m32
470 In the above example, $(biarch) is set to y if $(CC) supports the -m32
471 option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
472 and $(cflags-y) will be assigned the values -a32 and -m32,
474 Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
477 cc-disable-warning checks if gcc supports a given warning and returns
478 the commandline switch to disable it. This special function is needed,
479 because gcc 4.4 and later accept any unknown -Wno-* option and only
480 warn about it if there is another warning in the source file.
483 KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
485 In the above example, -Wno-unused-but-set-variable will be added to
486 KBUILD_CFLAGS only if gcc really accepts it.
489 cc-ifversion tests the version of $(CC) and equals the fourth parameter
490 if version expression is true, or the fifth (if given) if the version
494 #fs/reiserfs/Makefile
495 ccflags-y := $(call cc-ifversion, -lt, 0402, -O1)
497 In this example, ccflags-y will be assigned the value -O1 if the
498 $(CC) version is less than 4.2.
499 cc-ifversion takes all the shell operators:
500 -eq, -ne, -lt, -le, -gt, and -ge
501 The third parameter may be a text as in this example, but it may also
502 be an expanded variable or a macro.
505 cc-cross-prefix is used to check if there exists a $(CC) in path with
506 one of the listed prefixes. The first prefix where there exist a
507 prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found
508 then nothing is returned.
509 Additional prefixes are separated by a single space in the
510 call of cc-cross-prefix.
511 This functionality is useful for architecture Makefiles that try
512 to set CROSS_COMPILE to well-known values but may have several
513 values to select between.
514 It is recommended only to try to set CROSS_COMPILE if it is a cross
515 build (host arch is different from target arch). And if CROSS_COMPILE
516 is already set then leave it with the old value.
520 ifneq ($(SUBARCH),$(ARCH))
521 ifeq ($(CROSS_COMPILE),)
522 CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)
526 --- 3.12 $(LD) support functions
529 ld-option is used to check if $(LD) supports the supplied option.
530 ld-option takes two options as arguments.
531 The second argument is an optional option that can be used if the
532 first option is not supported by $(LD).
536 LDFLAGS_vmlinux += $(call ld-option, -X)
539 === 4 Host Program support
541 Kbuild supports building executables on the host for use during the
543 Two steps are required in order to use a host executable.
545 The first step is to tell kbuild that a host program exists. This is
546 done utilising the variable hostprogs-y.
548 The second step is to add an explicit dependency to the executable.
549 This can be done in two ways. Either add the dependency in a rule,
550 or utilise the variable $(always).
551 Both possibilities are described in the following.
553 --- 4.1 Simple Host Program
555 In some cases there is a need to compile and run a program on the
556 computer where the build is running.
557 The following line tells kbuild that the program bin2hex shall be
558 built on the build host.
561 hostprogs-y := bin2hex
563 Kbuild assumes in the above example that bin2hex is made from a single
564 c-source file named bin2hex.c located in the same directory as
567 --- 4.2 Composite Host Programs
569 Host programs can be made up based on composite objects.
570 The syntax used to define composite objects for host programs is
571 similar to the syntax used for kernel objects.
572 $(<executable>-objs) lists all objects used to link the final
576 #scripts/lxdialog/Makefile
577 hostprogs-y := lxdialog
578 lxdialog-objs := checklist.o lxdialog.o
580 Objects with extension .o are compiled from the corresponding .c
581 files. In the above example, checklist.c is compiled to checklist.o
582 and lxdialog.c is compiled to lxdialog.o.
583 Finally, the two .o files are linked to the executable, lxdialog.
584 Note: The syntax <executable>-y is not permitted for host-programs.
586 --- 4.3 Using C++ for host programs
588 kbuild offers support for host programs written in C++. This was
589 introduced solely to support kconfig, and is not recommended
593 #scripts/kconfig/Makefile
595 qconf-cxxobjs := qconf.o
597 In the example above the executable is composed of the C++ file
598 qconf.cc - identified by $(qconf-cxxobjs).
600 If qconf is composed of a mixture of .c and .cc files, then an
601 additional line can be used to identify this.
604 #scripts/kconfig/Makefile
606 qconf-cxxobjs := qconf.o
607 qconf-objs := check.o
609 --- 4.4 Controlling compiler options for host programs
611 When compiling host programs, it is possible to set specific flags.
612 The programs will always be compiled utilising $(HOSTCC) passed
613 the options specified in $(KBUILD_HOSTCFLAGS).
614 To set flags that will take effect for all host programs created
615 in that Makefile, use the variable HOST_EXTRACFLAGS.
618 #scripts/lxdialog/Makefile
619 HOST_EXTRACFLAGS += -I/usr/include/ncurses
621 To set specific flags for a single file the following construction
625 #arch/ppc64/boot/Makefile
626 HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
628 It is also possible to specify additional options to the linker.
631 #scripts/kconfig/Makefile
632 HOSTLDLIBS_qconf := -L$(QTDIR)/lib
634 When linking qconf, it will be passed the extra option
637 --- 4.5 When host programs are actually built
639 Kbuild will only build host-programs when they are referenced
641 This is possible in two ways:
643 (1) List the prerequisite explicitly in a special rule.
646 #drivers/pci/Makefile
647 hostprogs-y := gen-devlist
648 $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
649 ( cd $(obj); ./gen-devlist ) < $<
651 The target $(obj)/devlist.h will not be built before
652 $(obj)/gen-devlist is updated. Note that references to
653 the host programs in special rules must be prefixed with $(obj).
656 When there is no suitable special rule, and the host program
657 shall be built when a makefile is entered, the $(always)
658 variable shall be used.
661 #scripts/lxdialog/Makefile
662 hostprogs-y := lxdialog
663 always := $(hostprogs-y)
665 This will tell kbuild to build lxdialog even if not referenced in
668 --- 4.6 Using hostprogs-$(CONFIG_FOO)
670 A typical pattern in a Kbuild file looks like this:
674 hostprogs-$(CONFIG_KALLSYMS) += kallsyms
676 Kbuild knows about both 'y' for built-in and 'm' for module.
677 So if a config symbol evaluates to 'm', kbuild will still build
678 the binary. In other words, Kbuild handles hostprogs-m exactly
679 like hostprogs-y. But only hostprogs-y is recommended to be used
680 when no CONFIG symbols are involved.
682 === 5 Kbuild clean infrastructure
684 "make clean" deletes most generated files in the obj tree where the kernel
685 is compiled. This includes generated files such as host programs.
686 Kbuild knows targets listed in $(hostprogs-y), $(hostprogs-m), $(always),
687 $(extra-y) and $(targets). They are all deleted during "make clean".
688 Files matching the patterns "*.[oas]", "*.ko", plus some additional files
689 generated by kbuild are deleted all over the kernel src tree when
690 "make clean" is executed.
692 Additional files can be specified in kbuild makefiles by use of $(clean-files).
696 clean-files := crc32table.h
698 When executing "make clean", the file "crc32table.h" will be deleted.
699 Kbuild will assume files to be in the same relative directory as the
700 Makefile, except if prefixed with $(objtree).
702 To delete a directory hierarchy use:
705 #scripts/package/Makefile
706 clean-dirs := $(objtree)/debian/
708 This will delete the directory debian in the toplevel directory, including all
711 To exclude certain files from make clean, use the $(no-clean-files) variable.
712 This is only a special case used in the top level Kbuild file:
716 no-clean-files := $(bounds-file) $(offsets-file)
718 Usually kbuild descends down in subdirectories due to "obj-* := dir/",
719 but in the architecture makefiles where the kbuild infrastructure
720 is not sufficient this sometimes needs to be explicit.
723 #arch/x86/boot/Makefile
724 subdir- := compressed/
726 The above assignment instructs kbuild to descend down in the
727 directory compressed/ when "make clean" is executed.
729 To support the clean infrastructure in the Makefiles that build the
730 final bootimage there is an optional target named archclean:
735 $(Q)$(MAKE) $(clean)=arch/x86/boot
737 When "make clean" is executed, make will descend down in arch/x86/boot,
738 and clean as usual. The Makefile located in arch/x86/boot/ may use
739 the subdir- trick to descend further down.
741 Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
742 included in the top level makefile, and the kbuild infrastructure
743 is not operational at that point.
745 Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
746 be visited during "make clean".
748 === 6 Architecture Makefiles
750 The top level Makefile sets up the environment and does the preparation,
751 before starting to descend down in the individual directories.
752 The top level makefile contains the generic part, whereas
753 arch/$(ARCH)/Makefile contains what is required to set up kbuild
754 for said architecture.
755 To do so, arch/$(ARCH)/Makefile sets up a number of variables and defines
758 When kbuild executes, the following steps are followed (roughly):
759 1) Configuration of the kernel => produce .config
760 2) Store kernel version in include/linux/version.h
761 3) Updating all other prerequisites to the target prepare:
762 - Additional prerequisites are specified in arch/$(ARCH)/Makefile
763 4) Recursively descend down in all directories listed in
764 init-* core* drivers-* net-* libs-* and build all targets.
765 - The values of the above variables are expanded in arch/$(ARCH)/Makefile.
766 5) All object files are then linked and the resulting file vmlinux is
767 located at the root of the obj tree.
768 The very first objects linked are listed in head-y, assigned by
769 arch/$(ARCH)/Makefile.
770 6) Finally, the architecture-specific part does any required post processing
771 and builds the final bootimage.
772 - This includes building boot records
773 - Preparing initrd images and the like
776 --- 6.1 Set variables to tweak the build to the architecture
778 LDFLAGS Generic $(LD) options
780 Flags used for all invocations of the linker.
781 Often specifying the emulation is sufficient.
785 LDFLAGS := -m elf_s390
786 Note: ldflags-y can be used to further customise
787 the flags used. See chapter 3.7.
789 LDFLAGS_vmlinux Options for $(LD) when linking vmlinux
791 LDFLAGS_vmlinux is used to specify additional flags to pass to
792 the linker when linking the final vmlinux image.
793 LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
797 LDFLAGS_vmlinux := -e stext
799 OBJCOPYFLAGS objcopy flags
801 When $(call if_changed,objcopy) is used to translate a .o file,
802 the flags specified in OBJCOPYFLAGS will be used.
803 $(call if_changed,objcopy) is often used to generate raw binaries on
808 OBJCOPYFLAGS := -O binary
810 #arch/s390/boot/Makefile
811 $(obj)/image: vmlinux FORCE
812 $(call if_changed,objcopy)
814 In this example, the binary $(obj)/image is a binary version of
815 vmlinux. The usage of $(call if_changed,xxx) will be described later.
817 KBUILD_AFLAGS $(AS) assembler flags
819 Default value - see top level Makefile
820 Append or modify as required per architecture.
823 #arch/sparc64/Makefile
824 KBUILD_AFLAGS += -m64 -mcpu=ultrasparc
826 KBUILD_CFLAGS $(CC) compiler flags
828 Default value - see top level Makefile
829 Append or modify as required per architecture.
831 Often, the KBUILD_CFLAGS variable depends on the configuration.
834 #arch/x86/boot/compressed/Makefile
835 cflags-$(CONFIG_X86_32) := -march=i386
836 cflags-$(CONFIG_X86_64) := -mcmodel=small
837 KBUILD_CFLAGS += $(cflags-y)
839 Many arch Makefiles dynamically run the target C compiler to
840 probe supported options:
845 cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\
846 -march=pentium2,-march=i686)
848 # Disable unit-at-a-time mode ...
849 KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)
853 The first example utilises the trick that a config option expands
854 to 'y' when selected.
856 KBUILD_AFLAGS_KERNEL $(AS) options specific for built-in
858 $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile
859 resident kernel code.
861 KBUILD_AFLAGS_MODULE Options for $(AS) when building modules
863 $(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that
865 From commandline AFLAGS_MODULE shall be used (see kbuild.txt).
867 KBUILD_CFLAGS_KERNEL $(CC) options specific for built-in
869 $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile
870 resident kernel code.
872 KBUILD_CFLAGS_MODULE Options for $(CC) when building modules
874 $(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that
876 From commandline CFLAGS_MODULE shall be used (see kbuild.txt).
878 KBUILD_LDFLAGS_MODULE Options for $(LD) when linking modules
880 $(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options
881 used when linking modules. This is often a linker script.
882 From commandline LDFLAGS_MODULE shall be used (see kbuild.txt).
884 KBUILD_ARFLAGS Options for $(AR) when creating archives
886 $(KBUILD_ARFLAGS) set by the top level Makefile to "D" (deterministic
887 mode) if this option is supported by $(AR).
889 ARCH_CPPFLAGS, ARCH_AFLAGS, ARCH_CFLAGS Overrides the kbuild defaults
891 These variables are appended to the KBUILD_CPPFLAGS,
892 KBUILD_AFLAGS, and KBUILD_CFLAGS, respectively, after the
893 top-level Makefile has set any other flags. This provides a
894 means for an architecture to override the defaults.
897 --- 6.2 Add prerequisites to archheaders:
899 The archheaders: rule is used to generate header files that
900 may be installed into user space by "make header_install" or
901 "make headers_install_all". In order to support
902 "make headers_install_all", this target has to be able to run
903 on an unconfigured tree, or a tree configured for another
906 It is run before "make archprepare" when run on the
910 --- 6.3 Add prerequisites to archprepare:
912 The archprepare: rule is used to list prerequisites that need to be
913 built before starting to descend down in the subdirectories.
914 This is usually used for header files containing assembler constants.
918 archprepare: maketools
920 In this example, the file target maketools will be processed
921 before descending down in the subdirectories.
922 See also chapter XXX-TODO that describe how kbuild supports
923 generating offset header files.
926 --- 6.4 List directories to visit when descending
928 An arch Makefile cooperates with the top Makefile to define variables
929 which specify how to build the vmlinux file. Note that there is no
930 corresponding arch-specific section for modules; the module-building
931 machinery is all architecture-independent.
934 head-y, init-y, core-y, libs-y, drivers-y, net-y
936 $(head-y) lists objects to be linked first in vmlinux.
937 $(libs-y) lists directories where a lib.a archive can be located.
938 The rest list directories where a built-in.a object file can be
941 $(init-y) objects will be located after $(head-y).
942 Then the rest follows in this order:
943 $(core-y), $(libs-y), $(drivers-y) and $(net-y).
945 The top level Makefile defines values for all generic directories,
946 and arch/$(ARCH)/Makefile only adds architecture-specific directories.
949 #arch/sparc64/Makefile
950 core-y += arch/sparc64/kernel/
951 libs-y += arch/sparc64/prom/ arch/sparc64/lib/
952 drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
955 --- 6.5 Architecture-specific boot images
957 An arch Makefile specifies goals that take the vmlinux file, compress
958 it, wrap it in bootstrapping code, and copy the resulting files
959 somewhere. This includes various kinds of installation commands.
960 The actual goals are not standardized across architectures.
962 It is common to locate any additional processing in a boot/
963 directory below arch/$(ARCH)/.
965 Kbuild does not provide any smart way to support building a
966 target specified in boot/. Therefore arch/$(ARCH)/Makefile shall
967 call make manually to build a target in boot/.
969 The recommended approach is to include shortcuts in
970 arch/$(ARCH)/Makefile, and use the full path when calling down
971 into the arch/$(ARCH)/boot/Makefile.
975 boot := arch/x86/boot
977 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
979 "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
980 make in a subdirectory.
982 There are no rules for naming architecture-specific targets,
983 but executing "make help" will list all relevant targets.
984 To support this, $(archhelp) must be defined.
989 echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
992 When make is executed without arguments, the first goal encountered
993 will be built. In the top level Makefile the first goal present
995 An architecture shall always, per default, build a bootable image.
996 In "make help", the default goal is highlighted with a '*'.
997 Add a new prerequisite to all: to select a default goal different
1004 When "make" is executed without arguments, bzImage will be built.
1006 --- 6.6 Building non-kbuild targets
1010 extra-y specifies additional targets created in the current
1011 directory, in addition to any targets specified by obj-*.
1013 Listing all targets in extra-y is required for two purposes:
1014 1) Enable kbuild to check changes in command lines
1015 - When $(call if_changed,xxx) is used
1016 2) kbuild knows what files to delete during "make clean"
1019 #arch/x86/kernel/Makefile
1020 extra-y := head.o init_task.o
1022 In this example, extra-y is used to list object files that
1023 shall be built, but shall not be linked as part of built-in.a.
1026 --- 6.7 Commands useful for building a boot image
1028 Kbuild provides a few macros that are useful when building a
1033 if_changed is the infrastructure used for the following commands.
1036 target: source(s) FORCE
1037 $(call if_changed,ld/objcopy/gzip/...)
1039 When the rule is evaluated, it is checked to see if any files
1040 need an update, or the command line has changed since the last
1041 invocation. The latter will force a rebuild if any options
1042 to the executable have changed.
1043 Any target that utilises if_changed must be listed in $(targets),
1044 otherwise the command line check will fail, and the target will
1046 Assignments to $(targets) are without $(obj)/ prefix.
1047 if_changed may be used in conjunction with custom commands as
1048 defined in 6.8 "Custom kbuild commands".
1050 Note: It is a typical mistake to forget the FORCE prerequisite.
1051 Another common pitfall is that whitespace is sometimes
1052 significant; for instance, the below will fail (note the extra space
1054 target: source(s) FORCE
1055 #WRONG!# $(call if_changed, ld/objcopy/gzip/...)
1057 Note: if_changed should not be used more than once per target.
1058 It stores the executed command in a corresponding .cmd
1059 file and multiple calls would result in overwrites and
1060 unwanted results when the target is up to date and only the
1061 tests on changed commands trigger execution of commands.
1064 Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
1067 #arch/x86/boot/Makefile
1068 LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
1069 LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
1071 targets += setup setup.o bootsect bootsect.o
1072 $(obj)/setup $(obj)/bootsect: %: %.o FORCE
1073 $(call if_changed,ld)
1075 In this example, there are two possible targets, requiring different
1076 options to the linker. The linker options are specified using the
1077 LDFLAGS_$@ syntax - one for each potential target.
1078 $(targets) are assigned all potential targets, by which kbuild knows
1079 the targets and will:
1080 1) check for commandline changes
1081 2) delete target during make clean
1083 The ": %: %.o" part of the prerequisite is a shorthand that
1084 frees us from listing the setup.o and bootsect.o files.
1085 Note: It is a common mistake to forget the "targets :=" assignment,
1086 resulting in the target file being recompiled for no
1090 Copy binary. Uses OBJCOPYFLAGS usually specified in
1091 arch/$(ARCH)/Makefile.
1092 OBJCOPYFLAGS_$@ may be used to set additional options.
1095 Compress target. Use maximum compression to compress target.
1098 #arch/x86/boot/compressed/Makefile
1099 $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
1100 $(call if_changed,gzip)
1103 Create flattened device tree blob object suitable for linking
1104 into vmlinux. Device tree blobs linked into vmlinux are placed
1105 in an init section in the image. Platform code *must* copy the
1106 blob to non-init memory prior to calling unflatten_device_tree().
1108 To use this command, simply add *.dtb into obj-y or targets, or make
1109 some other target depend on %.dtb
1111 A central rule exists to create $(obj)/%.dtb from $(src)/%.dts;
1112 architecture Makefiles do no need to explicitly write out that rule.
1116 DTC_FLAGS ?= -p 1024
1118 --- 6.8 Custom kbuild commands
1120 When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
1121 of a command is normally displayed.
1122 To enable this behaviour for custom commands kbuild requires
1123 two variables to be set:
1124 quiet_cmd_<command> - what shall be echoed
1125 cmd_<command> - the command to execute
1129 quiet_cmd_image = BUILD $@
1130 cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
1131 $(obj)/vmlinux.bin > $@
1134 $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
1135 $(call if_changed,image)
1136 @echo 'Kernel: $@ is ready'
1138 When updating the $(obj)/bzImage target, the line
1140 BUILD arch/x86/boot/bzImage
1142 will be displayed with "make KBUILD_VERBOSE=0".
1145 --- 6.9 Preprocessing linker scripts
1147 When the vmlinux image is built, the linker script
1148 arch/$(ARCH)/kernel/vmlinux.lds is used.
1149 The script is a preprocessed variant of the file vmlinux.lds.S
1150 located in the same directory.
1151 kbuild knows .lds files and includes a rule *lds.S -> *lds.
1154 #arch/x86/kernel/Makefile
1155 always := vmlinux.lds
1158 export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
1160 The assignment to $(always) is used to tell kbuild to build the
1162 The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
1163 specified options when building the target vmlinux.lds.
1165 When building the *.lds target, kbuild uses the variables:
1166 KBUILD_CPPFLAGS : Set in top-level Makefile
1167 cppflags-y : May be set in the kbuild makefile
1168 CPPFLAGS_$(@F) : Target-specific flags.
1169 Note that the full filename is used in this
1172 The kbuild infrastructure for *lds files is used in several
1173 architecture-specific files.
1175 --- 6.10 Generic header files
1177 The directory include/asm-generic contains the header files
1178 that may be shared between individual architectures.
1179 The recommended approach how to use a generic header file is
1180 to list the file in the Kbuild file.
1181 See "7.2 generic-y" for further info on syntax etc.
1183 --- 6.11 Post-link pass
1185 If the file arch/xxx/Makefile.postlink exists, this makefile
1186 will be invoked for post-link objects (vmlinux and modules.ko)
1187 for architectures to run post-link passes on. Must also handle
1190 This pass runs after kallsyms generation. If the architecture
1191 needs to modify symbol locations, rather than manipulate the
1192 kallsyms, it may be easier to add another postlink target for
1193 .tmp_vmlinux? targets to be called from link-vmlinux.sh.
1195 For example, powerpc uses this to check relocation sanity of
1196 the linked vmlinux file.
1198 === 7 Kbuild syntax for exported headers
1200 The kernel includes a set of headers that is exported to userspace.
1201 Many headers can be exported as-is but other headers require a
1202 minimal pre-processing before they are ready for user-space.
1203 The pre-processing does:
1204 - drop kernel-specific annotations
1205 - drop include of compiler.h
1206 - drop all sections that are kernel internal (guarded by ifdef __KERNEL__)
1208 All headers under include/uapi/, include/generated/uapi/,
1209 arch/<arch>/include/uapi/ and arch/<arch>/include/generated/uapi/
1212 A Kbuild file may be defined under arch/<arch>/include/uapi/asm/ and
1213 arch/<arch>/include/asm/ to list asm files coming from asm-generic.
1214 See subsequent chapter for the syntax of the Kbuild file.
1216 --- 7.1 no-export-headers
1218 no-export-headers is essentially used by include/uapi/linux/Kbuild to
1219 avoid exporting specific headers (e.g. kvm.h) on architectures that do
1220 not support it. It should be avoided as much as possible.
1224 If an architecture uses a verbatim copy of a header from
1225 include/asm-generic then this is listed in the file
1226 arch/$(ARCH)/include/asm/Kbuild like this:
1229 #arch/x86/include/asm/Kbuild
1230 generic-y += termios.h
1233 During the prepare phase of the build a wrapper include
1234 file is generated in the directory:
1236 arch/$(ARCH)/include/generated/asm
1238 When a header is exported where the architecture uses
1239 the generic header a similar wrapper is generated as part
1240 of the set of exported headers in the directory:
1244 The generated wrapper will in both cases look like the following:
1247 #include <asm-generic/termios.h>
1251 If an architecture generates other header files alongside generic-y
1252 wrappers, generated-y specifies them.
1254 This prevents them being treated as stale asm-generic wrappers and
1258 #arch/x86/include/asm/Kbuild
1259 generated-y += syscalls_32.h
1263 mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild
1264 to define the minimum set of ASM headers that all architectures must have.
1266 This works like optional generic-y. If a mandatory header is missing
1267 in arch/$(ARCH)/include/(uapi/)/asm, Kbuild will automatically generate
1268 a wrapper of the asm-generic one.
1270 The convention is to list one subdir per line and
1271 preferably in alphabetic order.
1273 === 8 Kbuild Variables
1275 The top Makefile exports the following variables:
1277 VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
1279 These variables define the current kernel version. A few arch
1280 Makefiles actually use these values directly; they should use
1281 $(KERNELRELEASE) instead.
1283 $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
1284 three-part version number, such as "2", "4", and "0". These three
1285 values are always numeric.
1287 $(EXTRAVERSION) defines an even tinier sublevel for pre-patches
1288 or additional patches. It is usually some non-numeric string
1289 such as "-pre4", and is often blank.
1293 $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
1294 for constructing installation directory names or showing in
1295 version strings. Some arch Makefiles use it for this purpose.
1299 This variable defines the target architecture, such as "i386",
1300 "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
1301 determine which files to compile.
1303 By default, the top Makefile sets $(ARCH) to be the same as the
1304 host system architecture. For a cross build, a user may
1305 override the value of $(ARCH) on the command line:
1312 This variable defines a place for the arch Makefiles to install
1313 the resident kernel image and System.map file.
1314 Use this for architecture-specific install targets.
1316 INSTALL_MOD_PATH, MODLIB
1318 $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
1319 installation. This variable is not defined in the Makefile but
1320 may be passed in by the user if desired.
1322 $(MODLIB) specifies the directory for module installation.
1323 The top Makefile defines $(MODLIB) to
1324 $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may
1325 override this value on the command line if desired.
1329 If this variable is specified, it will cause modules to be stripped
1330 after they are installed. If INSTALL_MOD_STRIP is '1', then the
1331 default option --strip-debug will be used. Otherwise, the
1332 INSTALL_MOD_STRIP value will be used as the option(s) to the strip
1336 === 9 Makefile language
1338 The kernel Makefiles are designed to be run with GNU Make. The Makefiles
1339 use only the documented features of GNU Make, but they do use many
1342 GNU Make supports elementary list-processing functions. The kernel
1343 Makefiles use a novel style of list building and manipulation with few
1346 GNU Make has two assignment operators, ":=" and "=". ":=" performs
1347 immediate evaluation of the right-hand side and stores an actual string
1348 into the left-hand side. "=" is like a formula definition; it stores the
1349 right-hand side in an unevaluated form and then evaluates this form each
1350 time the left-hand side is used.
1352 There are some cases where "=" is appropriate. Usually, though, ":="
1353 is the right choice.
1357 Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
1358 Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
1359 Updates by Sam Ravnborg <sam@ravnborg.org>
1360 Language QA by Jan Engelhardt <jengelh@gmx.de>
1364 - Describe how kbuild supports shipped files with _shipped.
1365 - Generating offset header files.
1366 - Add more variables to section 7?