3 This document describes the Linux kernel Makefiles.
10 --- 3.1 Goal definitions
11 --- 3.2 Built-in object goals - obj-y
12 --- 3.3 Loadable module goals - obj-m
13 --- 3.4 Objects which export symbols
14 --- 3.5 Library file goals - lib-y
15 --- 3.6 Descending down in directories
16 --- 3.7 Compilation flags
17 --- 3.8 Command line dependency
18 --- 3.9 Dependency tracking
19 --- 3.10 Special Rules
20 --- 3.11 $(CC) support functions
21 --- 3.12 $(LD) support functions
23 === 4 Host Program support
24 --- 4.1 Simple Host Program
25 --- 4.2 Composite Host Programs
26 --- 4.3 Defining shared libraries
27 --- 4.4 Using C++ for host programs
28 --- 4.5 Controlling compiler options for host programs
29 --- 4.6 When host programs are actually built
30 --- 4.7 Using hostprogs-$(CONFIG_FOO)
32 === 5 Kbuild clean infrastructure
34 === 6 Architecture Makefiles
35 --- 6.1 Set variables to tweak the build to the architecture
36 --- 6.2 Add prerequisites to archprepare:
37 --- 6.3 List directories to visit when descending
38 --- 6.4 Architecture-specific boot images
39 --- 6.5 Building non-kbuild targets
40 --- 6.6 Commands useful for building a boot image
41 --- 6.7 Custom kbuild commands
42 --- 6.8 Preprocessing linker scripts
43 --- 6.9 Generic header files
45 === 7 Kbuild syntax for exported headers
51 === 8 Kbuild Variables
52 === 9 Makefile language
58 The Makefiles have five parts:
60 Makefile the top Makefile.
61 .config the kernel configuration file.
62 arch/$(ARCH)/Makefile the arch Makefile.
63 scripts/Makefile.* common rules etc. for all kbuild Makefiles.
64 kbuild Makefiles there are about 500 of these.
66 The top Makefile reads the .config file, which comes from the kernel
67 configuration process.
69 The top Makefile is responsible for building two major products: vmlinux
70 (the resident kernel image) and modules (any module files).
71 It builds these goals by recursively descending into the subdirectories of
72 the kernel source tree.
73 The list of subdirectories which are visited depends upon the kernel
74 configuration. The top Makefile textually includes an arch Makefile
75 with the name arch/$(ARCH)/Makefile. The arch Makefile supplies
76 architecture-specific information to the top Makefile.
78 Each subdirectory has a kbuild Makefile which carries out the commands
79 passed down from above. The kbuild Makefile uses information from the
80 .config file to construct various file lists used by kbuild to build
81 any built-in or modular targets.
83 scripts/Makefile.* contains all the definitions/rules etc. that
84 are used to build the kernel based on the kbuild makefiles.
89 People have four different relationships with the kernel Makefiles.
91 *Users* are people who build kernels. These people type commands such as
92 "make menuconfig" or "make". They usually do not read or edit
93 any kernel Makefiles (or any other source files).
95 *Normal developers* are people who work on features such as device
96 drivers, file systems, and network protocols. These people need to
97 maintain the kbuild Makefiles for the subsystem they are
98 working on. In order to do this effectively, they need some overall
99 knowledge about the kernel Makefiles, plus detailed knowledge about the
100 public interface for kbuild.
102 *Arch developers* are people who work on an entire architecture, such
103 as sparc or ia64. Arch developers need to know about the arch Makefile
104 as well as kbuild Makefiles.
106 *Kbuild developers* are people who work on the kernel build system itself.
107 These people need to know about all aspects of the kernel Makefiles.
109 This document is aimed towards normal developers and arch developers.
112 === 3 The kbuild files
114 Most Makefiles within the kernel are kbuild Makefiles that use the
115 kbuild infrastructure. This chapter introduces the syntax used in the
117 The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
118 be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
121 Section 3.1 "Goal definitions" is a quick intro, further chapters provide
122 more details, with real examples.
124 --- 3.1 Goal definitions
126 Goal definitions are the main part (heart) of the kbuild Makefile.
127 These lines define the files to be built, any special compilation
128 options, and any subdirectories to be entered recursively.
130 The most simple kbuild makefile contains one line:
135 This tells kbuild that there is one object in that directory, named
136 foo.o. foo.o will be built from foo.c or foo.S.
138 If foo.o shall be built as a module, the variable obj-m is used.
139 Therefore the following pattern is often used:
142 obj-$(CONFIG_FOO) += foo.o
144 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
145 If CONFIG_FOO is neither y nor m, then the file will not be compiled
148 --- 3.2 Built-in object goals - obj-y
150 The kbuild Makefile specifies object files for vmlinux
151 in the $(obj-y) lists. These lists depend on the kernel
154 Kbuild compiles all the $(obj-y) files. It then calls
155 "$(LD) -r" to merge these files into one built-in.o file.
156 built-in.o is later linked into vmlinux by the parent Makefile.
158 The order of files in $(obj-y) is significant. Duplicates in
159 the lists are allowed: the first instance will be linked into
160 built-in.o and succeeding instances will be ignored.
162 Link order is significant, because certain functions
163 (module_init() / __initcall) will be called during boot in the
164 order they appear. So keep in mind that changing the link
165 order may e.g. change the order in which your SCSI
166 controllers are detected, and thus your disks are renumbered.
169 #drivers/isdn/i4l/Makefile
170 # Makefile for the kernel ISDN subsystem and device drivers.
171 # Each configuration option enables a list of files.
172 obj-$(CONFIG_ISDN_I4L) += isdn.o
173 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
175 --- 3.3 Loadable module goals - obj-m
177 $(obj-m) specify object files which are built as loadable
180 A module may be built from one source file or several source
181 files. In the case of one source file, the kbuild makefile
182 simply adds the file to $(obj-m).
185 #drivers/isdn/i4l/Makefile
186 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
188 Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
190 If a kernel module is built from several source files, you specify
191 that you want to build a module in the same way as above; however,
192 kbuild needs to know which object files you want to build your
193 module from, so you have to tell it by setting a $(<module_name>-y)
197 #drivers/isdn/i4l/Makefile
198 obj-$(CONFIG_ISDN_I4L) += isdn.o
199 isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
201 In this example, the module name will be isdn.o. Kbuild will
202 compile the objects listed in $(isdn-y) and then run
203 "$(LD) -r" on the list of these files to generate isdn.o.
205 Due to kbuild recognizing $(<module_name>-y) for composite objects,
206 you can use the value of a CONFIG_ symbol to optionally include an
207 object file as part of a composite object.
211 obj-$(CONFIG_EXT2_FS) += ext2.o
212 ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \
213 namei.o super.o symlink.o
214 ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
217 In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
218 part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
221 Note: Of course, when you are building objects into the kernel,
222 the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
223 kbuild will build an ext2.o file for you out of the individual
224 parts and then link this into built-in.o, as you would expect.
226 --- 3.4 Objects which export symbols
228 No special notation is required in the makefiles for
229 modules exporting symbols.
231 --- 3.5 Library file goals - lib-y
233 Objects listed with obj-* are used for modules, or
234 combined in a built-in.o for that specific directory.
235 There is also the possibility to list objects that will
236 be included in a library, lib.a.
237 All objects listed with lib-y are combined in a single
238 library for that directory.
239 Objects that are listed in obj-y and additionally listed in
240 lib-y will not be included in the library, since they will
241 be accessible anyway.
242 For consistency, objects listed in lib-m will be included in lib.a.
244 Note that the same kbuild makefile may list files to be built-in
245 and to be part of a library. Therefore the same directory
246 may contain both a built-in.o and a lib.a file.
249 #arch/x86/lib/Makefile
252 This will create a library lib.a based on delay.o. For kbuild to
253 actually recognize that there is a lib.a being built, the directory
254 shall be listed in libs-y.
255 See also "6.3 List directories to visit when descending".
257 Use of lib-y is normally restricted to lib/ and arch/*/lib.
259 --- 3.6 Descending down in directories
261 A Makefile is only responsible for building objects in its own
262 directory. Files in subdirectories should be taken care of by
263 Makefiles in these subdirs. The build system will automatically
264 invoke make recursively in subdirectories, provided you let it know of
267 To do so, obj-y and obj-m are used.
268 ext2 lives in a separate directory, and the Makefile present in fs/
269 tells kbuild to descend down using the following assignment.
273 obj-$(CONFIG_EXT2_FS) += ext2/
275 If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
276 the corresponding obj- variable will be set, and kbuild will descend
277 down in the ext2 directory.
278 Kbuild only uses this information to decide that it needs to visit
279 the directory, it is the Makefile in the subdirectory that
280 specifies what is modules and what is built-in.
282 It is good practice to use a CONFIG_ variable when assigning directory
283 names. This allows kbuild to totally skip the directory if the
284 corresponding CONFIG_ option is neither 'y' nor 'm'.
286 --- 3.7 Compilation flags
288 ccflags-y, asflags-y and ldflags-y
289 These three flags apply only to the kbuild makefile in which they
290 are assigned. They are used for all the normal cc, as and ld
291 invocations happening during a recursive build.
292 Note: Flags with the same behaviour were previously named:
293 EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.
294 They are still supported but their usage is deprecated.
296 ccflags-y specifies options for compiling with $(CC).
299 # drivers/acpi/Makefile
301 ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT
303 This variable is necessary because the top Makefile owns the
304 variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
307 asflags-y specifies options for assembling with $(AS).
310 #arch/sparc/kernel/Makefile
313 ldflags-y specifies options for linking with $(LD).
316 #arch/cris/boot/compressed/Makefile
317 ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
319 subdir-ccflags-y, subdir-asflags-y
320 The two flags listed above are similar to ccflags-y and asflags-y.
321 The difference is that the subdir- variants have effect for the kbuild
322 file where they are present and all subdirectories.
323 Options specified using subdir-* are added to the commandline before
324 the options specified using the non-subdir variants.
327 subdir-ccflags-y := -Werror
331 CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
334 $(CFLAGS_$@) specifies per-file options for $(CC). The $@
335 part has a literal value which specifies the file that it is for.
338 # drivers/scsi/Makefile
339 CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF
340 CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
343 These two lines specify compilation flags for aha152x.o and gdth.o.
345 $(AFLAGS_$@) is a similar feature for source files in assembly
349 # arch/arm/kernel/Makefile
350 AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
351 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
352 AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
355 --- 3.9 Dependency tracking
357 Kbuild tracks dependencies on the following:
358 1) All prerequisite files (both *.c and *.h)
359 2) CONFIG_ options used in all prerequisite files
360 3) Command-line used to compile target
362 Thus, if you change an option to $(CC) all affected files will
365 --- 3.10 Special Rules
367 Special rules are used when the kbuild infrastructure does
368 not provide the required support. A typical example is
369 header files generated during the build process.
370 Another example are the architecture-specific Makefiles which
371 need special rules to prepare boot images etc.
373 Special rules are written as normal Make rules.
374 Kbuild is not executing in the directory where the Makefile is
375 located, so all special rules shall provide a relative
376 path to prerequisite files and target files.
378 Two variables are used when defining special rules:
381 $(src) is a relative path which points to the directory
382 where the Makefile is located. Always use $(src) when
383 referring to files located in the src tree.
386 $(obj) is a relative path which points to the directory
387 where the target is saved. Always use $(obj) when
388 referring to generated files.
391 #drivers/scsi/Makefile
392 $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
393 $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
395 This is a special rule, following the normal syntax
397 The target file depends on two prerequisite files. References
398 to the target file are prefixed with $(obj), references
399 to prerequisites are referenced with $(src) (because they are not
403 echoing information to user in a rule is often a good practice
404 but when execution "make -s" one does not expect to see any output
405 except for warnings/errors.
406 To support this kbuild define $(kecho) which will echo out the
407 text following $(kecho) to stdout except if "make -s" is used.
410 #arch/blackfin/boot/Makefile
411 $(obj)/vmImage: $(obj)/vmlinux.gz
412 $(call if_changed,uimage)
413 @$(kecho) 'Kernel: $@ is ready'
416 --- 3.11 $(CC) support functions
418 The kernel may be built with several different versions of
419 $(CC), each supporting a unique set of features and options.
420 kbuild provide basic support to check for valid options for $(CC).
421 $(CC) is usually the gcc compiler, but other alternatives are
425 as-option is used to check if $(CC) -- when used to compile
426 assembler (*.S) files -- supports the given option. An optional
427 second option may be specified if the first option is not supported.
431 cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
433 In the above example, cflags-y will be assigned the option
434 -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
435 The second argument is optional, and if supplied will be used
436 if first argument is not supported.
439 cc-ldoption is used to check if $(CC) when used to link object files
440 supports the given option. An optional second option may be
441 specified if first option are not supported.
444 #arch/i386/kernel/Makefile
445 vsyscall-flags += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
447 In the above example, vsyscall-flags will be assigned the option
448 -Wl$(comma)--hash-style=sysv if it is supported by $(CC).
449 The second argument is optional, and if supplied will be used
450 if first argument is not supported.
453 as-instr checks if the assembler reports a specific instruction
454 and then outputs either option1 or option2
455 C escapes are supported in the test instruction
456 Note: as-instr-option uses KBUILD_AFLAGS for $(AS) options
459 cc-option is used to check if $(CC) supports a given option, and not
460 supported to use an optional second option.
464 cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
466 In the above example, cflags-y will be assigned the option
467 -march=pentium-mmx if supported by $(CC), otherwise -march=i586.
468 The second argument to cc-option is optional, and if omitted,
469 cflags-y will be assigned no value if first option is not supported.
470 Note: cc-option uses KBUILD_CFLAGS for $(CC) options
473 cc-option-yn is used to check if gcc supports a given option
474 and return 'y' if supported, otherwise 'n'.
478 biarch := $(call cc-option-yn, -m32)
479 aflags-$(biarch) += -a32
480 cflags-$(biarch) += -m32
482 In the above example, $(biarch) is set to y if $(CC) supports the -m32
483 option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
484 and $(cflags-y) will be assigned the values -a32 and -m32,
486 Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
489 gcc versions >= 3.0 changed the type of options used to specify
490 alignment of functions, loops etc. $(cc-option-align), when used
491 as prefix to the align options, will select the right prefix:
493 cc-option-align = -malign
495 cc-option-align = -falign
498 KBUILD_CFLAGS += $(cc-option-align)-functions=4
500 In the above example, the option -falign-functions=4 is used for
501 gcc >= 3.00. For gcc < 3.00, -malign-functions=4 is used.
502 Note: cc-option-align uses KBUILD_CFLAGS for $(CC) options
505 cc-version returns a numerical version of the $(CC) compiler version.
506 The format is <major><minor> where both are two digits. So for example
507 gcc 3.41 would return 0341.
508 cc-version is useful when a specific $(CC) version is faulty in one
509 area, for example -mregparm=3 was broken in some gcc versions
510 even though the option was accepted by gcc.
514 cflags-y += $(shell \
515 if [ $(call cc-version) -ge 0300 ] ; then \
516 echo "-mregparm=3"; fi ;)
518 In the above example, -mregparm=3 is only used for gcc version greater
519 than or equal to gcc 3.0.
522 cc-ifversion tests the version of $(CC) and equals last argument if
523 version expression is true.
526 #fs/reiserfs/Makefile
527 ccflags-y := $(call cc-ifversion, -lt, 0402, -O1)
529 In this example, ccflags-y will be assigned the value -O1 if the
530 $(CC) version is less than 4.2.
531 cc-ifversion takes all the shell operators:
532 -eq, -ne, -lt, -le, -gt, and -ge
533 The third parameter may be a text as in this example, but it may also
534 be an expanded variable or a macro.
537 cc-fullversion is useful when the exact version of gcc is needed.
538 One typical use-case is when a specific GCC version is broken.
539 cc-fullversion points out a more specific version than cc-version does.
542 #arch/powerpc/Makefile
543 $(Q)if test "$(call cc-fullversion)" = "040200" ; then \
544 echo -n '*** GCC-4.2.0 cannot compile the 64-bit powerpc ' ; \
548 In this example for a specific GCC version the build will error out explaining
549 to the user why it stops.
552 cc-cross-prefix is used to check if there exists a $(CC) in path with
553 one of the listed prefixes. The first prefix where there exist a
554 prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found
555 then nothing is returned.
556 Additional prefixes are separated by a single space in the
557 call of cc-cross-prefix.
558 This functionality is useful for architecture Makefiles that try
559 to set CROSS_COMPILE to well-known values but may have several
560 values to select between.
561 It is recommended only to try to set CROSS_COMPILE if it is a cross
562 build (host arch is different from target arch). And if CROSS_COMPILE
563 is already set then leave it with the old value.
567 ifneq ($(SUBARCH),$(ARCH))
568 ifeq ($(CROSS_COMPILE),)
569 CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)
573 --- 3.12 $(LD) support functions
576 ld-option is used to check if $(LD) supports the supplied option.
577 ld-option takes two options as arguments.
578 The second argument is an optional option that can be used if the
579 first option is not supported by $(LD).
583 LDFLAGS_vmlinux += $(call really-ld-option, -X)
586 === 4 Host Program support
588 Kbuild supports building executables on the host for use during the
590 Two steps are required in order to use a host executable.
592 The first step is to tell kbuild that a host program exists. This is
593 done utilising the variable hostprogs-y.
595 The second step is to add an explicit dependency to the executable.
596 This can be done in two ways. Either add the dependency in a rule,
597 or utilise the variable $(always).
598 Both possibilities are described in the following.
600 --- 4.1 Simple Host Program
602 In some cases there is a need to compile and run a program on the
603 computer where the build is running.
604 The following line tells kbuild that the program bin2hex shall be
605 built on the build host.
608 hostprogs-y := bin2hex
610 Kbuild assumes in the above example that bin2hex is made from a single
611 c-source file named bin2hex.c located in the same directory as
614 --- 4.2 Composite Host Programs
616 Host programs can be made up based on composite objects.
617 The syntax used to define composite objects for host programs is
618 similar to the syntax used for kernel objects.
619 $(<executable>-objs) lists all objects used to link the final
623 #scripts/lxdialog/Makefile
624 hostprogs-y := lxdialog
625 lxdialog-objs := checklist.o lxdialog.o
627 Objects with extension .o are compiled from the corresponding .c
628 files. In the above example, checklist.c is compiled to checklist.o
629 and lxdialog.c is compiled to lxdialog.o.
630 Finally, the two .o files are linked to the executable, lxdialog.
631 Note: The syntax <executable>-y is not permitted for host-programs.
633 --- 4.3 Defining shared libraries
635 Objects with extension .so are considered shared libraries, and
636 will be compiled as position independent objects.
637 Kbuild provides support for shared libraries, but the usage
639 In the following example the libkconfig.so shared library is used
640 to link the executable conf.
643 #scripts/kconfig/Makefile
645 conf-objs := conf.o libkconfig.so
646 libkconfig-objs := expr.o type.o
648 Shared libraries always require a corresponding -objs line, and
649 in the example above the shared library libkconfig is composed by
650 the two objects expr.o and type.o.
651 expr.o and type.o will be built as position independent code and
652 linked as a shared library libkconfig.so. C++ is not supported for
655 --- 4.4 Using C++ for host programs
657 kbuild offers support for host programs written in C++. This was
658 introduced solely to support kconfig, and is not recommended
662 #scripts/kconfig/Makefile
664 qconf-cxxobjs := qconf.o
666 In the example above the executable is composed of the C++ file
667 qconf.cc - identified by $(qconf-cxxobjs).
669 If qconf is composed by a mixture of .c and .cc files, then an
670 additional line can be used to identify this.
673 #scripts/kconfig/Makefile
675 qconf-cxxobjs := qconf.o
676 qconf-objs := check.o
678 --- 4.5 Controlling compiler options for host programs
680 When compiling host programs, it is possible to set specific flags.
681 The programs will always be compiled utilising $(HOSTCC) passed
682 the options specified in $(HOSTCFLAGS).
683 To set flags that will take effect for all host programs created
684 in that Makefile, use the variable HOST_EXTRACFLAGS.
687 #scripts/lxdialog/Makefile
688 HOST_EXTRACFLAGS += -I/usr/include/ncurses
690 To set specific flags for a single file the following construction
694 #arch/ppc64/boot/Makefile
695 HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
697 It is also possible to specify additional options to the linker.
700 #scripts/kconfig/Makefile
701 HOSTLOADLIBES_qconf := -L$(QTDIR)/lib
703 When linking qconf, it will be passed the extra option
706 --- 4.6 When host programs are actually built
708 Kbuild will only build host-programs when they are referenced
710 This is possible in two ways:
712 (1) List the prerequisite explicitly in a special rule.
715 #drivers/pci/Makefile
716 hostprogs-y := gen-devlist
717 $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
718 ( cd $(obj); ./gen-devlist ) < $<
720 The target $(obj)/devlist.h will not be built before
721 $(obj)/gen-devlist is updated. Note that references to
722 the host programs in special rules must be prefixed with $(obj).
725 When there is no suitable special rule, and the host program
726 shall be built when a makefile is entered, the $(always)
727 variable shall be used.
730 #scripts/lxdialog/Makefile
731 hostprogs-y := lxdialog
732 always := $(hostprogs-y)
734 This will tell kbuild to build lxdialog even if not referenced in
737 --- 4.7 Using hostprogs-$(CONFIG_FOO)
739 A typical pattern in a Kbuild file looks like this:
743 hostprogs-$(CONFIG_KALLSYMS) += kallsyms
745 Kbuild knows about both 'y' for built-in and 'm' for module.
746 So if a config symbol evaluate to 'm', kbuild will still build
747 the binary. In other words, Kbuild handles hostprogs-m exactly
748 like hostprogs-y. But only hostprogs-y is recommended to be used
749 when no CONFIG symbols are involved.
751 === 5 Kbuild clean infrastructure
753 "make clean" deletes most generated files in the obj tree where the kernel
754 is compiled. This includes generated files such as host programs.
755 Kbuild knows targets listed in $(hostprogs-y), $(hostprogs-m), $(always),
756 $(extra-y) and $(targets). They are all deleted during "make clean".
757 Files matching the patterns "*.[oas]", "*.ko", plus some additional files
758 generated by kbuild are deleted all over the kernel src tree when
759 "make clean" is executed.
761 Additional files can be specified in kbuild makefiles by use of $(clean-files).
764 #drivers/pci/Makefile
765 clean-files := devlist.h classlist.h
767 When executing "make clean", the two files "devlist.h classlist.h" will
768 be deleted. Kbuild will assume files to be in same relative directory as the
769 Makefile except if an absolute path is specified (path starting with '/').
771 To delete a directory hierarchy use:
774 #scripts/package/Makefile
775 clean-dirs := $(objtree)/debian/
777 This will delete the directory debian, including all subdirectories.
778 Kbuild will assume the directories to be in the same relative path as the
779 Makefile if no absolute path is specified (path does not start with '/').
781 To exclude certain files from make clean, use the $(no-clean-files) variable.
782 This is only a special case used in the top level Kbuild file:
786 no-clean-files := $(bounds-file) $(offsets-file)
788 Usually kbuild descends down in subdirectories due to "obj-* := dir/",
789 but in the architecture makefiles where the kbuild infrastructure
790 is not sufficient this sometimes needs to be explicit.
793 #arch/i386/boot/Makefile
794 subdir- := compressed/
796 The above assignment instructs kbuild to descend down in the
797 directory compressed/ when "make clean" is executed.
799 To support the clean infrastructure in the Makefiles that builds the
800 final bootimage there is an optional target named archclean:
805 $(Q)$(MAKE) $(clean)=arch/i386/boot
807 When "make clean" is executed, make will descend down in arch/i386/boot,
808 and clean as usual. The Makefile located in arch/i386/boot/ may use
809 the subdir- trick to descend further down.
811 Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
812 included in the top level makefile, and the kbuild infrastructure
813 is not operational at that point.
815 Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
816 be visited during "make clean".
818 === 6 Architecture Makefiles
820 The top level Makefile sets up the environment and does the preparation,
821 before starting to descend down in the individual directories.
822 The top level makefile contains the generic part, whereas
823 arch/$(ARCH)/Makefile contains what is required to set up kbuild
824 for said architecture.
825 To do so, arch/$(ARCH)/Makefile sets up a number of variables and defines
828 When kbuild executes, the following steps are followed (roughly):
829 1) Configuration of the kernel => produce .config
830 2) Store kernel version in include/linux/version.h
831 3) Symlink include/asm to include/asm-$(ARCH)
832 4) Updating all other prerequisites to the target prepare:
833 - Additional prerequisites are specified in arch/$(ARCH)/Makefile
834 5) Recursively descend down in all directories listed in
835 init-* core* drivers-* net-* libs-* and build all targets.
836 - The values of the above variables are expanded in arch/$(ARCH)/Makefile.
837 6) All object files are then linked and the resulting file vmlinux is
838 located at the root of the obj tree.
839 The very first objects linked are listed in head-y, assigned by
840 arch/$(ARCH)/Makefile.
841 7) Finally, the architecture-specific part does any required post processing
842 and builds the final bootimage.
843 - This includes building boot records
844 - Preparing initrd images and the like
847 --- 6.1 Set variables to tweak the build to the architecture
849 LDFLAGS Generic $(LD) options
851 Flags used for all invocations of the linker.
852 Often specifying the emulation is sufficient.
856 LDFLAGS := -m elf_s390
857 Note: ldflags-y can be used to further customise
858 the flags used. See chapter 3.7.
860 LDFLAGS_MODULE Options for $(LD) when linking modules
862 LDFLAGS_MODULE is used to set specific flags for $(LD) when
863 linking the .ko files used for modules.
864 Default is "-r", for relocatable output.
866 LDFLAGS_vmlinux Options for $(LD) when linking vmlinux
868 LDFLAGS_vmlinux is used to specify additional flags to pass to
869 the linker when linking the final vmlinux image.
870 LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
874 LDFLAGS_vmlinux := -e stext
876 OBJCOPYFLAGS objcopy flags
878 When $(call if_changed,objcopy) is used to translate a .o file,
879 the flags specified in OBJCOPYFLAGS will be used.
880 $(call if_changed,objcopy) is often used to generate raw binaries on
885 OBJCOPYFLAGS := -O binary
887 #arch/s390/boot/Makefile
888 $(obj)/image: vmlinux FORCE
889 $(call if_changed,objcopy)
891 In this example, the binary $(obj)/image is a binary version of
892 vmlinux. The usage of $(call if_changed,xxx) will be described later.
894 KBUILD_AFLAGS $(AS) assembler flags
896 Default value - see top level Makefile
897 Append or modify as required per architecture.
900 #arch/sparc64/Makefile
901 KBUILD_AFLAGS += -m64 -mcpu=ultrasparc
903 KBUILD_CFLAGS $(CC) compiler flags
905 Default value - see top level Makefile
906 Append or modify as required per architecture.
908 Often, the KBUILD_CFLAGS variable depends on the configuration.
912 cflags-$(CONFIG_M386) += -march=i386
913 KBUILD_CFLAGS += $(cflags-y)
915 Many arch Makefiles dynamically run the target C compiler to
916 probe supported options:
921 cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\
922 -march=pentium2,-march=i686)
924 # Disable unit-at-a-time mode ...
925 KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)
929 The first example utilises the trick that a config option expands
930 to 'y' when selected.
932 KBUILD_AFLAGS_KERNEL $(AS) options specific for built-in
934 $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile
935 resident kernel code.
937 KBUILD_AFLAGS_MODULE Options for $(AS) when building modules
939 $(KBUILD_AFLAGS_MODULE) is used to add arch specific options that
941 From commandline AFLAGS_MODULE shall be used (see kbuild.txt).
943 KBUILD_CFLAGS_KERNEL $(CC) options specific for built-in
945 $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile
946 resident kernel code.
948 KBUILD_CFLAGS_MODULE Options for $(CC) when building modules
950 $(KBUILD_CFLAGS_MODULE) is used to add arch specific options that
952 From commandline CFLAGS_MODULE shall be used (see kbuild.txt).
954 KBUILD_LDFLAGS_MODULE Options for $(LD) when linking modules
956 $(KBUILD_LDFLAGS_MODULE) is used to add arch specific options
957 used when linking modules. This is often a linker script.
958 From commandline LDFLAGS_MODULE shall be used (see kbuild.txt).
960 KBUILD_ARFLAGS Options for $(AR) when creating archives
962 $(KBUILD_ARFLAGS) set by the top level Makefile to "D" (deterministic
963 mode) if this option is supported by $(AR).
965 --- 6.2 Add prerequisites to archprepare:
967 The archprepare: rule is used to list prerequisites that need to be
968 built before starting to descend down in the subdirectories.
969 This is usually used for header files containing assembler constants.
973 archprepare: maketools
975 In this example, the file target maketools will be processed
976 before descending down in the subdirectories.
977 See also chapter XXX-TODO that describe how kbuild supports
978 generating offset header files.
981 --- 6.3 List directories to visit when descending
983 An arch Makefile cooperates with the top Makefile to define variables
984 which specify how to build the vmlinux file. Note that there is no
985 corresponding arch-specific section for modules; the module-building
986 machinery is all architecture-independent.
989 head-y, init-y, core-y, libs-y, drivers-y, net-y
991 $(head-y) lists objects to be linked first in vmlinux.
992 $(libs-y) lists directories where a lib.a archive can be located.
993 The rest list directories where a built-in.o object file can be
996 $(init-y) objects will be located after $(head-y).
997 Then the rest follows in this order:
998 $(core-y), $(libs-y), $(drivers-y) and $(net-y).
1000 The top level Makefile defines values for all generic directories,
1001 and arch/$(ARCH)/Makefile only adds architecture-specific directories.
1004 #arch/sparc64/Makefile
1005 core-y += arch/sparc64/kernel/
1006 libs-y += arch/sparc64/prom/ arch/sparc64/lib/
1007 drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
1010 --- 6.4 Architecture-specific boot images
1012 An arch Makefile specifies goals that take the vmlinux file, compress
1013 it, wrap it in bootstrapping code, and copy the resulting files
1014 somewhere. This includes various kinds of installation commands.
1015 The actual goals are not standardized across architectures.
1017 It is common to locate any additional processing in a boot/
1018 directory below arch/$(ARCH)/.
1020 Kbuild does not provide any smart way to support building a
1021 target specified in boot/. Therefore arch/$(ARCH)/Makefile shall
1022 call make manually to build a target in boot/.
1024 The recommended approach is to include shortcuts in
1025 arch/$(ARCH)/Makefile, and use the full path when calling down
1026 into the arch/$(ARCH)/boot/Makefile.
1030 boot := arch/i386/boot
1032 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
1034 "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
1035 make in a subdirectory.
1037 There are no rules for naming architecture-specific targets,
1038 but executing "make help" will list all relevant targets.
1039 To support this, $(archhelp) must be defined.
1044 echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
1047 When make is executed without arguments, the first goal encountered
1048 will be built. In the top level Makefile the first goal present
1050 An architecture shall always, per default, build a bootable image.
1051 In "make help", the default goal is highlighted with a '*'.
1052 Add a new prerequisite to all: to select a default goal different
1059 When "make" is executed without arguments, bzImage will be built.
1061 --- 6.5 Building non-kbuild targets
1065 extra-y specify additional targets created in the current
1066 directory, in addition to any targets specified by obj-*.
1068 Listing all targets in extra-y is required for two purposes:
1069 1) Enable kbuild to check changes in command lines
1070 - When $(call if_changed,xxx) is used
1071 2) kbuild knows what files to delete during "make clean"
1074 #arch/i386/kernel/Makefile
1075 extra-y := head.o init_task.o
1077 In this example, extra-y is used to list object files that
1078 shall be built, but shall not be linked as part of built-in.o.
1081 --- 6.6 Commands useful for building a boot image
1083 Kbuild provides a few macros that are useful when building a
1088 if_changed is the infrastructure used for the following commands.
1091 target: source(s) FORCE
1092 $(call if_changed,ld/objcopy/gzip)
1094 When the rule is evaluated, it is checked to see if any files
1095 need an update, or the command line has changed since the last
1096 invocation. The latter will force a rebuild if any options
1097 to the executable have changed.
1098 Any target that utilises if_changed must be listed in $(targets),
1099 otherwise the command line check will fail, and the target will
1101 Assignments to $(targets) are without $(obj)/ prefix.
1102 if_changed may be used in conjunction with custom commands as
1103 defined in 6.7 "Custom kbuild commands".
1105 Note: It is a typical mistake to forget the FORCE prerequisite.
1106 Another common pitfall is that whitespace is sometimes
1107 significant; for instance, the below will fail (note the extra space
1109 target: source(s) FORCE
1110 #WRONG!# $(call if_changed, ld/objcopy/gzip)
1113 Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
1116 Copy binary. Uses OBJCOPYFLAGS usually specified in
1117 arch/$(ARCH)/Makefile.
1118 OBJCOPYFLAGS_$@ may be used to set additional options.
1121 Compress target. Use maximum compression to compress target.
1124 #arch/i386/boot/Makefile
1125 LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
1126 LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
1128 targets += setup setup.o bootsect bootsect.o
1129 $(obj)/setup $(obj)/bootsect: %: %.o FORCE
1130 $(call if_changed,ld)
1132 In this example, there are two possible targets, requiring different
1133 options to the linker. The linker options are specified using the
1134 LDFLAGS_$@ syntax - one for each potential target.
1135 $(targets) are assigned all potential targets, by which kbuild knows
1136 the targets and will:
1137 1) check for commandline changes
1138 2) delete target during make clean
1140 The ": %: %.o" part of the prerequisite is a shorthand that
1141 free us from listing the setup.o and bootsect.o files.
1142 Note: It is a common mistake to forget the "target :=" assignment,
1143 resulting in the target file being recompiled for no
1147 Create flattend device tree blob object suitable for linking
1148 into vmlinux. Device tree blobs linked into vmlinux are placed
1149 in an init section in the image. Platform code *must* copy the
1150 blob to non-init memory prior to calling unflatten_device_tree().
1153 #arch/x86/platform/ce4100/Makefile
1154 clean-files := *dtb.S
1156 DTC_FLAGS := -p 1024
1159 $(obj)/%.dtb: $(src)/%.dts
1162 --- 6.7 Custom kbuild commands
1164 When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
1165 of a command is normally displayed.
1166 To enable this behaviour for custom commands kbuild requires
1167 two variables to be set:
1168 quiet_cmd_<command> - what shall be echoed
1169 cmd_<command> - the command to execute
1173 quiet_cmd_image = BUILD $@
1174 cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
1175 $(obj)/vmlinux.bin > $@
1178 $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
1179 $(call if_changed,image)
1180 @echo 'Kernel: $@ is ready'
1182 When updating the $(obj)/bzImage target, the line
1184 BUILD arch/i386/boot/bzImage
1186 will be displayed with "make KBUILD_VERBOSE=0".
1189 --- 6.8 Preprocessing linker scripts
1191 When the vmlinux image is built, the linker script
1192 arch/$(ARCH)/kernel/vmlinux.lds is used.
1193 The script is a preprocessed variant of the file vmlinux.lds.S
1194 located in the same directory.
1195 kbuild knows .lds files and includes a rule *lds.S -> *lds.
1198 #arch/i386/kernel/Makefile
1199 always := vmlinux.lds
1202 export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
1204 The assignment to $(always) is used to tell kbuild to build the
1206 The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
1207 specified options when building the target vmlinux.lds.
1209 When building the *.lds target, kbuild uses the variables:
1210 KBUILD_CPPFLAGS : Set in top-level Makefile
1211 cppflags-y : May be set in the kbuild makefile
1212 CPPFLAGS_$(@F) : Target specific flags.
1213 Note that the full filename is used in this
1216 The kbuild infrastructure for *lds file are used in several
1217 architecture-specific files.
1219 --- 6.9 Generic header files
1221 The directory include/asm-generic contains the header files
1222 that may be shared between individual architectures.
1223 The recommended approach how to use a generic header file is
1224 to list the file in the Kbuild file.
1225 See "7.4 generic-y" for further info on syntax etc.
1227 === 7 Kbuild syntax for exported headers
1229 The kernel include a set of headers that is exported to userspace.
1230 Many headers can be exported as-is but other headers require a
1231 minimal pre-processing before they are ready for user-space.
1232 The pre-processing does:
1233 - drop kernel specific annotations
1234 - drop include of compiler.h
1235 - drop all sections that are kernel internal (guarded by ifdef __KERNEL__)
1237 Each relevant directory contains a file name "Kbuild" which specifies the
1238 headers to be exported.
1239 See subsequent chapter for the syntax of the Kbuild file.
1243 header-y specify header files to be exported.
1246 #include/linux/Kbuild
1248 header-y += aio_abi.h
1250 The convention is to list one file per line and
1251 preferably in alphabetic order.
1253 header-y also specify which subdirectories to visit.
1254 A subdirectory is identified by a trailing '/' which
1255 can be seen in the example above for the usb subdirectory.
1257 Subdirectories are visited before their parent directories.
1261 objhdr-y specifies generated files to be exported.
1262 Generated files are special as they need to be looked
1263 up in another directory when doing 'make O=...' builds.
1266 #include/linux/Kbuild
1267 objhdr-y += version.h
1269 --- 7.3 destination-y
1271 When an architecture have a set of exported headers that needs to be
1272 exported to a different directory destination-y is used.
1273 destination-y specify the destination directory for all exported
1274 headers in the file where it is present.
1277 #arch/xtensa/platforms/s6105/include/platform/Kbuild
1278 destination-y := include/linux
1280 In the example above all exported headers in the Kbuild file
1281 will be located in the directory "include/linux" when exported.
1285 If an architecture uses a verbatim copy of a header from
1286 include/asm-generic then this is listed in the file
1287 arch/$(ARCH)/include/asm/Kbuild like this:
1290 #arch/x86/include/asm/Kbuild
1291 generic-y += termios.h
1294 During the prepare phase of the build a wrapper include
1295 file is generated in the directory:
1297 arch/$(ARCH)/include/generated/asm
1299 When a header is exported where the architecture uses
1300 the generic header a similar wrapper is generated as part
1301 of the set of exported headers in the directory:
1305 The generated wrapper will in both cases look like the following:
1308 #include <asm-generic/termios.h>
1310 === 8 Kbuild Variables
1312 The top Makefile exports the following variables:
1314 VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
1316 These variables define the current kernel version. A few arch
1317 Makefiles actually use these values directly; they should use
1318 $(KERNELRELEASE) instead.
1320 $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
1321 three-part version number, such as "2", "4", and "0". These three
1322 values are always numeric.
1324 $(EXTRAVERSION) defines an even tinier sublevel for pre-patches
1325 or additional patches. It is usually some non-numeric string
1326 such as "-pre4", and is often blank.
1330 $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
1331 for constructing installation directory names or showing in
1332 version strings. Some arch Makefiles use it for this purpose.
1336 This variable defines the target architecture, such as "i386",
1337 "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
1338 determine which files to compile.
1340 By default, the top Makefile sets $(ARCH) to be the same as the
1341 host system architecture. For a cross build, a user may
1342 override the value of $(ARCH) on the command line:
1349 This variable defines a place for the arch Makefiles to install
1350 the resident kernel image and System.map file.
1351 Use this for architecture-specific install targets.
1353 INSTALL_MOD_PATH, MODLIB
1355 $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
1356 installation. This variable is not defined in the Makefile but
1357 may be passed in by the user if desired.
1359 $(MODLIB) specifies the directory for module installation.
1360 The top Makefile defines $(MODLIB) to
1361 $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may
1362 override this value on the command line if desired.
1366 If this variable is specified, will cause modules to be stripped
1367 after they are installed. If INSTALL_MOD_STRIP is '1', then the
1368 default option --strip-debug will be used. Otherwise,
1369 INSTALL_MOD_STRIP value will be used as the option(s) to the strip
1373 === 9 Makefile language
1375 The kernel Makefiles are designed to be run with GNU Make. The Makefiles
1376 use only the documented features of GNU Make, but they do use many
1379 GNU Make supports elementary list-processing functions. The kernel
1380 Makefiles use a novel style of list building and manipulation with few
1383 GNU Make has two assignment operators, ":=" and "=". ":=" performs
1384 immediate evaluation of the right-hand side and stores an actual string
1385 into the left-hand side. "=" is like a formula definition; it stores the
1386 right-hand side in an unevaluated form and then evaluates this form each
1387 time the left-hand side is used.
1389 There are some cases where "=" is appropriate. Usually, though, ":="
1390 is the right choice.
1394 Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
1395 Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
1396 Updates by Sam Ravnborg <sam@ravnborg.org>
1397 Language QA by Jan Engelhardt <jengelh@gmx.de>
1401 - Describe how kbuild supports shipped files with _shipped.
1402 - Generating offset header files.
1403 - Add more variables to section 7?