1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/remoteproc/qcom,adsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm ADSP Peripheral Image Loader binding
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 This document defines the binding for a component that loads and boots
14 firmware on the Qualcomm ADSP Hexagon core.
19 - qcom,msm8226-adsp-pil
20 - qcom,msm8974-adsp-pil
21 - qcom,msm8996-adsp-pil
22 - qcom,msm8996-slpi-pil
23 - qcom,msm8998-adsp-pas
24 - qcom,msm8998-slpi-pas
25 - qcom,qcs404-adsp-pas
26 - qcom,qcs404-cdsp-pas
27 - qcom,qcs404-wcss-pas
28 - qcom,sc7180-mpss-pas
29 - qcom,sc7280-mpss-pas
30 - qcom,sc8180x-adsp-pas
31 - qcom,sc8180x-cdsp-pas
32 - qcom,sc8180x-mpss-pas
33 - qcom,sc8280xp-adsp-pas
34 - qcom,sc8280xp-nsp0-pas
35 - qcom,sc8280xp-nsp1-pas
36 - qcom,sdm660-adsp-pas
37 - qcom,sdm845-adsp-pas
38 - qcom,sdm845-cdsp-pas
40 - qcom,sm6350-adsp-pas
41 - qcom,sm6350-cdsp-pas
42 - qcom,sm6350-mpss-pas
43 - qcom,sm8150-adsp-pas
44 - qcom,sm8150-cdsp-pas
45 - qcom,sm8150-mpss-pas
46 - qcom,sm8150-slpi-pas
47 - qcom,sm8250-adsp-pas
48 - qcom,sm8250-cdsp-pas
49 - qcom,sm8250-slpi-pas
50 - qcom,sm8350-adsp-pas
51 - qcom,sm8350-cdsp-pas
52 - qcom,sm8350-slpi-pas
53 - qcom,sm8350-mpss-pas
54 - qcom,sm8450-adsp-pas
55 - qcom,sm8450-cdsp-pas
56 - qcom,sm8450-mpss-pas
57 - qcom,sm8450-slpi-pas
76 - description: Watchdog interrupt
77 - description: Fatal interrupt
78 - description: Ready interrupt
79 - description: Handover interrupt
80 - description: Stop acknowledge interrupt
81 - description: Shutdown acknowledge interrupt
102 description: Phandle to the CX regulator
105 description: Phandle to the PX regulator
116 $ref: /schemas/types.yaml#/definitions/string
117 description: Firmware name for the Hexagon core
121 description: Reference to the reserved-memory for the Hexagon core
124 $ref: /schemas/types.yaml#/definitions/phandle
125 description: Reference to the AOSS side-channel message RAM.
128 $ref: /schemas/types.yaml#/definitions/phandle-array
129 description: States used by the AP to signal the Hexagon core
131 - description: Stop the modem
133 qcom,smem-state-names:
134 description: The names of the state bits used for SMP2P output
139 $ref: /schemas/types.yaml#/definitions/phandle-array
142 - description: Phandle reference to a syscon representing TCSR
143 - description: offsets within syscon for q6 halt registers
144 - description: offsets within syscon for modem halt registers
145 - description: offsets within syscon for nc halt registers
147 Phandle reference to a syscon representing TCSR followed by the
148 three offsets within syscon for q6, modem and nc halt registers.
151 $ref: /schemas/remoteproc/qcom,smd-edge.yaml#
153 Qualcomm Shared Memory subnode which represents communication edge,
154 channels and devices related to the ADSP.
155 unevaluatedProperties: false
158 $ref: /schemas/remoteproc/qcom,glink-edge.yaml#
160 Qualcomm G-Link subnode which represents communication edge, channels
161 and devices related to the ADSP.
171 - qcom,smem-state-names
173 additionalProperties: false
181 - qcom,msm8226-adsp-pil
182 - qcom,msm8974-adsp-pil
183 - qcom,msm8996-adsp-pil
184 - qcom,msm8996-slpi-pil
185 - qcom,msm8998-adsp-pas
186 - qcom,qcs404-adsp-pas
187 - qcom,qcs404-wcss-pas
188 - qcom,sc7280-mpss-pas
189 - qcom,sc8180x-adsp-pas
190 - qcom,sc8180x-cdsp-pas
191 - qcom,sc8180x-mpss-pas
192 - qcom,sc8280xp-adsp-pas
193 - qcom,sc8280xp-nsp0-pas
194 - qcom,sc8280xp-nsp1-pas
195 - qcom,sdm845-adsp-pas
196 - qcom,sdm845-cdsp-pas
197 - qcom,sm6350-adsp-pas
198 - qcom,sm6350-cdsp-pas
199 - qcom,sm6350-mpss-pas
200 - qcom,sm8150-adsp-pas
201 - qcom,sm8150-cdsp-pas
202 - qcom,sm8150-mpss-pas
203 - qcom,sm8150-slpi-pas
204 - qcom,sm8250-adsp-pas
205 - qcom,sm8250-cdsp-pas
206 - qcom,sm8250-slpi-pas
207 - qcom,sm8350-adsp-pas
208 - qcom,sm8350-cdsp-pas
209 - qcom,sm8350-slpi-pas
210 - qcom,sm8350-mpss-pas
211 - qcom,sm8450-adsp-pas
212 - qcom,sm8450-cdsp-pas
213 - qcom,sm8450-slpi-pas
214 - qcom,sm8450-mpss-pas
219 - description: XO clock
229 - qcom,msm8998-slpi-pas
234 - description: XO clock
235 - description: AGGRE2 clock
246 - qcom,qcs404-cdsp-pas
251 - description: XO clock
252 - description: SWAY clock
253 - description: TBU clock
254 - description: BIMC clock
255 - description: AHB AON clock
256 - description: Q6SS SLAVE clock
257 - description: Q6SS MASTER clock
258 - description: Q6 AXIM clock
275 - qcom,sc7180-mpss-pas
280 - description: XO clock
281 - description: IFACE clock
282 - description: BUS clock
283 - description: NAC clock
284 - description: SNOC AXI clock
285 - description: MNOC AXI clock
300 - qcom,msm8226-adsp-pil
301 - qcom,msm8974-adsp-pil
302 - qcom,msm8996-adsp-pil
303 - qcom,msm8996-slpi-pil
304 - qcom,msm8998-adsp-pas
305 - qcom,msm8998-slpi-pas
306 - qcom,qcs404-adsp-pas
307 - qcom,qcs404-cdsp-pas
308 - qcom,qcs404-wcss-pas
309 - qcom,sc8180x-adsp-pas
310 - qcom,sc8180x-cdsp-pas
311 - qcom,sc8280xp-adsp-pas
312 - qcom,sc8280xp-nsp0-pas
313 - qcom,sc8280xp-nsp1-pas
314 - qcom,sdm845-adsp-pas
315 - qcom,sdm845-cdsp-pas
316 - qcom,sm6350-adsp-pas
317 - qcom,sm6350-cdsp-pas
318 - qcom,sm8150-adsp-pas
319 - qcom,sm8150-cdsp-pas
320 - qcom,sm8150-slpi-pas
321 - qcom,sm8250-adsp-pas
322 - qcom,sm8250-cdsp-pas
323 - qcom,sm8250-slpi-pas
324 - qcom,sm8350-adsp-pas
325 - qcom,sm8350-cdsp-pas
326 - qcom,sm8350-slpi-pas
327 - qcom,sm8450-adsp-pas
328 - qcom,sm8450-cdsp-pas
329 - qcom,sm8450-slpi-pas
342 - qcom,sc7180-mpss-pas
343 - qcom,sc7280-mpss-pas
344 - qcom,sc8180x-mpss-pas
345 - qcom,sdx55-mpss-pas
346 - qcom,sm6350-mpss-pas
347 - qcom,sm8150-mpss-pas
348 - qcom,sm8350-mpss-pas
349 - qcom,sm8450-mpss-pas
362 - qcom,msm8974-adsp-pil
372 - qcom,msm8226-adsp-pil
373 - qcom,msm8996-adsp-pil
374 - qcom,msm8998-adsp-pas
375 - qcom,sm8150-adsp-pas
376 - qcom,sm8150-cdsp-pas
381 - description: CX power domain
391 - qcom,msm8996-slpi-pil
392 - qcom,msm8998-slpi-pas
397 - description: SSC-CX power domain
409 - qcom,sc7180-mpss-pas
414 - description: CX power domain
415 - description: MX power domain
416 - description: MSS power domain
428 - qcom,sm6350-cdsp-pas
433 - description: CX power domain
434 - description: MX power domain
445 - qcom,sc7280-mpss-pas
446 - qcom,sdx55-mpss-pas
447 - qcom,sm6350-mpss-pas
448 - qcom,sm8150-mpss-pas
449 - qcom,sm8350-mpss-pas
450 - qcom,sm8450-mpss-pas
455 - description: CX power domain
456 - description: MSS power domain
467 - qcom,sc8180x-adsp-pas
468 - qcom,sc8180x-cdsp-pas
469 - qcom,sc8280xp-adsp-pas
470 - qcom,sm6350-adsp-pas
471 - qcom,sm8150-slpi-pas
472 - qcom,sm8250-adsp-pas
473 - qcom,sm8250-slpi-pas
474 - qcom,sm8350-adsp-pas
475 - qcom,sm8350-slpi-pas
476 - qcom,sm8450-adsp-pas
477 - qcom,sm8450-slpi-pas
482 - description: LCX power domain
483 - description: LMX power domain
494 - qcom,sm8350-cdsp-pas
495 - qcom,sm8450-cdsp-pas
500 - description: CX power domain
501 - description: MXC power domain
512 - qcom,sc8280xp-nsp0-pas
513 - qcom,sc8280xp-nsp1-pas
518 - description: NSP power domain
528 - qcom,qcs404-cdsp-pas
533 - description: CDSP restart
543 - qcom,sc7180-mpss-pas
544 - qcom,sc7280-mpss-pas
549 - description: MSS restart
550 - description: PDC reset
561 - qcom,msm8226-adsp-pil
562 - qcom,msm8974-adsp-pil
563 - qcom,msm8996-adsp-pil
564 - qcom,msm8996-slpi-pil
565 - qcom,msm8998-adsp-pas
566 - qcom,msm8998-slpi-pas
567 - qcom,qcs404-adsp-pas
568 - qcom,qcs404-cdsp-pas
569 - qcom,qcs404-wcss-pas
570 - qcom,sdm660-adsp-pas
571 - qcom,sdx55-mpss-pas
578 #include <dt-bindings/clock/qcom,rpmcc.h>
579 #include <dt-bindings/interrupt-controller/arm-gic.h>
580 #include <dt-bindings/interrupt-controller/irq.h>
582 compatible = "qcom,msm8974-adsp-pil";
584 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
585 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
586 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
587 <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
588 <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
589 interrupt-names = "wdog",
595 clocks = <&rpmcc RPM_CXO_CLK>;
598 cx-supply = <&pm8841_s2>;
600 memory-region = <&adsp_region>;
602 qcom,smem-states = <&adsp_smp2p_out 0>;
603 qcom,smem-state-names = "stop";
606 interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
608 qcom,ipc = <&apcs 8 8>;