1 Rockchip specific extensions to the Analogix Display Port PHY
2 ------------------------------------
5 - compatible : should be one of the following supported values:
6 - "rockchip.rk3288-dp-phy"
7 - clocks: from common clock binding: handle to dp clock.
8 of memory mapped region.
9 - clock-names: from common clock binding:
10 Required elements: "24m"
11 - rockchip,grf: phandle to the syscon managing the "general register files"
12 - #phy-cells : from the generic PHY bindings, must be 0;
17 compatible = "rockchip,rk3288-dp-phy";
18 rockchip,grf = <&grf>;
19 clocks = <&cru SCLK_EDP_24M>;