1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 BayLibre, SAS
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: STMicroelectronics STM32 / MCU DWMAC glue layer controller
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
15 This file documents platform glue layer for stmmac.
17 # We need a select here so we don't match all nodes with 'snps,dwmac'
29 - $ref: snps,dwmac.yaml#
37 - const: snps,dwmac-4.20a
41 - const: snps,dwmac-4.10a
45 - const: snps,dwmac-3.50a
56 - description: GMAC main clock
57 - description: MAC TX clock
58 - description: MAC RX clock
59 - description: For MPU family, used for power mode
60 - description: For MPU family, used for PHY without quartz
61 - description: PTP clock
76 $ref: /schemas/types.yaml#/definitions/phandle-array
79 - description: phandle to the syscon node which encompases the glue register
80 - description: offset of the control register
82 Should be phandle/offset pair. The phandle to the syscon node which
83 encompases the glue register, and the offset of the control register
87 set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125.
92 set this property in RMII mode when you have PHY without crystal 50MHz and want to
93 select RCC clock instead of ETH_REF_CLK.
106 unevaluatedProperties: false
110 #include <dt-bindings/interrupt-controller/arm-gic.h>
111 #include <dt-bindings/clock/stm32mp1-clks.h>
112 #include <dt-bindings/reset/stm32mp1-resets.h>
113 #include <dt-bindings/mfd/stm32h7-rcc.h>
115 ethernet0: ethernet@5800a000 {
116 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
117 reg = <0x5800a000 0x2000>;
118 reg-names = "stmmaceth";
119 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
120 interrupt-names = "macirq";
121 clock-names = "stmmaceth",
126 clocks = <&rcc ETHMAC>,
131 st,syscon = <&syscfg 0x4>;
133 snps,axi-config = <&stmmac_axi_config_0>;
139 //Example 2 (MCU example)
140 ethernet1: ethernet@40028000 {
141 compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
142 reg = <0x40028000 0x8000>;
143 reg-names = "stmmaceth";
144 interrupts = <0 61 0>, <0 62 0>;
145 interrupt-names = "macirq", "eth_wake_irq";
146 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
147 clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
148 st,syscon = <&syscfg 0x4>;
156 ethernet2: ethernet@40027000 {
157 compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
158 reg = <0x40028000 0x8000>;
159 reg-names = "stmmaceth";
161 interrupt-names = "macirq";
162 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
163 clocks = <&rcc 62>, <&rcc 61>, <&rcc 60>;
164 st,syscon = <&syscfg 0x4>;