1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "mmc-controller.yaml"
16 The Enhanced Secure Digital Host Controller on Freescale i.MX family
17 provides an interface for MMC, SD, and SDIO types of memory cards.
19 This file documents differences between the core properties described
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
47 - const: fsl,imx7d-usdhc
52 - const: fsl,imx8mm-usdhc
62 boolean, if present, indicate to use controller internal write protection.
66 $ref: /schemas/types.yaml#/definitions/uint32
68 Specify the number of delay cells for override mode.
69 This is used to set the clock delay for DLL(Delay Line) on override mode
70 to select a proper data sampling window in case the clock quality is not good
71 due to signal path is too long on the board. Please refer to eSDHC/uSDHC
72 chapter, DLL (Delay Line) section in RM for details.
76 $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
78 Specify the voltage range in case there are software transparent level
79 shifters on the outputs of the controller. Two cells are required, first
80 cell specifies minimum slot voltage (mV), second cell specifies maximum
84 - description: value for minimum slot voltage
85 - description: value for maximum slot voltage
89 $ref: /schemas/types.yaml#/definitions/uint32
91 Specify the start delay cell point when send first CMD19 in tuning procedure.
95 $ref: /schemas/types.yaml#/definitions/uint32
97 Specify the increasing delay cell steps in tuning procedure.
98 The uSDHC use one delay cell as default increasing step to do tuning process.
99 This property allows user to change the tuning step to more than one delay
100 cells which is useful for some special boards or cards when the default
101 tuning step can't find the proper delay window within limited tuning retries.
104 fsl,strobe-dll-delay-target:
105 $ref: /schemas/types.yaml#/definitions/uint32
107 Specify the strobe dll control slave delay target.
108 This delay target programming host controller loopback read clock, and this
109 property allows user to change the delay target for the strobe input read clock.
110 If not use this property, driver default set the delay target to value 7.
111 Only eMMC HS400 mode need to take care of this property.
117 Handle clocks for the sdhc controller.
133 - const: state_100mhz
134 - const: state_200mhz
146 unevaluatedProperties: false
151 compatible = "fsl,imx51-esdhc";
152 reg = <0x70004000 0x4000>;
158 compatible = "fsl,imx51-esdhc";
159 reg = <0x70008000 0x4000>;
161 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
162 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */