1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AT91 SAMA5D2 Analog to Digital Converter (ADC)
10 - Ludovic Desroches <ludovic.desroches@atmel.com>
11 - Eugen Hristev <eugen.hristev@microchip.com>
17 - microchip,sam9x60-adc
18 - microchip,sama7g5-adc
35 atmel,min-sample-rate-hz:
36 description: Minimum sampling rate, it depends on SoC.
38 atmel,max-sample-rate-hz:
39 description: Maximum sampling rate, it depends on SoC.
41 atmel,startup-time-ms:
42 description: Startup time expressed in ms, it depends on SoC.
44 atmel,trigger-edge-type:
45 $ref: '/schemas/types.yaml#/definitions/uint32'
47 One of possible edge types for the ADTRG hardware trigger pin.
48 When the specific edge type is detected, the conversion will
49 start. Should be one of IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING
50 or IRQ_TYPE_EDGE_BOTH.
62 additionalProperties: false
72 - atmel,min-sample-rate-hz
73 - atmel,max-sample-rate-hz
74 - atmel,startup-time-ms
78 #include <dt-bindings/dma/at91.h>
79 #include <dt-bindings/interrupt-controller/irq.h>
85 compatible = "atmel,sama5d2-adc";
86 reg = <0xfc030000 0x100>;
87 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;
89 clock-names = "adc_clk";
90 atmel,min-sample-rate-hz = <200000>;
91 atmel,max-sample-rate-hz = <20000000>;
92 atmel,startup-time-ms = <4>;
93 vddana-supply = <&vdd_3v3_lp_reg>;
94 vref-supply = <&vdd_3v3_lp_reg>;
95 atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>;
96 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
98 #io-channel-cells = <1>;