1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 Analog Devices Inc.
5 $id: http://devicetree.org/schemas/bindings/iio/adc/adi,ad7192.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices AD7192 ADC device driver
11 - Michael Hennerich <michael.hennerich@analog.com>
14 Bindings for the Analog Devices AD7192 ADC device. Datasheet can be
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
35 description: phandle to the master clock (mclk)
45 description: DVdd voltage supply
50 description: AVdd voltage supply
54 adi,rejection-60-Hz-enable:
56 This bit enables a notch at 60 Hz when the first notch of the sinc
57 filter is at 50 Hz. When REJ60 is set, a filter notch is placed at
58 60 Hz when the sinc filter first notch is at 50 Hz. This allows
59 simultaneous 50 Hz/ 60 Hz rejection.
62 adi,refin2-pins-enable:
64 External reference applied between the P1/REFIN2(+) and P0/REFIN2(−) pins.
69 Enables the buffer on the analog inputs. If cleared, the analog inputs
70 are unbuffered, lowering the power consumption of the device. If this
71 bit is set, the analog inputs are buffered, allowing the user to place
72 source impedances on the front end without contributing gain errors to
76 adi,burnout-currents-enable:
78 When this bit is set to 1, the 500 nA current sources in the signal
79 path are enabled. When BURN = 0, the burnout currents are disabled.
80 The burnout currents can be enabled only when the buffer is active
81 and when chop is disabled.
85 description: see Documentation/devicetree/bindings/iio/adc/adc.txt
103 compatible = "adi,ad7192";
105 spi-max-frequency = <1000000>;
108 clocks = <&ad7192_mclk>;
109 clock-names = "mclk";
110 #interrupt-cells = <2>;
111 interrupts = <25 0x2>;
112 interrupt-parent = <&gpio>;
113 dvdd-supply = <&dvdd>;
114 avdd-supply = <&avdd>;
116 adi,refin2-pins-enable;
117 adi,rejection-60-Hz-enable;
119 adi,burnout-currents-enable;