1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Camera Control Interface (CCI) I2C controller
10 - Loic Poulain <loic.poulain@linaro.org>
11 - Robert Foss <robert.foss@linaro.org>
24 - const: qcom,msm8226-cci # CCI v1
34 - const: qcom,msm8996-cci # CCI v2
61 $ref: /schemas/i2c/i2c-controller.yaml#
62 unevaluatedProperties: false
108 - const: qcom,msm8226-cci
115 - const: camss_top_ahb
127 - const: qcom,msm8996-cci
134 - const: camss_top_ahb
154 - const: slow_ahb_src
175 - const: slow_ahb_src
194 - const: slow_ahb_src
198 additionalProperties: false
202 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
203 #include <dt-bindings/gpio/gpio.h>
204 #include <dt-bindings/interrupt-controller/arm-gic.h>
207 reg = <0x0ac4a000 0x4000>;
208 compatible = "qcom,sdm845-cci", "qcom,msm8996-cci";
209 #address-cells = <1>;
212 interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
213 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
215 clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
216 <&clock_camcc CAM_CC_SOC_AHB_CLK>,
217 <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
218 <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
219 <&clock_camcc CAM_CC_CCI_CLK>,
220 <&clock_camcc CAM_CC_CCI_CLK_SRC>;
221 clock-names = "camnoc_axi",
228 assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
229 <&clock_camcc CAM_CC_CCI_CLK>;
230 assigned-clock-rates = <80000000>,
233 pinctrl-names = "default", "sleep";
234 pinctrl-0 = <&cci0_default &cci1_default>;
235 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
239 clock-frequency = <1000000>;
240 #address-cells = <1>;
244 compatible = "ovti,ov8856";
247 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&cam0_default>;
251 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
252 clock-names = "xvclk";
253 clock-frequency = <19200000>;
255 dovdd-supply = <&vreg_lvs1a_1p8>;
256 avdd-supply = <&cam0_avdd_2v8>;
257 dvdd-supply = <&cam0_dvdd_1v2>;
260 ov8856_ep: endpoint {
261 link-frequencies = /bits/ 64 <360000000 180000000>;
262 data-lanes = <1 2 3 4>;
263 remote-endpoint = <&csiphy0_ep>;
269 cci_i2c1: i2c-bus@1 {
271 clock-frequency = <1000000>;
272 #address-cells = <1>;
276 compatible = "ovti,ov7251";
279 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&cam3_default>;
283 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
284 clock-names = "xclk";
285 clock-frequency = <24000000>;
287 vdddo-supply = <&vreg_lvs1a_1p8>;
288 vdda-supply = <&cam3_avdd_2v8>;
291 ov7251_ep: endpoint {
293 link-frequencies = /bits/ 64 <240000000 319200000>;
294 remote-endpoint = <&csiphy3_ep>;