1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos850 SoC clock controller
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
17 Exynos850 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
19 tree nodes, and might depend on each other. Root clocks in that clock tree are
20 two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
21 clocks must be defined as fixed-rate clocks in dts.
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24 dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
26 Each clock is assigned an identifier and client nodes can use this identifier
27 to specify the clock which they consume. All clocks available for usage
28 in clock consumer nodes are defined as preprocessor macros in
29 'dt-bindings/clock/exynos850.h' header.
34 - samsung,exynos850-cmu-top
35 - samsung,exynos850-cmu-apm
36 - samsung,exynos850-cmu-aud
37 - samsung,exynos850-cmu-cmgp
38 - samsung,exynos850-cmu-core
39 - samsung,exynos850-cmu-dpu
40 - samsung,exynos850-cmu-g3d
41 - samsung,exynos850-cmu-hsi
42 - samsung,exynos850-cmu-is
43 - samsung,exynos850-cmu-mfcmscl
44 - samsung,exynos850-cmu-peri
65 const: samsung,exynos850-cmu-top
71 - description: External reference clock (26 MHz)
81 const: samsung,exynos850-cmu-apm
87 - description: External reference clock (26 MHz)
88 - description: CMU_APM bus clock (from CMU_TOP)
93 - const: dout_clkcmu_apm_bus
99 const: samsung,exynos850-cmu-aud
105 - description: External reference clock (26 MHz)
106 - description: AUD clock (from CMU_TOP)
117 const: samsung,exynos850-cmu-cmgp
123 - description: External reference clock (26 MHz)
124 - description: CMU_CMGP bus clock (from CMU_APM)
129 - const: gout_clkcmu_cmgp_bus
135 const: samsung,exynos850-cmu-core
141 - description: External reference clock (26 MHz)
142 - description: CMU_CORE bus clock (from CMU_TOP)
143 - description: CCI clock (from CMU_TOP)
144 - description: eMMC clock (from CMU_TOP)
145 - description: SSS clock (from CMU_TOP)
150 - const: dout_core_bus
151 - const: dout_core_cci
152 - const: dout_core_mmc_embd
153 - const: dout_core_sss
159 const: samsung,exynos850-cmu-dpu
165 - description: External reference clock (26 MHz)
166 - description: DPU clock (from CMU_TOP)
177 const: samsung,exynos850-cmu-g3d
183 - description: External reference clock (26 MHz)
184 - description: G3D clock (from CMU_TOP)
189 - const: dout_g3d_switch
195 const: samsung,exynos850-cmu-hsi
201 - description: External reference clock (26 MHz)
202 - description: External RTC clock (32768 Hz)
203 - description: CMU_HSI bus clock (from CMU_TOP)
204 - description: SD card clock (from CMU_TOP)
205 - description: USB 2.0 DRD clock (from CMU_TOP)
211 - const: dout_hsi_bus
212 - const: dout_hsi_mmc_card
213 - const: dout_hsi_usb20drd
219 const: samsung,exynos850-cmu-is
225 - description: External reference clock (26 MHz)
226 - description: CMU_IS bus clock (from CMU_TOP)
227 - description: Image Texture Processing core clock (from CMU_TOP)
228 - description: Visual Recognition Accelerator clock (from CMU_TOP)
229 - description: Geometric Distortion Correction clock (from CMU_TOP)
243 const: samsung,exynos850-cmu-mfcmscl
249 - description: External reference clock (26 MHz)
250 - description: Multi-Format Codec clock (from CMU_TOP)
251 - description: Memory to Memory Scaler clock (from CMU_TOP)
252 - description: Multi-Channel Scaler clock (from CMU_TOP)
253 - description: JPEG codec clock (from CMU_TOP)
258 - const: dout_mfcmscl_mfc
259 - const: dout_mfcmscl_m2m
260 - const: dout_mfcmscl_mcsc
261 - const: dout_mfcmscl_jpeg
267 const: samsung,exynos850-cmu-peri
273 - description: External reference clock (26 MHz)
274 - description: CMU_PERI bus clock (from CMU_TOP)
275 - description: UART clock (from CMU_TOP)
276 - description: Parent clock for HSI2C and SPI (from CMU_TOP)
281 - const: dout_peri_bus
282 - const: dout_peri_uart
283 - const: dout_peri_ip
292 additionalProperties: false
295 # Clock controller node for CMU_PERI
297 #include <dt-bindings/clock/exynos850.h>
299 cmu_peri: clock-controller@10030000 {
300 compatible = "samsung,exynos850-cmu-peri";
301 reg = <0x10030000 0x8000>;
304 clocks = <&oscclk>, <&cmu_top CLK_DOUT_PERI_BUS>,
305 <&cmu_top CLK_DOUT_PERI_UART>,
306 <&cmu_top CLK_DOUT_PERI_IP>;
307 clock-names = "oscclk", "dout_peri_bus",
308 "dout_peri_uart", "dout_peri_ip";