1 * Texas Instruments Davinci NAND
3 This file provides information, what the device node for the
4 davinci nand interface contain.
7 - compatible: "ti,davinci-nand";
8 - reg : contain 2 offset/length values:
9 - offset and length for the access window
10 - offset and length for accessing the aemif control registers
11 - ti,davinci-chipselect: Indicates on the davinci_nand driver which
12 chipselect is used for accessing the nand.
14 Recommended properties :
15 - ti,davinci-mask-ale: mask for ale
16 - ti,davinci-mask-cle: mask for cle
17 - ti,davinci-mask-chipsel: mask for chipselect
18 - ti,davinci-ecc-mode: ECC mode valid values for davinci driver:
22 - ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
23 - ti,davinci-nand-buswidth: buswidth 8 or 16
24 - ti,davinci-nand-use-bbt: use flash based bad block table support.
26 nand device bindings may contain additional sub-nodes describing
27 partitions of the address space. See partition.txt for more detail.
29 Example (enbw_cmc board):
31 compatible = "ti,davinci-aemif";
34 reg = <0x68000000 0x80000>;
35 ranges = <2 0 0x60000000 0x02000000
36 3 0 0x62000000 0x02000000
37 4 0 0x64000000 0x02000000
38 5 0 0x66000000 0x02000000
39 6 0 0x68000000 0x02000000>;
41 compatible = "ti,davinci-nand";
46 ti,davinci-chipselect = <1>;
47 ti,davinci-mask-ale = <0>;
48 ti,davinci-mask-cle = <0>;
49 ti,davinci-mask-chipsel = <0>;
50 ti,davinci-ecc-mode = "hw";
51 ti,davinci-ecc-bits = <4>;
52 ti,davinci-nand-use-bbt;
56 reg = <0x180000 0x7e80000>;