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Merge tag 'mm-hotfixes-stable-2025-07-11-16-16' of git://git.kernel.org/pub/scm/linux...
[linux-2.6-block.git] / sound / soc / codecs / cros_ec_codec.c
... / ...
CommitLineData
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2019 Google, Inc.
4 *
5 * ChromeOS Embedded Controller codec driver.
6 *
7 * This driver uses the cros-ec interface to communicate with the ChromeOS
8 * EC for audio function.
9 */
10
11#include <crypto/sha2.h>
12#include <linux/acpi.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/io.h>
16#include <linux/jiffies.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
21#include <linux/platform_data/cros_ec_commands.h>
22#include <linux/platform_data/cros_ec_proto.h>
23#include <linux/platform_device.h>
24#include <linux/string_choices.h>
25#include <sound/pcm.h>
26#include <sound/pcm_params.h>
27#include <sound/soc.h>
28#include <sound/tlv.h>
29
30struct cros_ec_codec_priv {
31 struct device *dev;
32 struct cros_ec_device *ec_device;
33
34 /* common */
35 uint32_t ec_capabilities;
36
37 uint64_t ec_shm_addr;
38 uint32_t ec_shm_len;
39
40 uint64_t ap_shm_phys_addr;
41 uint32_t ap_shm_len;
42 uint64_t ap_shm_addr;
43 uint64_t ap_shm_last_alloc;
44
45 /* DMIC */
46 atomic_t dmic_probed;
47
48 /* I2S_RX */
49 uint32_t i2s_rx_bclk_ratio;
50
51 /* WoV */
52 bool wov_enabled;
53 uint8_t *wov_audio_shm_p;
54 uint32_t wov_audio_shm_len;
55 uint8_t wov_audio_shm_type;
56 uint8_t *wov_lang_shm_p;
57 uint32_t wov_lang_shm_len;
58 uint8_t wov_lang_shm_type;
59
60 struct mutex wov_dma_lock;
61 uint8_t wov_buf[64000];
62 uint32_t wov_rp, wov_wp;
63 size_t wov_dma_offset;
64 bool wov_burst_read;
65 struct snd_pcm_substream *wov_substream;
66 struct delayed_work wov_copy_work;
67 struct notifier_block wov_notifier;
68};
69
70static int ec_codec_capable(struct cros_ec_codec_priv *priv, uint8_t cap)
71{
72 return priv->ec_capabilities & BIT(cap);
73}
74
75static int send_ec_host_command(struct cros_ec_device *ec_dev, uint32_t cmd,
76 uint8_t *out, size_t outsize,
77 uint8_t *in, size_t insize)
78{
79 int ret;
80 struct cros_ec_command *msg;
81
82 msg = kmalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL);
83 if (!msg)
84 return -ENOMEM;
85
86 msg->version = 0;
87 msg->command = cmd;
88 msg->outsize = outsize;
89 msg->insize = insize;
90
91 if (outsize)
92 memcpy(msg->data, out, outsize);
93
94 ret = cros_ec_cmd_xfer_status(ec_dev, msg);
95 if (ret < 0)
96 goto error;
97
98 if (in && insize)
99 memcpy(in, msg->data, insize);
100
101 ret = 0;
102error:
103 kfree(msg);
104 return ret;
105}
106
107static int dmic_get_gain(struct snd_kcontrol *kcontrol,
108 struct snd_ctl_elem_value *ucontrol)
109{
110 struct snd_soc_component *component =
111 snd_soc_kcontrol_component(kcontrol);
112 struct cros_ec_codec_priv *priv =
113 snd_soc_component_get_drvdata(component);
114 struct ec_param_ec_codec_dmic p;
115 struct ec_response_ec_codec_dmic_get_gain_idx r;
116 int ret;
117
118 p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
119 p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
120 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
121 (uint8_t *)&p, sizeof(p),
122 (uint8_t *)&r, sizeof(r));
123 if (ret < 0)
124 return ret;
125 ucontrol->value.integer.value[0] = r.gain;
126
127 p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
128 p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
129 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
130 (uint8_t *)&p, sizeof(p),
131 (uint8_t *)&r, sizeof(r));
132 if (ret < 0)
133 return ret;
134 ucontrol->value.integer.value[1] = r.gain;
135
136 return 0;
137}
138
139static int dmic_put_gain(struct snd_kcontrol *kcontrol,
140 struct snd_ctl_elem_value *ucontrol)
141{
142 struct snd_soc_component *component =
143 snd_soc_kcontrol_component(kcontrol);
144 struct cros_ec_codec_priv *priv =
145 snd_soc_component_get_drvdata(component);
146 struct soc_mixer_control *control =
147 (struct soc_mixer_control *)kcontrol->private_value;
148 int max_dmic_gain = control->max;
149 int left = ucontrol->value.integer.value[0];
150 int right = ucontrol->value.integer.value[1];
151 struct ec_param_ec_codec_dmic p;
152 int ret;
153
154 if (left > max_dmic_gain || right > max_dmic_gain)
155 return -EINVAL;
156
157 dev_dbg(component->dev, "set mic gain to %u, %u\n", left, right);
158
159 p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
160 p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
161 p.set_gain_idx_param.gain = left;
162 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
163 (uint8_t *)&p, sizeof(p), NULL, 0);
164 if (ret < 0)
165 return ret;
166
167 p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
168 p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
169 p.set_gain_idx_param.gain = right;
170 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
171 (uint8_t *)&p, sizeof(p), NULL, 0);
172}
173
174static const DECLARE_TLV_DB_SCALE(dmic_gain_tlv, 0, 100, 0);
175
176enum {
177 DMIC_CTL_GAIN = 0,
178};
179
180static struct snd_kcontrol_new dmic_controls[] = {
181 [DMIC_CTL_GAIN] =
182 SOC_DOUBLE_EXT_TLV("EC Mic Gain", SND_SOC_NOPM, SND_SOC_NOPM,
183 0, 0, 0, dmic_get_gain, dmic_put_gain,
184 dmic_gain_tlv),
185};
186
187static int dmic_probe(struct snd_soc_component *component)
188{
189 struct cros_ec_codec_priv *priv =
190 snd_soc_component_get_drvdata(component);
191 struct device *dev = priv->dev;
192 struct soc_mixer_control *control;
193 struct ec_param_ec_codec_dmic p;
194 struct ec_response_ec_codec_dmic_get_max_gain r;
195 int ret;
196
197 if (!atomic_add_unless(&priv->dmic_probed, 1, 1))
198 return 0;
199
200 p.cmd = EC_CODEC_DMIC_GET_MAX_GAIN;
201
202 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
203 (uint8_t *)&p, sizeof(p),
204 (uint8_t *)&r, sizeof(r));
205 if (ret < 0) {
206 dev_warn(dev, "get_max_gain() unsupported\n");
207 return 0;
208 }
209
210 dev_dbg(dev, "max gain = %d\n", r.max_gain);
211
212 control = (struct soc_mixer_control *)
213 dmic_controls[DMIC_CTL_GAIN].private_value;
214 control->max = r.max_gain;
215 control->platform_max = r.max_gain;
216
217 return snd_soc_add_component_controls(component,
218 &dmic_controls[DMIC_CTL_GAIN], 1);
219}
220
221static int i2s_rx_hw_params(struct snd_pcm_substream *substream,
222 struct snd_pcm_hw_params *params,
223 struct snd_soc_dai *dai)
224{
225 struct snd_soc_component *component = dai->component;
226 struct cros_ec_codec_priv *priv =
227 snd_soc_component_get_drvdata(component);
228 struct ec_param_ec_codec_i2s_rx p;
229 enum ec_codec_i2s_rx_sample_depth depth;
230 uint32_t bclk;
231 int ret;
232
233 if (params_rate(params) != 48000)
234 return -EINVAL;
235
236 switch (params_width(params)) {
237 case 16:
238 depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_16;
239 break;
240 case 24:
241 depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_24;
242 break;
243 default:
244 return -EINVAL;
245 }
246
247 dev_dbg(component->dev, "set depth to %u\n", depth);
248
249 p.cmd = EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH;
250 p.set_sample_depth_param.depth = depth;
251 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
252 (uint8_t *)&p, sizeof(p), NULL, 0);
253 if (ret < 0)
254 return ret;
255
256 if (priv->i2s_rx_bclk_ratio)
257 bclk = params_rate(params) * priv->i2s_rx_bclk_ratio;
258 else
259 bclk = snd_soc_params_to_bclk(params);
260
261 dev_dbg(component->dev, "set bclk to %u\n", bclk);
262
263 p.cmd = EC_CODEC_I2S_RX_SET_BCLK;
264 p.set_bclk_param.bclk = bclk;
265 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
266 (uint8_t *)&p, sizeof(p), NULL, 0);
267}
268
269static int i2s_rx_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
270{
271 struct snd_soc_component *component = dai->component;
272 struct cros_ec_codec_priv *priv =
273 snd_soc_component_get_drvdata(component);
274
275 priv->i2s_rx_bclk_ratio = ratio;
276 return 0;
277}
278
279static int i2s_rx_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
280{
281 struct snd_soc_component *component = dai->component;
282 struct cros_ec_codec_priv *priv =
283 snd_soc_component_get_drvdata(component);
284 struct ec_param_ec_codec_i2s_rx p;
285 enum ec_codec_i2s_rx_daifmt daifmt;
286
287 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
288 case SND_SOC_DAIFMT_CBC_CFC:
289 break;
290 default:
291 return -EINVAL;
292 }
293
294 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
295 case SND_SOC_DAIFMT_NB_NF:
296 break;
297 default:
298 return -EINVAL;
299 }
300
301 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
302 case SND_SOC_DAIFMT_I2S:
303 daifmt = EC_CODEC_I2S_RX_DAIFMT_I2S;
304 break;
305 case SND_SOC_DAIFMT_RIGHT_J:
306 daifmt = EC_CODEC_I2S_RX_DAIFMT_RIGHT_J;
307 break;
308 case SND_SOC_DAIFMT_LEFT_J:
309 daifmt = EC_CODEC_I2S_RX_DAIFMT_LEFT_J;
310 break;
311 default:
312 return -EINVAL;
313 }
314
315 dev_dbg(component->dev, "set format to %u\n", daifmt);
316
317 p.cmd = EC_CODEC_I2S_RX_SET_DAIFMT;
318 p.set_daifmt_param.daifmt = daifmt;
319 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
320 (uint8_t *)&p, sizeof(p), NULL, 0);
321}
322
323static const struct snd_soc_dai_ops i2s_rx_dai_ops = {
324 .hw_params = i2s_rx_hw_params,
325 .set_fmt = i2s_rx_set_fmt,
326 .set_bclk_ratio = i2s_rx_set_bclk_ratio,
327};
328
329static int i2s_rx_event(struct snd_soc_dapm_widget *w,
330 struct snd_kcontrol *kcontrol, int event)
331{
332 struct snd_soc_component *component =
333 snd_soc_dapm_to_component(w->dapm);
334 struct cros_ec_codec_priv *priv =
335 snd_soc_component_get_drvdata(component);
336 struct ec_param_ec_codec_i2s_rx p = {};
337
338 switch (event) {
339 case SND_SOC_DAPM_PRE_PMU:
340 dev_dbg(component->dev, "enable I2S RX\n");
341 p.cmd = EC_CODEC_I2S_RX_ENABLE;
342 break;
343 case SND_SOC_DAPM_PRE_PMD:
344 dev_dbg(component->dev, "disable I2S RX\n");
345 p.cmd = EC_CODEC_I2S_RX_DISABLE;
346 break;
347 default:
348 return 0;
349 }
350
351 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
352 (uint8_t *)&p, sizeof(p), NULL, 0);
353}
354
355static struct snd_soc_dapm_widget i2s_rx_dapm_widgets[] = {
356 SND_SOC_DAPM_INPUT("DMIC"),
357 SND_SOC_DAPM_SUPPLY("I2S RX Enable", SND_SOC_NOPM, 0, 0, i2s_rx_event,
358 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
359 SND_SOC_DAPM_AIF_OUT("I2S RX", "I2S Capture", 0, SND_SOC_NOPM, 0, 0),
360};
361
362static struct snd_soc_dapm_route i2s_rx_dapm_routes[] = {
363 {"I2S RX", NULL, "DMIC"},
364 {"I2S RX", NULL, "I2S RX Enable"},
365};
366
367static struct snd_soc_dai_driver i2s_rx_dai_driver = {
368 .name = "EC Codec I2S RX",
369 .capture = {
370 .stream_name = "I2S Capture",
371 .channels_min = 2,
372 .channels_max = 2,
373 .rates = SNDRV_PCM_RATE_48000,
374 .formats = SNDRV_PCM_FMTBIT_S16_LE |
375 SNDRV_PCM_FMTBIT_S24_LE,
376 },
377 .ops = &i2s_rx_dai_ops,
378};
379
380static int i2s_rx_probe(struct snd_soc_component *component)
381{
382 return dmic_probe(component);
383}
384
385static const struct snd_soc_component_driver i2s_rx_component_driver = {
386 .probe = i2s_rx_probe,
387 .dapm_widgets = i2s_rx_dapm_widgets,
388 .num_dapm_widgets = ARRAY_SIZE(i2s_rx_dapm_widgets),
389 .dapm_routes = i2s_rx_dapm_routes,
390 .num_dapm_routes = ARRAY_SIZE(i2s_rx_dapm_routes),
391 .endianness = 1,
392};
393
394static void *wov_map_shm(struct cros_ec_codec_priv *priv,
395 uint8_t shm_id, uint32_t *len, uint8_t *type)
396{
397 struct ec_param_ec_codec p;
398 struct ec_response_ec_codec_get_shm_addr r;
399 uint32_t req, offset;
400
401 p.cmd = EC_CODEC_GET_SHM_ADDR;
402 p.get_shm_addr_param.shm_id = shm_id;
403 if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
404 (uint8_t *)&p, sizeof(p),
405 (uint8_t *)&r, sizeof(r)) < 0) {
406 dev_err(priv->dev, "failed to EC_CODEC_GET_SHM_ADDR\n");
407 return NULL;
408 }
409
410 dev_dbg(priv->dev, "phys_addr=%#llx, len=%#x\n", r.phys_addr, r.len);
411
412 *len = r.len;
413 *type = r.type;
414
415 switch (r.type) {
416 case EC_CODEC_SHM_TYPE_EC_RAM:
417 return (void __force *)devm_ioremap_wc(priv->dev,
418 r.phys_addr + priv->ec_shm_addr, r.len);
419 case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
420 if (r.phys_addr) {
421 dev_err(priv->dev, "unknown status\n");
422 return NULL;
423 }
424
425 req = round_up(r.len, PAGE_SIZE);
426 dev_dbg(priv->dev, "round up from %u to %u\n", r.len, req);
427
428 if (priv->ap_shm_last_alloc + req >
429 priv->ap_shm_phys_addr + priv->ap_shm_len) {
430 dev_err(priv->dev, "insufficient space for AP SHM\n");
431 return NULL;
432 }
433
434 dev_dbg(priv->dev, "alloc AP SHM addr=%#llx, len=%#x\n",
435 priv->ap_shm_last_alloc, req);
436
437 p.cmd = EC_CODEC_SET_SHM_ADDR;
438 p.set_shm_addr_param.phys_addr = priv->ap_shm_last_alloc;
439 p.set_shm_addr_param.len = req;
440 p.set_shm_addr_param.shm_id = shm_id;
441 if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
442 (uint8_t *)&p, sizeof(p),
443 NULL, 0) < 0) {
444 dev_err(priv->dev, "failed to EC_CODEC_SET_SHM_ADDR\n");
445 return NULL;
446 }
447
448 /*
449 * Note: EC codec only requests for `r.len' but we allocate
450 * round up PAGE_SIZE `req'.
451 */
452 offset = priv->ap_shm_last_alloc - priv->ap_shm_phys_addr;
453 priv->ap_shm_last_alloc += req;
454
455 return (void *)(uintptr_t)(priv->ap_shm_addr + offset);
456 default:
457 return NULL;
458 }
459}
460
461static bool wov_queue_full(struct cros_ec_codec_priv *priv)
462{
463 return ((priv->wov_wp + 1) % sizeof(priv->wov_buf)) == priv->wov_rp;
464}
465
466static size_t wov_queue_size(struct cros_ec_codec_priv *priv)
467{
468 if (priv->wov_wp >= priv->wov_rp)
469 return priv->wov_wp - priv->wov_rp;
470 else
471 return sizeof(priv->wov_buf) - priv->wov_rp + priv->wov_wp;
472}
473
474static void wov_queue_dequeue(struct cros_ec_codec_priv *priv, size_t len)
475{
476 struct snd_pcm_runtime *runtime = priv->wov_substream->runtime;
477 size_t req;
478
479 while (len) {
480 req = min(len, runtime->dma_bytes - priv->wov_dma_offset);
481 if (priv->wov_wp >= priv->wov_rp)
482 req = min(req, (size_t)priv->wov_wp - priv->wov_rp);
483 else
484 req = min(req, sizeof(priv->wov_buf) - priv->wov_rp);
485
486 memcpy(runtime->dma_area + priv->wov_dma_offset,
487 priv->wov_buf + priv->wov_rp, req);
488
489 priv->wov_dma_offset += req;
490 if (priv->wov_dma_offset == runtime->dma_bytes)
491 priv->wov_dma_offset = 0;
492
493 priv->wov_rp += req;
494 if (priv->wov_rp == sizeof(priv->wov_buf))
495 priv->wov_rp = 0;
496
497 len -= req;
498 }
499
500 snd_pcm_period_elapsed(priv->wov_substream);
501}
502
503static void wov_queue_try_dequeue(struct cros_ec_codec_priv *priv)
504{
505 size_t period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
506
507 while (period_bytes && wov_queue_size(priv) >= period_bytes) {
508 wov_queue_dequeue(priv, period_bytes);
509 period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
510 }
511}
512
513static void wov_queue_enqueue(struct cros_ec_codec_priv *priv,
514 uint8_t *addr, size_t len, bool iomem)
515{
516 size_t req;
517
518 while (len) {
519 if (wov_queue_full(priv)) {
520 wov_queue_try_dequeue(priv);
521
522 if (wov_queue_full(priv)) {
523 dev_err(priv->dev, "overrun detected\n");
524 return;
525 }
526 }
527
528 if (priv->wov_wp >= priv->wov_rp)
529 req = sizeof(priv->wov_buf) - priv->wov_wp;
530 else
531 /* Note: waste 1-byte to differentiate full and empty */
532 req = priv->wov_rp - priv->wov_wp - 1;
533 req = min(req, len);
534
535 if (iomem)
536 memcpy_fromio(priv->wov_buf + priv->wov_wp,
537 (void __force __iomem *)addr, req);
538 else
539 memcpy(priv->wov_buf + priv->wov_wp, addr, req);
540
541 priv->wov_wp += req;
542 if (priv->wov_wp == sizeof(priv->wov_buf))
543 priv->wov_wp = 0;
544
545 addr += req;
546 len -= req;
547 }
548
549 wov_queue_try_dequeue(priv);
550}
551
552static int wov_read_audio_shm(struct cros_ec_codec_priv *priv)
553{
554 struct ec_param_ec_codec_wov p;
555 struct ec_response_ec_codec_wov_read_audio_shm r;
556 int ret;
557
558 p.cmd = EC_CODEC_WOV_READ_AUDIO_SHM;
559 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
560 (uint8_t *)&p, sizeof(p),
561 (uint8_t *)&r, sizeof(r));
562 if (ret) {
563 dev_err(priv->dev, "failed to EC_CODEC_WOV_READ_AUDIO_SHM\n");
564 return ret;
565 }
566
567 if (!r.len)
568 dev_dbg(priv->dev, "no data, sleep\n");
569 else
570 wov_queue_enqueue(priv, priv->wov_audio_shm_p + r.offset, r.len,
571 priv->wov_audio_shm_type == EC_CODEC_SHM_TYPE_EC_RAM);
572 return -EAGAIN;
573}
574
575static int wov_read_audio(struct cros_ec_codec_priv *priv)
576{
577 struct ec_param_ec_codec_wov p;
578 struct ec_response_ec_codec_wov_read_audio r;
579 int remain = priv->wov_burst_read ? 16000 : 320;
580 int ret;
581
582 while (remain >= 0) {
583 p.cmd = EC_CODEC_WOV_READ_AUDIO;
584 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
585 (uint8_t *)&p, sizeof(p),
586 (uint8_t *)&r, sizeof(r));
587 if (ret) {
588 dev_err(priv->dev,
589 "failed to EC_CODEC_WOV_READ_AUDIO\n");
590 return ret;
591 }
592
593 if (!r.len) {
594 dev_dbg(priv->dev, "no data, sleep\n");
595 priv->wov_burst_read = false;
596 break;
597 }
598
599 wov_queue_enqueue(priv, r.buf, r.len, false);
600 remain -= r.len;
601 }
602
603 return -EAGAIN;
604}
605
606static void wov_copy_work(struct work_struct *w)
607{
608 struct cros_ec_codec_priv *priv =
609 container_of(w, struct cros_ec_codec_priv, wov_copy_work.work);
610 int ret;
611
612 mutex_lock(&priv->wov_dma_lock);
613 if (!priv->wov_substream) {
614 dev_warn(priv->dev, "no pcm substream\n");
615 goto leave;
616 }
617
618 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM))
619 ret = wov_read_audio_shm(priv);
620 else
621 ret = wov_read_audio(priv);
622
623 if (ret == -EAGAIN)
624 schedule_delayed_work(&priv->wov_copy_work,
625 msecs_to_jiffies(10));
626 else if (ret)
627 dev_err(priv->dev, "failed to read audio data\n");
628leave:
629 mutex_unlock(&priv->wov_dma_lock);
630}
631
632static int wov_enable_get(struct snd_kcontrol *kcontrol,
633 struct snd_ctl_elem_value *ucontrol)
634{
635 struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
636 struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
637
638 ucontrol->value.integer.value[0] = priv->wov_enabled;
639 return 0;
640}
641
642static int wov_enable_put(struct snd_kcontrol *kcontrol,
643 struct snd_ctl_elem_value *ucontrol)
644{
645 struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
646 struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
647 int enabled = ucontrol->value.integer.value[0];
648 struct ec_param_ec_codec_wov p;
649 int ret;
650
651 if (priv->wov_enabled != enabled) {
652 if (enabled)
653 p.cmd = EC_CODEC_WOV_ENABLE;
654 else
655 p.cmd = EC_CODEC_WOV_DISABLE;
656
657 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
658 (uint8_t *)&p, sizeof(p), NULL, 0);
659 if (ret) {
660 dev_err(priv->dev, "failed to %s wov\n",
661 str_enable_disable(enabled));
662 return ret;
663 }
664
665 priv->wov_enabled = enabled;
666 }
667
668 return 0;
669}
670
671static int wov_set_lang_shm(struct cros_ec_codec_priv *priv,
672 uint8_t *buf, size_t size, uint8_t *digest)
673{
674 struct ec_param_ec_codec_wov p;
675 struct ec_param_ec_codec_wov_set_lang_shm *pp = &p.set_lang_shm_param;
676 int ret;
677
678 if (size > priv->wov_lang_shm_len) {
679 dev_err(priv->dev, "no enough SHM size: %d\n",
680 priv->wov_lang_shm_len);
681 return -EIO;
682 }
683
684 switch (priv->wov_lang_shm_type) {
685 case EC_CODEC_SHM_TYPE_EC_RAM:
686 memcpy_toio((void __force __iomem *)priv->wov_lang_shm_p,
687 buf, size);
688 memset_io((void __force __iomem *)priv->wov_lang_shm_p + size,
689 0, priv->wov_lang_shm_len - size);
690 break;
691 case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
692 memcpy(priv->wov_lang_shm_p, buf, size);
693 memset(priv->wov_lang_shm_p + size, 0,
694 priv->wov_lang_shm_len - size);
695
696 /* make sure write to memory before calling host command */
697 wmb();
698 break;
699 }
700
701 p.cmd = EC_CODEC_WOV_SET_LANG_SHM;
702 memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
703 pp->total_len = size;
704 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
705 (uint8_t *)&p, sizeof(p), NULL, 0);
706 if (ret) {
707 dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG_SHM\n");
708 return ret;
709 }
710
711 return 0;
712}
713
714static int wov_set_lang(struct cros_ec_codec_priv *priv,
715 uint8_t *buf, size_t size, uint8_t *digest)
716{
717 struct ec_param_ec_codec_wov p;
718 struct ec_param_ec_codec_wov_set_lang *pp = &p.set_lang_param;
719 size_t i, req;
720 int ret;
721
722 for (i = 0; i < size; i += req) {
723 req = min(size - i, ARRAY_SIZE(pp->buf));
724
725 p.cmd = EC_CODEC_WOV_SET_LANG;
726 memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
727 pp->total_len = size;
728 pp->offset = i;
729 memcpy(pp->buf, buf + i, req);
730 pp->len = req;
731 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
732 (uint8_t *)&p, sizeof(p), NULL, 0);
733 if (ret) {
734 dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG\n");
735 return ret;
736 }
737 }
738
739 return 0;
740}
741
742static int wov_hotword_model_put(struct snd_kcontrol *kcontrol,
743 const unsigned int __user *bytes,
744 unsigned int size)
745{
746 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
747 struct cros_ec_codec_priv *priv =
748 snd_soc_component_get_drvdata(component);
749 struct ec_param_ec_codec_wov p;
750 struct ec_response_ec_codec_wov_get_lang r;
751 uint8_t digest[SHA256_DIGEST_SIZE];
752 uint8_t *buf;
753 int ret;
754
755 /* Skips the TLV header. */
756 bytes += 2;
757 size -= 8;
758
759 dev_dbg(priv->dev, "%s: size=%d\n", __func__, size);
760
761 buf = memdup_user(bytes, size);
762 if (IS_ERR(buf))
763 return PTR_ERR(buf);
764
765 sha256(buf, size, digest);
766 dev_dbg(priv->dev, "hash=%*phN\n", SHA256_DIGEST_SIZE, digest);
767
768 p.cmd = EC_CODEC_WOV_GET_LANG;
769 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
770 (uint8_t *)&p, sizeof(p),
771 (uint8_t *)&r, sizeof(r));
772 if (ret)
773 goto leave;
774
775 if (memcmp(digest, r.hash, SHA256_DIGEST_SIZE) == 0) {
776 dev_dbg(priv->dev, "not updated");
777 goto leave;
778 }
779
780 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM))
781 ret = wov_set_lang_shm(priv, buf, size, digest);
782 else
783 ret = wov_set_lang(priv, buf, size, digest);
784
785leave:
786 kfree(buf);
787 return ret;
788}
789
790static struct snd_kcontrol_new wov_controls[] = {
791 SOC_SINGLE_BOOL_EXT("Wake-on-Voice Switch", 0,
792 wov_enable_get, wov_enable_put),
793 SND_SOC_BYTES_TLV("Hotword Model", 0x11000, NULL,
794 wov_hotword_model_put),
795};
796
797static struct snd_soc_dai_driver wov_dai_driver = {
798 .name = "Wake on Voice",
799 .capture = {
800 .stream_name = "WoV Capture",
801 .channels_min = 1,
802 .channels_max = 1,
803 .rates = SNDRV_PCM_RATE_16000,
804 .formats = SNDRV_PCM_FMTBIT_S16_LE,
805 },
806};
807
808static int wov_host_event(struct notifier_block *nb,
809 unsigned long queued_during_suspend, void *notify)
810{
811 struct cros_ec_codec_priv *priv =
812 container_of(nb, struct cros_ec_codec_priv, wov_notifier);
813 u32 host_event;
814
815 dev_dbg(priv->dev, "%s\n", __func__);
816
817 host_event = cros_ec_get_host_event(priv->ec_device);
818 if (host_event & EC_HOST_EVENT_MASK(EC_HOST_EVENT_WOV)) {
819 schedule_delayed_work(&priv->wov_copy_work, 0);
820 return NOTIFY_OK;
821 } else {
822 return NOTIFY_DONE;
823 }
824}
825
826static int wov_probe(struct snd_soc_component *component)
827{
828 struct cros_ec_codec_priv *priv =
829 snd_soc_component_get_drvdata(component);
830 int ret;
831
832 mutex_init(&priv->wov_dma_lock);
833 INIT_DELAYED_WORK(&priv->wov_copy_work, wov_copy_work);
834
835 priv->wov_notifier.notifier_call = wov_host_event;
836 ret = blocking_notifier_chain_register(
837 &priv->ec_device->event_notifier, &priv->wov_notifier);
838 if (ret)
839 return ret;
840
841 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM)) {
842 priv->wov_lang_shm_p = wov_map_shm(priv,
843 EC_CODEC_SHM_ID_WOV_LANG,
844 &priv->wov_lang_shm_len,
845 &priv->wov_lang_shm_type);
846 if (!priv->wov_lang_shm_p)
847 return -EFAULT;
848 }
849
850 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM)) {
851 priv->wov_audio_shm_p = wov_map_shm(priv,
852 EC_CODEC_SHM_ID_WOV_AUDIO,
853 &priv->wov_audio_shm_len,
854 &priv->wov_audio_shm_type);
855 if (!priv->wov_audio_shm_p)
856 return -EFAULT;
857 }
858
859 return dmic_probe(component);
860}
861
862static void wov_remove(struct snd_soc_component *component)
863{
864 struct cros_ec_codec_priv *priv =
865 snd_soc_component_get_drvdata(component);
866
867 blocking_notifier_chain_unregister(
868 &priv->ec_device->event_notifier, &priv->wov_notifier);
869}
870
871static int wov_pcm_open(struct snd_soc_component *component,
872 struct snd_pcm_substream *substream)
873{
874 static const struct snd_pcm_hardware hw_param = {
875 .info = SNDRV_PCM_INFO_MMAP |
876 SNDRV_PCM_INFO_INTERLEAVED |
877 SNDRV_PCM_INFO_MMAP_VALID,
878 .formats = SNDRV_PCM_FMTBIT_S16_LE,
879 .rates = SNDRV_PCM_RATE_16000,
880 .channels_min = 1,
881 .channels_max = 1,
882 .period_bytes_min = PAGE_SIZE,
883 .period_bytes_max = 0x20000 / 8,
884 .periods_min = 8,
885 .periods_max = 8,
886 .buffer_bytes_max = 0x20000,
887 };
888
889 return snd_soc_set_runtime_hwparams(substream, &hw_param);
890}
891
892static int wov_pcm_hw_params(struct snd_soc_component *component,
893 struct snd_pcm_substream *substream,
894 struct snd_pcm_hw_params *hw_params)
895{
896 struct cros_ec_codec_priv *priv =
897 snd_soc_component_get_drvdata(component);
898
899 mutex_lock(&priv->wov_dma_lock);
900 priv->wov_substream = substream;
901 priv->wov_rp = priv->wov_wp = 0;
902 priv->wov_dma_offset = 0;
903 priv->wov_burst_read = true;
904 mutex_unlock(&priv->wov_dma_lock);
905
906 return 0;
907}
908
909static int wov_pcm_hw_free(struct snd_soc_component *component,
910 struct snd_pcm_substream *substream)
911{
912 struct cros_ec_codec_priv *priv =
913 snd_soc_component_get_drvdata(component);
914
915 mutex_lock(&priv->wov_dma_lock);
916 wov_queue_dequeue(priv, wov_queue_size(priv));
917 priv->wov_substream = NULL;
918 mutex_unlock(&priv->wov_dma_lock);
919
920 cancel_delayed_work_sync(&priv->wov_copy_work);
921
922 return 0;
923}
924
925static snd_pcm_uframes_t wov_pcm_pointer(struct snd_soc_component *component,
926 struct snd_pcm_substream *substream)
927{
928 struct snd_pcm_runtime *runtime = substream->runtime;
929 struct cros_ec_codec_priv *priv =
930 snd_soc_component_get_drvdata(component);
931
932 return bytes_to_frames(runtime, priv->wov_dma_offset);
933}
934
935static int wov_pcm_new(struct snd_soc_component *component,
936 struct snd_soc_pcm_runtime *rtd)
937{
938 snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_VMALLOC,
939 NULL, 0, 0);
940 return 0;
941}
942
943static const struct snd_soc_component_driver wov_component_driver = {
944 .probe = wov_probe,
945 .remove = wov_remove,
946 .controls = wov_controls,
947 .num_controls = ARRAY_SIZE(wov_controls),
948 .open = wov_pcm_open,
949 .hw_params = wov_pcm_hw_params,
950 .hw_free = wov_pcm_hw_free,
951 .pointer = wov_pcm_pointer,
952 .pcm_construct = wov_pcm_new,
953};
954
955static int cros_ec_codec_platform_probe(struct platform_device *pdev)
956{
957 struct device *dev = &pdev->dev;
958 struct cros_ec_device *ec_device = dev_get_drvdata(pdev->dev.parent);
959 struct cros_ec_codec_priv *priv;
960 struct ec_param_ec_codec p;
961 struct ec_response_ec_codec_get_capabilities r;
962 int ret;
963#ifdef CONFIG_OF
964 struct device_node *node;
965 struct resource res;
966 u64 ec_shm_size;
967 const __be32 *regaddr_p;
968#endif
969
970 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
971 if (!priv)
972 return -ENOMEM;
973
974#ifdef CONFIG_OF
975 regaddr_p = of_get_address(dev->of_node, 0, &ec_shm_size, NULL);
976 if (regaddr_p) {
977 priv->ec_shm_addr = of_read_number(regaddr_p, 2);
978 priv->ec_shm_len = ec_shm_size;
979
980 dev_dbg(dev, "ec_shm_addr=%#llx len=%#x\n",
981 priv->ec_shm_addr, priv->ec_shm_len);
982 }
983
984 node = of_parse_phandle(dev->of_node, "memory-region", 0);
985 if (node) {
986 ret = of_address_to_resource(node, 0, &res);
987 if (!ret) {
988 priv->ap_shm_phys_addr = res.start;
989 priv->ap_shm_len = resource_size(&res);
990 priv->ap_shm_addr =
991 (uint64_t)(uintptr_t)devm_ioremap_wc(
992 dev, priv->ap_shm_phys_addr,
993 priv->ap_shm_len);
994 priv->ap_shm_last_alloc = priv->ap_shm_phys_addr;
995
996 dev_dbg(dev, "ap_shm_phys_addr=%#llx len=%#x\n",
997 priv->ap_shm_phys_addr, priv->ap_shm_len);
998 }
999 of_node_put(node);
1000 }
1001#endif
1002
1003 priv->dev = dev;
1004 priv->ec_device = ec_device;
1005 atomic_set(&priv->dmic_probed, 0);
1006
1007 p.cmd = EC_CODEC_GET_CAPABILITIES;
1008 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
1009 (uint8_t *)&p, sizeof(p),
1010 (uint8_t *)&r, sizeof(r));
1011 if (ret) {
1012 dev_err(dev, "failed to EC_CODEC_GET_CAPABILITIES\n");
1013 return ret;
1014 }
1015 priv->ec_capabilities = r.capabilities;
1016
1017 /* Reset EC codec i2s rx. */
1018 p.cmd = EC_CODEC_I2S_RX_RESET;
1019 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
1020 (uint8_t *)&p, sizeof(p), NULL, 0);
1021 if (ret == -ENOPROTOOPT) {
1022 dev_info(dev,
1023 "Missing reset command. Please update EC firmware.\n");
1024 } else if (ret) {
1025 dev_err(dev, "failed to EC_CODEC_I2S_RESET: %d\n", ret);
1026 return ret;
1027 }
1028
1029 platform_set_drvdata(pdev, priv);
1030
1031 ret = devm_snd_soc_register_component(dev, &i2s_rx_component_driver,
1032 &i2s_rx_dai_driver, 1);
1033 if (ret)
1034 return ret;
1035
1036 return devm_snd_soc_register_component(dev, &wov_component_driver,
1037 &wov_dai_driver, 1);
1038}
1039
1040#ifdef CONFIG_OF
1041static const struct of_device_id cros_ec_codec_of_match[] = {
1042 { .compatible = "google,cros-ec-codec" },
1043 {},
1044};
1045MODULE_DEVICE_TABLE(of, cros_ec_codec_of_match);
1046#endif
1047
1048#ifdef CONFIG_ACPI
1049static const struct acpi_device_id cros_ec_codec_acpi_id[] = {
1050 { "GOOG0013", 0 },
1051 { }
1052};
1053MODULE_DEVICE_TABLE(acpi, cros_ec_codec_acpi_id);
1054#endif
1055
1056static struct platform_driver cros_ec_codec_platform_driver = {
1057 .driver = {
1058 .name = "cros-ec-codec",
1059 .of_match_table = of_match_ptr(cros_ec_codec_of_match),
1060 .acpi_match_table = ACPI_PTR(cros_ec_codec_acpi_id),
1061 },
1062 .probe = cros_ec_codec_platform_probe,
1063};
1064
1065module_platform_driver(cros_ec_codec_platform_driver);
1066
1067MODULE_LICENSE("GPL v2");
1068MODULE_DESCRIPTION("ChromeOS EC codec driver");
1069MODULE_AUTHOR("Cheng-Yi Chiang <cychiang@chromium.org>");
1070MODULE_ALIAS("platform:cros-ec-codec");
Linux 6.x block layer and io_uring tree(s)