[linux-block.git] / scripts / Makefile.build

# ==========================================================================
# Building
# ==========================================================================

src := $(obj)

PHONY := __build
__build:

# Init all relevant variables used in kbuild files so
# 1) they have correct type
# 2) they do not inherit any value from the environment
obj-y :=
obj-m :=
lib-y :=
lib-m :=
always :=
targets :=
subdir-y :=
subdir-m :=
EXTRA_AFLAGS   :=
EXTRA_CFLAGS   :=
EXTRA_CPPFLAGS :=
EXTRA_LDFLAGS  :=
asflags-y  :=
ccflags-y  :=
cppflags-y :=
ldflags-y  :=

subdir-asflags-y :=
subdir-ccflags-y :=

# Read auto.conf if it exists, otherwise ignore
-include include/config/auto.conf

include scripts/Kbuild.include

# For backward compatibility check that these variables do not change
save-cflags := $(CFLAGS)

# The filename Kbuild has precedence over Makefile
kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
include $(kbuild-file)

# If the save-* variables changed error out
ifeq ($(KBUILD_NOPEDANTIC),)
        ifneq ("$(save-cflags)","$(CFLAGS)")
                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
        endif
endif

include scripts/Makefile.lib

ifdef host-progs
ifneq ($(hostprogs-y),$(host-progs))
$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
hostprogs-y += $(host-progs)
endif
endif

# Do not include host rules unless needed
ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
include scripts/Makefile.host
endif

ifneq ($(KBUILD_SRC),)
# Create output directory if not already present
_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))

# Create directories for object files if directory does not exist
# Needed when obj-y := dir/file.o syntax is used
_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
endif

ifndef obj
$(warning kbuild: Makefile.build is included improperly)
endif

# ===========================================================================

ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
lib-target := $(obj)/lib.a
endif

ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
builtin-target := $(obj)/built-in.o
endif

modorder-target := $(obj)/modules.order

# We keep a list of all modules in $(MODVERDIR)

__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
	 $(subdir-ym) $(always)
	@:

# Linus' kernel sanity checking tool
ifneq ($(KBUILD_CHECKSRC),0)
  ifeq ($(KBUILD_CHECKSRC),2)
    quiet_cmd_force_checksrc = CHECK   $<
          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  else
      quiet_cmd_checksrc     = CHECK   $<
            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  endif
endif

# Do section mismatch analysis for each module/built-in.o
ifdef CONFIG_DEBUG_SECTION_MISMATCH
  cmd_secanalysis = ; scripts/mod/modpost $@
endif

# Compile C sources (.c)
# ---------------------------------------------------------------------------

# Default is built-in, unless we know otherwise
modkern_cflags =                                          \
	$(if $(part-of-module),                           \
		$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
		$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
quiet_modtag := $(empty)   $(empty)

$(real-objs-m)        : part-of-module := y
$(real-objs-m:.o=.i)  : part-of-module := y
$(real-objs-m:.o=.s)  : part-of-module := y
$(real-objs-m:.o=.lst): part-of-module := y

$(real-objs-m)        : quiet_modtag := [M]
$(real-objs-m:.o=.i)  : quiet_modtag := [M]
$(real-objs-m:.o=.s)  : quiet_modtag := [M]
$(real-objs-m:.o=.lst): quiet_modtag := [M]

$(obj-m)              : quiet_modtag := [M]

# Default for not multi-part modules
modname = $(basetarget)

$(multi-objs-m)         : modname = $(modname-multi)
$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
$(multi-objs-y)         : modname = $(modname-multi)
$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
$(multi-objs-y:.o=.lst) : modname = $(modname-multi)

quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
cmd_cc_s_c       = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<

$(obj)/%.s: $(src)/%.c FORCE
	$(call if_changed_dep,cc_s_c)

quiet_cmd_cpp_i_c = CPP $(quiet_modtag) $@
cmd_cpp_i_c       = $(CPP) $(c_flags) -o $@ $<

$(obj)/%.i: $(src)/%.c FORCE
	$(call if_changed_dep,cpp_i_c)

cmd_gensymtypes =                                                           \
    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
    $(GENKSYMS) $(if $(1), -T $(2))                                         \
     $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX))             \
     $(if $(KBUILD_PRESERVE),-p)                                            \
     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))

quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
cmd_cc_symtypes_c =                                                         \
    set -e;                                                                 \
    $(call cmd_gensymtypes,true,$@) >/dev/null;                             \
    test -s $@ || rm -f $@

$(obj)/%.symtypes : $(src)/%.c FORCE
	$(call cmd,cc_symtypes_c)

# C (.c) files
# The C file is compiled and updated dependency information is generated.
# (See cmd_cc_o_c + relevant part of rule_cc_o_c)

quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@

ifndef CONFIG_MODVERSIONS
cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<

else
# When module versioning is enabled the following steps are executed:
# o compile a .tmp_<file>.o from <file>.c
# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
#   are done.
# o otherwise, we calculate symbol versions using the good old
#   genksyms on the preprocessed source and postprocess them in a way
#   that they are usable as a linker script
# o generate <file>.o from .tmp_<file>.o using the linker to
#   replace the unresolved symbols __crc_exported_symbol with
#   the actual value of the checksum generated by genksyms

cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
cmd_modversions =								\
	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then		\
		$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))	\
		    > $(@D)/.tmp_$(@F:.o=.ver);					\
										\
		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 			\
			-T $(@D)/.tmp_$(@F:.o=.ver);				\
		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);		\
	else									\
		mv -f $(@D)/.tmp_$(@F) $@;					\
	fi;
endif

ifdef CONFIG_FTRACE_MCOUNT_RECORD
ifdef BUILD_C_RECORDMCOUNT
ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  RECORDMCOUNT_FLAGS = -w
endif
# Due to recursion, we must skip empty.o.
# The empty.o file is created in the make process in order to determine
#  the target endianness and word size. It is made before all other C
#  files, including recordmcount.
sub_cmd_record_mcount =					\
	if [ $(@) != "scripts/mod/empty.o" ]; then	\
		$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)";	\
	fi;
recordmcount_source := $(srctree)/scripts/recordmcount.c \
		    $(srctree)/scripts/recordmcount.h
else
sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
	"$(if $(CONFIG_64BIT),64,32)" \
	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
	"$(if $(part-of-module),1,0)" "$(@)";
recordmcount_source := $(srctree)/scripts/recordmcount.pl
endif
cmd_record_mcount =						\
	if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" =	\
	     "$(CC_FLAGS_FTRACE)" ]; then			\
		$(sub_cmd_record_mcount)			\
	fi;
endif

ifdef CONFIG_STACK_VALIDATION
ifneq ($(SKIP_STACK_VALIDATION),1)

__objtool_obj := $(objtree)/tools/objtool/objtool

objtool_args = check
ifndef CONFIG_FRAME_POINTER
objtool_args += --no-fp
endif

# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
cmd_objtool = $(if $(patsubst y%,, \
	$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
	$(__objtool_obj) $(objtool_args) "$(@)";)
objtool_obj = $(if $(patsubst y%,, \
	$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
	$(__objtool_obj))

endif # SKIP_STACK_VALIDATION
endif # CONFIG_STACK_VALIDATION

define rule_cc_o_c
	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
	$(call cmd_and_fixdep,cc_o_c)					  \
	$(cmd_modversions)						  \
	$(cmd_objtool)						          \
	$(call echo-cmd,record_mcount) $(cmd_record_mcount)
endef

define rule_as_o_S
	$(call cmd_and_fixdep,as_o_S)					  \
	$(cmd_objtool)
endef

# List module undefined symbols (or empty line if not enabled)
ifdef CONFIG_TRIM_UNUSED_KSYMS
cmd_undef_syms = $(NM) $@ | sed -n 's/^ \+U //p' | xargs echo
else
cmd_undef_syms = echo
endif

# Built-in and composite module parts
$(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)

# Single-part modules are special since we need to mark them in $(MODVERDIR)

$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)
	@{ echo $(@:.o=.ko); echo $@; \
	   $(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod)

quiet_cmd_cc_lst_c = MKLST   $@
      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
				     System.map $(OBJDUMP) > $@

$(obj)/%.lst: $(src)/%.c FORCE
	$(call if_changed_dep,cc_lst_c)

# Compile assembler sources (.S)
# ---------------------------------------------------------------------------

modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)

$(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)

quiet_cmd_cpp_s_S = CPP $(quiet_modtag) $@
cmd_cpp_s_S       = $(CPP) $(a_flags) -o $@ $<

$(obj)/%.s: $(src)/%.S FORCE
	$(call if_changed_dep,cpp_s_S)

quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<

$(obj)/%.o: $(src)/%.S $(objtool_obj) FORCE
	$(call if_changed_rule,as_o_S)

targets += $(real-objs-y) $(real-objs-m) $(lib-y)
targets += $(extra-y) $(MAKECMDGOALS) $(always)

# Linker scripts preprocessor (.lds.S -> .lds)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds_S = LDS     $@
      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<

$(obj)/%.lds: $(src)/%.lds.S FORCE
	$(call if_changed_dep,cpp_lds_S)

# ASN.1 grammar
# ---------------------------------------------------------------------------
quiet_cmd_asn1_compiler = ASN.1   $@
      cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
				$(subst .h,.c,$@) $(subst .c,.h,$@)

.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h

$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
	$(call cmd,asn1_compiler)

# Build the compiled-in targets
# ---------------------------------------------------------------------------

# To build objects in subdirs, we need to descend into the directories
$(sort $(subdir-obj-y)): $(subdir-ym) ;

#
# Rule to compile a set of .o files into one .o file
#
ifdef builtin-target
quiet_cmd_link_o_target = LD      $@
# If the list of objects to link is empty, just create an empty built-in.o
cmd_link_o_target = $(if $(strip $(obj-y)),\
		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
		      $(cmd_secanalysis),\
		      rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)

$(builtin-target): $(obj-y) FORCE
	$(call if_changed,link_o_target)

targets += $(builtin-target)
endif # builtin-target

#
# Rule to create modules.order file
#
# Create commands to either record .ko file or cat modules.order from
# a subdirectory
modorder-cmds =						\
	$(foreach m, $(modorder),			\
		$(if $(filter %/modules.order, $m),	\
			cat $m;, echo kernel/$m;))

$(modorder-target): $(subdir-ym) FORCE
	$(Q)(cat /dev/null; $(modorder-cmds)) > $@

#
# Rule to compile a set of .o files into one .a file
#
ifdef lib-target
quiet_cmd_link_l_target = AR      $@
cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)

$(lib-target): $(lib-y) FORCE
	$(call if_changed,link_l_target)

targets += $(lib-target)
endif

#
# Rule to link composite objects
#
#  Composite objects are specified in kbuild makefile as follows:
#    <composite-object>-objs := <list of .o files>
#  or
#    <composite-object>-y    := <list of .o files>
#  or
#    <composite-object>-m    := <list of .o files>
#  The -m syntax only works if <composite object> is a module
link_multi_deps =                     \
$(filter $(addprefix $(obj)/,         \
$($(subst $(obj)/,,$(@:.o=-objs)))    \
$($(subst $(obj)/,,$(@:.o=-y)))       \
$($(subst $(obj)/,,$(@:.o=-m)))), $^)

quiet_cmd_link_multi-y = LD      $@
cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)

quiet_cmd_link_multi-m = LD [M]  $@
cmd_link_multi-m = $(cmd_link_multi-y)

$(multi-used-y): FORCE
	$(call if_changed,link_multi-y)
$(call multi_depend, $(multi-used-y), .o, -objs -y)

$(multi-used-m): FORCE
	$(call if_changed,link_multi-m)
	@{ echo $(@:.o=.ko); echo $(link_multi_deps); \
	   $(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod)
$(call multi_depend, $(multi-used-m), .o, -objs -y -m)

targets += $(multi-used-y) $(multi-used-m)


# Descending
# ---------------------------------------------------------------------------

PHONY += $(subdir-ym)
$(subdir-ym):
	$(Q)$(MAKE) $(build)=$@

# Add FORCE to the prequisites of a target to force it to be always rebuilt.
# ---------------------------------------------------------------------------

PHONY += FORCE

FORCE:

# Read all saved command lines and dependencies for the $(targets) we
# may be building above, using $(if_changed{,_dep}). As an
# optimization, we don't need to read them if the target does not
# exist, we will rebuild anyway in that case.

targets := $(wildcard $(sort $(targets)))
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))

ifneq ($(cmd_files),)
  include $(cmd_files)
endif

# Declare the contents of the .PHONY variable as phony.  We keep that
# information in a variable se we can use it in if_changed and friends.

.PHONY: $(PHONY)
Commit	Line	Data
	1	# ==========================================================================
	2	# Building
	3	# ==========================================================================
	4
	5	src := $(obj)
	6
	7	PHONY := __build
	8	__build:
	9
	10	# Init all relevant variables used in kbuild files so
	11	# 1) they have correct type
	12	# 2) they do not inherit any value from the environment
	13	obj-y :=
	14	obj-m :=
	15	lib-y :=
	16	lib-m :=
	17	always :=
	18	targets :=
	19	subdir-y :=
	20	subdir-m :=
	21	EXTRA_AFLAGS :=
	22	EXTRA_CFLAGS :=
	23	EXTRA_CPPFLAGS :=
	24	EXTRA_LDFLAGS :=
	25	asflags-y :=
	26	ccflags-y :=
	27	cppflags-y :=
	28	ldflags-y :=
	29
	30	subdir-asflags-y :=
	31	subdir-ccflags-y :=
	32
	33	# Read auto.conf if it exists, otherwise ignore
	34	-include include/config/auto.conf
	35
	36	include scripts/Kbuild.include
	37
	38	# For backward compatibility check that these variables do not change
	39	save-cflags := $(CFLAGS)
	40
	41	# The filename Kbuild has precedence over Makefile
	42	kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
	43	kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
	44	include $(kbuild-file)
	45
	46	# If the save-* variables changed error out
	47	ifeq ($(KBUILD_NOPEDANTIC),)
	48	ifneq ("$(save-cflags)","$(CFLAGS)")
	49	$(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
	50	endif
	51	endif
	52
	53	include scripts/Makefile.lib
	54
	55	ifdef host-progs
	56	ifneq ($(hostprogs-y),$(host-progs))
	57	$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
	58	hostprogs-y += $(host-progs)
	59	endif
	60	endif
	61
	62	# Do not include host rules unless needed
	63	ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
	64	include scripts/Makefile.host
	65	endif
	66
	67	ifneq ($(KBUILD_SRC),)
	68	# Create output directory if not already present
	69	_dummy := $(shell [ -d $(obj) ] \|\| mkdir -p $(obj))
	70
	71	# Create directories for object files if directory does not exist
	72	# Needed when obj-y := dir/file.o syntax is used
	73	_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] \|\| mkdir -p $(d)))
	74	endif
	75
	76	ifndef obj
	77	$(warning kbuild: Makefile.build is included improperly)
	78	endif
	79
	80	# ===========================================================================
	81
	82	ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
	83	lib-target := $(obj)/lib.a
	84	endif
	85
	86	ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
	87	builtin-target := $(obj)/built-in.o
	88	endif
	89
	90	modorder-target := $(obj)/modules.order
	91
	92	# We keep a list of all modules in $(MODVERDIR)
	93
	94	__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
	95	$(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
	96	$(subdir-ym) $(always)
	97	@:
	98
	99	# Linus' kernel sanity checking tool
	100	ifneq ($(KBUILD_CHECKSRC),0)
	101	ifeq ($(KBUILD_CHECKSRC),2)
	102	quiet_cmd_force_checksrc = CHECK $<
	103	cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
	104	else
	105	quiet_cmd_checksrc = CHECK $<
	106	cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
	107	endif
	108	endif
	109
	110	# Do section mismatch analysis for each module/built-in.o
	111	ifdef CONFIG_DEBUG_SECTION_MISMATCH
	112	cmd_secanalysis = ; scripts/mod/modpost $@
	113	endif
	114
	115	# Compile C sources (.c)
	116	# ---------------------------------------------------------------------------
	117
	118	# Default is built-in, unless we know otherwise
	119	modkern_cflags = \
	120	$(if $(part-of-module), \
	121	$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
	122	$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
	123	quiet_modtag := $(empty) $(empty)
	124
	125	$(real-objs-m) : part-of-module := y
	126	$(real-objs-m:.o=.i) : part-of-module := y
	127	$(real-objs-m:.o=.s) : part-of-module := y
	128	$(real-objs-m:.o=.lst): part-of-module := y
	129
	130	$(real-objs-m) : quiet_modtag := [M]
	131	$(real-objs-m:.o=.i) : quiet_modtag := [M]
	132	$(real-objs-m:.o=.s) : quiet_modtag := [M]
	133	$(real-objs-m:.o=.lst): quiet_modtag := [M]
	134
	135	$(obj-m) : quiet_modtag := [M]
	136
	137	# Default for not multi-part modules
	138	modname = $(basetarget)
	139
	140	$(multi-objs-m) : modname = $(modname-multi)
	141	$(multi-objs-m:.o=.i) : modname = $(modname-multi)
	142	$(multi-objs-m:.o=.s) : modname = $(modname-multi)
	143	$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
	144	$(multi-objs-y) : modname = $(modname-multi)
	145	$(multi-objs-y:.o=.i) : modname = $(modname-multi)
	146	$(multi-objs-y:.o=.s) : modname = $(modname-multi)
	147	$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
	148
	149	quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
	150	cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
	151
	152	$(obj)/%.s: $(src)/%.c FORCE
	153	$(call if_changed_dep,cc_s_c)
	154
	155	quiet_cmd_cpp_i_c = CPP $(quiet_modtag) $@
	156	cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $<
	157
	158	$(obj)/%.i: $(src)/%.c FORCE
	159	$(call if_changed_dep,cpp_i_c)
	160
	161	cmd_gensymtypes = \
	162	$(CPP) -D__GENKSYMS__ $(c_flags) $< \| \
	163	$(GENKSYMS) $(if $(1), -T $(2)) \
	164	$(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
	165	$(if $(KBUILD_PRESERVE),-p) \
	166	-r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
	167
	168	quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
	169	cmd_cc_symtypes_c = \
	170	set -e; \
	171	$(call cmd_gensymtypes,true,$@) >/dev/null; \
	172	test -s $@ \|\| rm -f $@
	173
	174	$(obj)/%.symtypes : $(src)/%.c FORCE
	175	$(call cmd,cc_symtypes_c)
	176
	177	# C (.c) files
	178	# The C file is compiled and updated dependency information is generated.
	179	# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
	180
	181	quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
	182
	183	ifndef CONFIG_MODVERSIONS
	184	cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
	185
	186	else
	187	# When module versioning is enabled the following steps are executed:
	188	# o compile a .tmp_<file>.o from <file>.c
	189	# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
	190	# not export symbols, we just rename .tmp_<file>.o to <file>.o and
	191	# are done.
	192	# o otherwise, we calculate symbol versions using the good old
	193	# genksyms on the preprocessed source and postprocess them in a way
	194	# that they are usable as a linker script
	195	# o generate <file>.o from .tmp_<file>.o using the linker to
	196	# replace the unresolved symbols __crc_exported_symbol with
	197	# the actual value of the checksum generated by genksyms
	198
	199	cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
	200	cmd_modversions = \
	201	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) \| grep -q __ksymtab; then \
	202	$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
	203	> $(@D)/.tmp_$(@F:.o=.ver); \
	204	\
	205	$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
	206	-T $(@D)/.tmp_$(@F:.o=.ver); \
	207	rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
	208	else \
	209	mv -f $(@D)/.tmp_$(@F) $@; \
	210	fi;
	211	endif
	212
	213	ifdef CONFIG_FTRACE_MCOUNT_RECORD
	214	ifdef BUILD_C_RECORDMCOUNT
	215	ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
	216	RECORDMCOUNT_FLAGS = -w
	217	endif
	218	# Due to recursion, we must skip empty.o.
	219	# The empty.o file is created in the make process in order to determine
	220	# the target endianness and word size. It is made before all other C
	221	# files, including recordmcount.
	222	sub_cmd_record_mcount = \
	223	if [ $(@) != "scripts/mod/empty.o" ]; then \
	224	$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
	225	fi;
	226	recordmcount_source := $(srctree)/scripts/recordmcount.c \
	227	$(srctree)/scripts/recordmcount.h
	228	else
	229	sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
	230	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
	231	"$(if $(CONFIG_64BIT),64,32)" \
	232	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
	233	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
	234	"$(if $(part-of-module),1,0)" "$(@)";
	235	recordmcount_source := $(srctree)/scripts/recordmcount.pl
	236	endif
	237	cmd_record_mcount = \
	238	if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
	239	"$(CC_FLAGS_FTRACE)" ]; then \
	240	$(sub_cmd_record_mcount) \
	241	fi;
	242	endif
	243
	244	ifdef CONFIG_STACK_VALIDATION
	245	ifneq ($(SKIP_STACK_VALIDATION),1)
	246
	247	__objtool_obj := $(objtree)/tools/objtool/objtool
	248
	249	objtool_args = check
	250	ifndef CONFIG_FRAME_POINTER
	251	objtool_args += --no-fp
	252	endif
	253
	254	# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
	255	# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
	256	# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
	257	cmd_objtool = $(if $(patsubst y%,, \
	258	$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
	259	$(__objtool_obj) $(objtool_args) "$(@)";)
	260	objtool_obj = $(if $(patsubst y%,, \
	261	$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
	262	$(__objtool_obj))
	263
	264	endif # SKIP_STACK_VALIDATION
	265	endif # CONFIG_STACK_VALIDATION
	266
	267	define rule_cc_o_c
	268	$(call echo-cmd,checksrc) $(cmd_checksrc) \
	269	$(call cmd_and_fixdep,cc_o_c) \
	270	$(cmd_modversions) \
	271	$(cmd_objtool) \
	272	$(call echo-cmd,record_mcount) $(cmd_record_mcount)
	273	endef
	274
	275	define rule_as_o_S
	276	$(call cmd_and_fixdep,as_o_S) \
	277	$(cmd_objtool)
	278	endef
	279
	280	# List module undefined symbols (or empty line if not enabled)
	281	ifdef CONFIG_TRIM_UNUSED_KSYMS
	282	cmd_undef_syms = $(NM) $@ \| sed -n 's/^ \+U //p' \| xargs echo
	283	else
	284	cmd_undef_syms = echo
	285	endif
	286
	287	# Built-in and composite module parts
	288	$(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
	289	$(call cmd,force_checksrc)
	290	$(call if_changed_rule,cc_o_c)
	291
	292	# Single-part modules are special since we need to mark them in $(MODVERDIR)
	293
	294	$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
	295	$(call cmd,force_checksrc)
	296	$(call if_changed_rule,cc_o_c)
	297	@{ echo $(@:.o=.ko); echo $@; \
	298	$(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod)
	299
	300	quiet_cmd_cc_lst_c = MKLST $@
	301	cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
	302	$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
	303	System.map $(OBJDUMP) > $@
	304
	305	$(obj)/%.lst: $(src)/%.c FORCE
	306	$(call if_changed_dep,cc_lst_c)
	307
	308	# Compile assembler sources (.S)
	309	# ---------------------------------------------------------------------------
	310
	311	modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
	312
	313	$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
	314	$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
	315
	316	quiet_cmd_cpp_s_S = CPP $(quiet_modtag) $@
	317	cmd_cpp_s_S = $(CPP) $(a_flags) -o $@ $<
	318
	319	$(obj)/%.s: $(src)/%.S FORCE
	320	$(call if_changed_dep,cpp_s_S)
	321
	322	quiet_cmd_as_o_S = AS $(quiet_modtag) $@
	323	cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
	324
	325	$(obj)/%.o: $(src)/%.S $(objtool_obj) FORCE
	326	$(call if_changed_rule,as_o_S)
	327
	328	targets += $(real-objs-y) $(real-objs-m) $(lib-y)
	329	targets += $(extra-y) $(MAKECMDGOALS) $(always)
	330
	331	# Linker scripts preprocessor (.lds.S -> .lds)
	332	# ---------------------------------------------------------------------------
	333	quiet_cmd_cpp_lds_S = LDS $@
	334	cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
	335	-D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
	336
	337	$(obj)/%.lds: $(src)/%.lds.S FORCE
	338	$(call if_changed_dep,cpp_lds_S)
	339
	340	# ASN.1 grammar
	341	# ---------------------------------------------------------------------------
	342	quiet_cmd_asn1_compiler = ASN.1 $@
	343	cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
	344	$(subst .h,.c,$@) $(subst .c,.h,$@)
	345
	346	.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
	347
	348	$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
	349	$(call cmd,asn1_compiler)
	350
	351	# Build the compiled-in targets
	352	# ---------------------------------------------------------------------------
	353
	354	# To build objects in subdirs, we need to descend into the directories
	355	$(sort $(subdir-obj-y)): $(subdir-ym) ;
	356
	357	#
	358	# Rule to compile a set of .o files into one .o file
	359	#
	360	ifdef builtin-target
	361	quiet_cmd_link_o_target = LD $@
	362	# If the list of objects to link is empty, just create an empty built-in.o
	363	cmd_link_o_target = $(if $(strip $(obj-y)),\
	364	$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
	365	$(cmd_secanalysis),\
	366	rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
	367
	368	$(builtin-target): $(obj-y) FORCE
	369	$(call if_changed,link_o_target)
	370
	371	targets += $(builtin-target)
	372	endif # builtin-target
	373
	374	#
	375	# Rule to create modules.order file
	376	#
	377	# Create commands to either record .ko file or cat modules.order from
	378	# a subdirectory
	379	modorder-cmds = \
	380	$(foreach m, $(modorder), \
	381	$(if $(filter %/modules.order, $m), \
	382	cat $m;, echo kernel/$m;))
	383
	384	$(modorder-target): $(subdir-ym) FORCE
	385	$(Q)(cat /dev/null; $(modorder-cmds)) > $@
	386
	387	#
	388	# Rule to compile a set of .o files into one .a file
	389	#
	390	ifdef lib-target
	391	quiet_cmd_link_l_target = AR $@
	392	cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
	393
	394	$(lib-target): $(lib-y) FORCE
	395	$(call if_changed,link_l_target)
	396
	397	targets += $(lib-target)
	398	endif
	399
	400	#
	401	# Rule to link composite objects
	402	#
	403	# Composite objects are specified in kbuild makefile as follows:
	404	# <composite-object>-objs := <list of .o files>
	405	# or
	406	# <composite-object>-y := <list of .o files>
	407	# or
	408	# <composite-object>-m := <list of .o files>
	409	# The -m syntax only works if <composite object> is a module
	410	link_multi_deps = \
	411	$(filter $(addprefix $(obj)/, \
	412	$($(subst $(obj)/,,$(@:.o=-objs))) \
	413	$($(subst $(obj)/,,$(@:.o=-y))) \
	414	$($(subst $(obj)/,,$(@:.o=-m)))), $^)
	415
	416	quiet_cmd_link_multi-y = LD $@
	417	cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
	418
	419	quiet_cmd_link_multi-m = LD [M] $@
	420	cmd_link_multi-m = $(cmd_link_multi-y)
	421
	422	$(multi-used-y): FORCE
	423	$(call if_changed,link_multi-y)
	424	$(call multi_depend, $(multi-used-y), .o, -objs -y)
	425
	426	$(multi-used-m): FORCE
	427	$(call if_changed,link_multi-m)
	428	@{ echo $(@:.o=.ko); echo $(link_multi_deps); \
	429	$(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod)
	430	$(call multi_depend, $(multi-used-m), .o, -objs -y -m)
	431
	432	targets += $(multi-used-y) $(multi-used-m)
	433
	434
	435	# Descending
	436	# ---------------------------------------------------------------------------
	437
	438	PHONY += $(subdir-ym)
	439	$(subdir-ym):
	440	$(Q)$(MAKE) $(build)=$@
	441
	442	# Add FORCE to the prequisites of a target to force it to be always rebuilt.
	443	# ---------------------------------------------------------------------------
	444
	445	PHONY += FORCE
	446
	447	FORCE:
	448
	449	# Read all saved command lines and dependencies for the $(targets) we
	450	# may be building above, using $(if_changed{,_dep}). As an
	451	# optimization, we don't need to read them if the target does not
	452	# exist, we will rebuild anyway in that case.
	453
	454	targets := $(wildcard $(sort $(targets)))
	455	cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
	456
	457	ifneq ($(cmd_files),)
	458	include $(cmd_files)
	459	endif
	460
	461	# Declare the contents of the .PHONY variable as phony. We keep that
	462	# information in a variable se we can use it in if_changed and friends.
	463
	464	.PHONY: $(PHONY)